ARM Tech

Processing AXI transaction with VALID and no READY

Thu, 23 May 2013 20:40:29 +0000

Hi,

I'm seeing the following scenario:

A slave has store is in progress to addrA such that the AW and W transactions have completed (with WDATA = 0xded) but the write response has not yet been issued and then we have:

cycleN: ARVALID = 1 and ARREADY = 0 and ARADDR = addrA

cycle N+1: ARVALID = 1 and ARREADY = 0 and ARADDR = addrA
Internally in the slave device, it fetches data for addrA (data that's fetched = 0xde9)

cycle N+2: ARVALID = 1 and ARREADY = 0 and ARADDR = addrA
BVALID = 1 and BREADY = 1 and BRESP = 0x0 (this is for the outstanding store mentioned above)

cycle N+3: ARVALID = 1 and ARREADY = 0 and ARADDR = addrA

cycle N+4: ARVALID = 1 and ARREADY = 1 and ARADDR = addrA

cycle N+5: RVALID = 1 and RREADY = 1 and RDATA = 0xde9

Is it valid for the slave to start processing the read transaction and fetch data for it once ARVALID is asserted but before it asserts ARREADY?

My thinking is that it's not valid based on the following sections in the AXI specs:

Section A1.3.1 p. 25:

“The destination uses the READY signal to show when it can accept the information.”

Section A2.5 p. 34:

“ARREADY Slave Read address ready. This signal indicates that the slave is ready to accept an address

and associated control signals. See Channel handshake signals on page A3-40.”

Section A3.2.1 p. 39:

“The destination generates the READY signal to indicate that it can

accept the information. Transfer occurs only when both the VALID and READY signals are HIGH.”

Can someone please confirm if I'm right or wrong? If I'm wrong, can you please tell me why? It would help if you can point to references in the specs in the explanation.

Thanks.

Setting an entry point

Thu, 23 May 2013 11:18:25 +0000

Hello,

Finally I managed to build a static library and I have a xyz.a file and some xyzs.o files. The entry point is xyz_init and I put this as so in the debugger, however on loading I get this:

WARNING(CMD399-COR168):
! Failed to start the target
! No function named "xyz_init" could be found
WARNING(CMD407): Trying the entry point instead
ERROR(CMD426): Cannot find symbol to start or entrypoint, the file or load commands may be used to set the entrypoint

How can I make the debugger see my entry point? Also, how do I load up some symbol files?

Thanks.

ARM Cortex A9 | Non-cacheable memory range

Thu, 23 May 2013 06:39:38 +0000

Hi all,

I am designing an application on xilinx zynq 702 board which comes with two(core) arm cortex a9 processors. I am using one of the arm cores two run a part of the application which retrieves and stores data on DDR3(on zynq), that in turn is stored or retrieved by another part of the application running on microblaze(zynq).

For maintaining coherency between them I need to make the data accesses non-cacheable. Is there any provision on arm to make a range of memory non-cacheable during run-time?

Thanks

John

Instruction to see activity on D-bus of CM3

Wed, 22 May 2013 16:37:25 +0000

Can, anyone tell which syntax of 'C' code will make the CM3 to do write transaction in D-bus ?

Starting debug server

Wed, 22 May 2013 12:28:05 +0000

Hello,

I was using DS5 fine for connecting to my Altera board and then today it just stopped working, even the examples do not work. So when trying to load the baremetal example, I get this error:

Starting debug server
Waiting for debug server to start accepting connections
processrunner.py:8: RuntimeWarning: Unable to determine _shell_command for underlying os: nt
import subprocess
RDDI-DAP-DS : ERROR failed to connect to RDDI DAP target
RDDI Error Code 4107 : Connection to target failed.
RDDI DLL = rddi-dap_altera_2.dll
RDDI CFG = C:\Users\mgriffit\AppData\Local\Temp\ds5_8070900945896429705.txt
Failed to launch debug server. Command:
/debug_server\vstrm_serverd_rddi.exe -rddi_dap_dll rddi-dap_altera_2.dll -rddi_dap_cfg \Local\Temp\ds5_8070900945896429705.txt -pollrate 200
exited with error code: 1

Any ideas what to try? What could have happened?

DS-5 Debugging on a Samsung S III

Wed, 22 May 2013 05:40:22 +0000

Hi there,

Assume I know nothing which isn't so far from the truth. I've been trying to use DS-5 to debug native C++ code on my Android Galaxy S III. I've downloaded the community edition and I've followed all the steps documented on the DS-5 website. I've done the follow

1. Built my code with NDK_DEBUG=1
2. In debug configuration selected APK native library debug -> Attach to a running Android application.

I've noticed something odd here, when I fill in the Project Directory and APK file entries the Process and Activity are suppose to fill themselves in. For me they don't.

3. I then place a breakpoint in my Java code, run to this breakpoint and then select Connect To Target in the DS-5 debugger. I get the following error message.

Unable to connect

Reason:
Failed gdbserver configuration:
The script file (run_nostart.py) failed during execution:

Failed to attach gdbserver to . Unable to locate gdbserver in run-as : Package /system/bin/sh is unknown/lib/. Rebuild the application with NDK_DEBUG=1

Which would seem to suggest that the gdbserver was not found. Given I've built my application with NDK_DEBUG=1 I'm pretty confused.

Does anyone have any ideas?

Many thanks,

Derek

Target SOC auto-resets while using DS-5/Dstream

Tue, 21 May 2013 11:39:48 +0000

Hi,

When I debug an u-boot code on a custom SOC using Arm DS-5 debugger and DStream, I could see that the target resets itself after a few seconds(approximately 12 seconds). In the DS-5 command window, I could see "Target has been reset" message being displayed repeatedly in an interval few seconds.

Target has been reset
Target Message: Could not determine target state
Target has been reset
Target Message: Could not determine target state
Target has been reset
Target Message: Could not determine target state

I am not able to understand how does the target auto-reset itself( and that too in an interval of 12 seconds and repeatedly). I am sure that my application(u-boot) is not sending any 'reset' command to the target.

Is there is any setting that needs to be changed? Please help.

Thanks,
Ayan Kumar Halder

Error: Neon quad precision register expected

Mon, 20 May 2013 07:30:43 +0000

When I try to build my neon assembly code using arm-elf-gcc compiler I get following error:

Error: Neon quad precision register expected -- `vld1.32 Q12,[R12]!'

According to ARM instruction the syntax seems proper, but why am I getting this error?

Cortex-a7 dual-issue ?

Sun, 19 May 2013 17:56:23 +0000

Currently,i tested the A31(Quad-core cortex-a7) and found out the cortex-A7 only can dual-issue one data process instruction and a branch instruction.

"Cortex-A7 (Figure 1) is an in-order, non-symmetric dual-issue processor with a pipeline length of between 8-stages and 10-stages." from <big.LITTLE_Final.pdf>

we can find the "dual issue" pipeline in Figure 1 Cortex-A7 Pipeline.

My questions are:

1.What is "non-symmetric dual-issue processor"?

2.Can cortex-a7 decode two instructions?

3.Which instruction can run through the "dual issue" pipeline? Only branch instruction ?

thanks a lot!

No such file or directory

Fri, 17 May 2013 10:18:21 +0000

Hello,

While using DS5 to build my project, I get the following error:

fatal error: xyz.h: No such file or directory

I know that it exists but how do I let the compiler know where to look?