Center for Hybrid & Embedded Software Systems Blog

Cyber-Physical Systems Security: Washington D.C Chamber of Commerce Thermostat Attacked

noreply@blogger.com (Christopher Brooks) — Thu, 29 Dec 2011 15:32:00 +0000

A Risks mailing list post "Internet of things" by David Magda points to a December 21, 2011 Wall Street Journal article "China Hackers Hit U.S. Chamber"

The Chamber continues to see suspicious activity, they say. A thermostat at a town house the Chamber owns on Capitol Hill at one point was communicating with an Internet address in China, they say, and, in March, a printer used by Chamber executives spontaneously started printing pages with Chinese characters.

News sources do not suggest that there is any strategic value in having a thermostat sending data to China. Perhaps once the servers were breached, other systems on the networks started sending traffic as well?

The incident does point out an obvious potential pitfall of having embedded systems on a public-facing internet.

Dataflow machines help J.P. Morgan reduce end of day risk calculations from 8 hours to 238 seconds

noreply@blogger.com (Christopher Brooks) — Fri, 16 Dec 2011 00:48:00 +0000

The Wall Street Journal blog entry "Maxeler Makes Waves With Dataflow Design" discusses Maxeler, who make FPGA-based dataflow machines/

Apparently, J.P. Morgan is using Maxeler machines for end of day risk calculations. The time needed for the calculation dropped from 8 hours to 238 seconds. See "JP Morgan expands deployment of FPGA-based supercomputer".

Our group has a long history with dataflow, so it is gratifying to see a real-world dataflow solution.

"Distinguished lecture series to focus on cyber-physical systems "

noreply@blogger.com (Christopher Brooks) — Tue, 21 Sep 2010 21:42:00 +0000

Washington University in St. Louis will be hosting a "Distinguished lecture series to focus on cyber-physical systems" that includes Edward A. Lee's talk:

"Nov. 12. Edward A. Lee, PhD, the Robert S. Pepper Distinguished Professor of computer science at the University of California, Berkeley and director of Chess (Center for Hybrid and Embedded Software Systems), raises an even deeper problem in a talk titled “Computing Needs Time.” He asks whether today’s computing technologies provide an adequate foundation for cyber-physical systems because time and timing play such an important role in physical systems, while software takes account of the passage of time, but only very indirectly."

NY Times Magazine indirectly mentions CHESS sponsored research

noreply@blogger.com (Christopher Brooks) — Thu, 18 Feb 2010 23:48:00 +0000

The February 10, 2010 NY Times Magazine article "Do-It-Yourself Genetic Engineering" indirectly mentions Dr. Doug Densmore's International Genetically Engineered Machine competition (iGEM) Berkeley iGEM Software Team. The article states:

"Across the bay from City College, a University of California, Berkeley iGEM team was building a piece of computer software that allowed it to design genetic parts by dragging and dropping DNA sequences together on the screen. Then, with the click of a button, the software fed instructions to a liquid-handling robot in their lab that executed various reactions and assembled each genetic part they needed. It was like when you line up songs on iTunes and burn the playlist on a CD. “We’re making way more DNA’s than we ever have before, and we couldn’t have done it without the robot,” the
Berkeley team’s adviser told me. "

The City College instructor, Dirk VandePol, was on the Berkeley wet team in 2008.

Nonprofit for collecting info on SCADA & PCS security incidents

noreply@blogger.com (Christopher Brooks) — Tue, 15 Sep 2009 17:51:00 +0000

The Risks Digest has an item that refers to Stephanie Neil's article in "Managing Automation", 12 Sep 2009 that discusses the http://www.securityincidents.org, "a newly formed non-profit group that provides public access to its Repository of Industrial Security Incidents (RISI)". This group is targeted towards SCADA and process control security incidents that occur in many systems, including Cyber-Physical Systems.

Cyber-enabled Discovery and Innovation FY10 Information

noreply@blogger.com (Christopher Brooks) — Thu, 10 Sep 2009 22:57:00 +0000

The NSF announced: Information for the research community in advance of release of the FY10 solicitation for Cyber-enabled Discovery and Innovation (CDI).

The NSF website says:

It is anticipated that an official solicitation for the FY 2010 CDI competition will be posted in the coming weeks. For the information of the research community, the following statements highlight important items and expected changes from the previous FY 2009 solicitation. This is subject to change until the FY 2010 solicitation is officially approved and posted.

No Type III: As in FY 2009, there will be no Type III competition in FY 2010.
No pre-proposals: Preliminary proposals will be eliminated – PIs will be asked to submit full proposals only.
Deadlines: Type I and Type II will continue to be independent competitions in FY 2010. The new deadlines will be February 4, 2010, for Type I full proposals and February 5, 2010, for Type II full proposals.
The paragraphs on societal impact of CDI, in the synopsis and description sections, will be expanded to address national grand challenges and presidential initiatives (e.g., see http://www.ostp.gov/galleries/press_release_files/Final%20Signed%20OMB-OSTP%20Memo%20-%20ST%20Priorities.pdf).
The section on virtual organizations will be revised to more strongly emphasize research, in contrast to only building infrastructure.

July 23, 2009 DHS Cyber-physical Systems Conference

noreply@blogger.com (Christopher Brooks) — Fri, 24 Jul 2009 16:48:00 +0000

The Homeland Security Today website has an article, "Workshop Probes Future of Cyber-physical Security" that discusses a July 23 DHS sponsored CPS conference. At that conference, Jeannette Wing (assistant director at the NSF) is quoted as saying “Our lives depend on them [CPS] and our lives will depend on them more and more in the future,” and “How can we build intelligent … and safe digital systems that interact with the physical world?"

UC Berkeley Team to Receive First ACM/IEEE A. Richard Newton Technical Impact Award in Electronic Design Automation

noreply@blogger.com (Mary Stewart) — Thu, 16 Jul 2009 22:18:00 +0000

For their outstanding technical contributions, UC Berkeley Professors Robert K. Brayton, Richard Rudell, Alberto Sangiovanni-Vincentelli, and Albert R. Wang will be the first recipients of the ACM/IEEE A. Richard Newton Technical Impact Award in Electronic Design Automation (EDA).

The award will be presented to these authors of the seminal paper, "MIS: A Multiple-Level Logic Optimization System" at the opening session of the 46th Design Automation Conference on July 28th.

The paper, having established the groundwork of modern multi-level logic synthesis, has made major contributions to research, education and industrial practice.

See article in News Blaze.

"When Robots Invaded the Senate"

noreply@blogger.com (Christopher Brooks) — Wed, 15 Jul 2009 13:31:00 +0000

The NSF news item "When Robots Invaded the Senate" discusses the July 14, 2009 Cyber-Physical Systems (CPS) briefing given by the NSF funded researchers to Senate members and their staff.

NSF Presents a Luncheon Briefing and Open-House Exhibits on Cyber-physical Systems On Capitol Hill

noreply@blogger.com (Christopher Brooks) — Tue, 07 Jul 2009 15:17:00 +0000

"On Thursday, July 9, the National Science Foundation (NSF) will present a luncheon briefing and open house with exhibits on cyber-physical systems (CPS) in Room 902 of the Hart Senate Office Building. Senate Majority Leader Harry Reid. a special guest, will provide opening remarks. Senator John D. Rockefeller IV is also invited to attend. Leading experts from industry and academia will offer their insights into the impending CPS revolution. Researchers and students, ranging from doctoral students to students from Baltimore-area high schools, will present demonstrations and exhibits highlighting the latest research and education on CPS."

For details, see http://www.nsf.gov/news/news_summ.jsp?cntn_id=115133

Cyber-Physical Systems Security Workshop: July 22-24, Newark

noreply@blogger.com (Christopher Brooks) — Mon, 01 Jun 2009 16:20:00 +0000

"A Cyber-physical Systems Security Workshop will be held on July 22-24 in Newark, NJ. This workshop is sponsored by the Science & Technology Directorate, DHS; National Cyber Security Division, DHS, National Institute of Standards and Technology; US Department of Energy, Office of the Secretary of Defense, DoD; Operations, Plans & Requirements, HQ USAF; and Logistics, Installations, & Mission Support, HQ USAF."

"In addition to presentations of selected position papers submitted by researchers from academic, industry, and national Laboratories, we also have four panels: industry, sectors, NSF, and venture capital firms. These panels provide a forum for the respective representatives to discuss their perspectives on the current state of the security of cyber-physical systems; where should the technology and science be in 5-10 years from now; why we are not there now? What are, in their opinion, some of the research challenges that are in the way of us being there now; and why do we need to be there? That is, what legitimate case that can be made to justify the needed R&D investments. Furthermore, we are in discussion with the All Hazards Consortium to have representatives from their 9 member states (NY, NJ, VA, WV, MD, PA, DC, etc.) join in a “States/Local” Panel."

Paper Submission

Submission site: http://www.easychair.org/conferences/?conf=cpssw09

Important Dates

June 1, 2009 - Extended Deadline for Position paper submission: June
8, 2009
June 29, 2009- Author notification
July 22-24, 2009- Workshop

US House of Representatives passes NITRD Bill that mentions Cyber-Physical Systems

noreply@blogger.com (Christopher Brooks) — Wed, 13 May 2009 14:13:00 +0000

The U.S. House of Representatives passed H.R. 2020, the Networking and Information Technology Research and Development Act of 2009:

"Additionally, it creates a task force to explore mechanisms for carrying out collaborative R&D activities in cyber-physical systems;"

NSF Cyber-Physical Systems Program Solicitation

noreply@blogger.com (Christopher Brooks) — Sun, 05 Oct 2008 16:07:00 +0000

The NSF Cyber-Physical Systems Program Solication is available.

Bruce Sterling blogged about this at Wired.

Wireless Sensors Reduce Flooding in Indiana City

noreply@blogger.com (Christopher Brooks) — Sun, 05 Oct 2008 16:01:00 +0000

An article at Government Technology, "Wireless Sensors Reduce Flooding in Indiana City," describes a system that uses actuation to divert rainwater run-off to unused portions of the sanitary sewer system in South Bend, Indiana.

The system, called CSOnet, is a "cyber-physical system" because it integrates computation with control, said Michael Lemmon, University of Notre Dame professor of electrical engineering. It watches and alters its own world, similar to how a traffic controller monitors traffic congestion and orchestrates light timing. "Probably what's unique about this is it includes actuation, so that we're actually controlling something," Lemmon said.

CFP: DIPES 2008: IFIP Working Conference on Distributed and Parallel Embedded Systems Milano, Italy: 9/7-9/8, 2008

noreply@blogger.com (Christopher Brooks) — Wed, 07 Nov 2007 15:22:00 +0000

DIPES 2008 - Call for Papers

IFIP Working Conference on Distributed and Parallel Embedded Systems
Milano, Italy
September 7th - 10th, 2008
hosted as part of the IFIP World Computer Congress

URL: http://www.c-lab.de/dipes

Conference Theme

Embedded systems build the key technological components of all kinds of complex technical systems, ranging from telecommunications devices to automobiles, aircraft and even complete production lines. Traditionally, such embedded control systems have been implemented in a monolithic, centralized manner, but distributed solutions have steadily been gaining popularity. In a distributed setup, the control task is carried out by a number of controllers distributed over the entire system and interconnected as a network by communication components such as field buses. The individual nodes of such a network usually consist of a processor (microcontroller) together with some sensors and actuators. More demanding local control applications require more powerful controllers based on parallel architectures such as multiprocessor systems-on-chips (MPSoCs) or VLIW. Distribution and parallelism in embedded system design increase the engineering challenges and demand new development methods!
and tools. Also, the increasing relevance of intelligent applications like autonomous systems or systems with self-x properties calls for new design methods and tools. Due to the growing complexity of these kinds of embedded systems, their development requires new, consistent and integrated design methodologies, covering the path from specification to implementation.

DIPES will be an ideal opportunity to present exchange and discuss the state of the art, novel ideas, actual research results, and future trends in the field of distributed embedded systems. Contributors and participants from both industry and academia are encouraged to take active part in this conference.

Topics

Authors are invited to submit manuscripts of original unpublished research work in all areas. Relevant topics include (but are not limited
to):

1. Specification and modelling of complex embedded systems
2. Design methodology for distributed and parallel embedded systems
3. Design support for intelligent features in embedded systems
4. Validation and verification of embedded systems
5. Novel programming techniques for distributed real-time systems
6. Operating systems and middleware for distributed real-time systems
7. Self-x properties in distributed embedded systems
8. Partitioning and allocation of tasks
9. Distributed real-time operating systems
10. Real-time communication systems
11. Software synthesis for real-time applications
12. Mixed continuous/discrete systems
13. HW/SW co-design for distributed embedded systems
14. Specific (parallel) architectures for distributed embedded systems
15. Dependability and fault tolerance of distributed embedded systems
16. Low power design of embedded systems
17. Case studies of distributed embedded systems

Important dates

December 1st, 2007: Submissions due
February 20th, 2008: Notification of acceptance
March 20th, 2008: Final papers due

Paper Submission

You may submit full papers up to 10 pages or extended abstracts (3 - 5 pages) describing original work on the topics above or related ones via the DIPES conference URL http://www.c-lab.de/dipes. Extended abstracts should provide a summary of the main results and some details to allow the program committee to assess their merits and significance, including references and comparisons. The contribution must be unpublished and not submitted for publication elsewhere, including journals and the proceedings of other symposia or workshops. One author of each accepted paper has to present it at the conference. The proceedings will be published by Springer Science and Business Media, the official IFIP publisher. The final paper may be up to 10 pages in 11 point or larger with a text area of 7" x 4.75". Further formatting guidelines can be found at the publisher's website http://springer.com/series/6102 or at the DIPES website.

Conference Chairs

General Chair: Wayne Wolf, University of Princeton, USA
PC Chair: Bernd Kleinjohann, University of Paderborn/C-LAB, Germany
Publication Chair: Lisa Kleinjohann, University of Paderborn/C-LAB, Germany

CFP: UML & AADL 2008 (4/08, Belfast, Northern Ireland)

noreply@blogger.com (Christopher Brooks) — Wed, 24 Oct 2007 23:28:00 +0000

**********************************************************************
CALL FOR PAPERS : UML&AADLÂ'2008

http://www.artist-embedded.org/artist/Topics,1199.html

Workshop held in conjunction with ICECCS 2008
The thirteenth IEEE International Conference on
Engineering of Complex Computer Systems

http://www.iceccs.org/

http://www.compeng.ulster.ac.uk/events/ecbs2008/workshops.php

April 02 , 2008
Belfast, Norther Ireland

************************************************************************

Submission deadline: December 01, 2007
--------------------------------------

The first OMG sponsored "UML & AADL" workshop was held at ENST Paris (Telecom Paris) in 2006. The workshop was focused on embedded real-time software-intensive systems that are usually found in the avionic, vehicular control and aerospace fields. The workshop clearly had a main concern which was to determine what architectural levels would be better described with UML as opposed to AADL and vice versa, how to use these two standardised languages together (integrating them using an MDA approach, e.g.: TOPCASED).

The second edition of the workshop, "UML&AADL'2007" was held in conjunction with the 12th International Conference on Engineering of Complex Computer Systems (ICECS07). The AADL standard had just been completed with a behaviour annex proposal and the MARTE UML profile was about to be accepted. Thus, the main concerns of the second edition of the workshop were centred around which parts of the MARTE UML profile could be incorporated into an AADL PSM (Platform Specific Model) without overly complicating the language, how to maintain the non-functional properties and aspects of the design throughout the whole software engineering process and how to specify functional and non-functional properties of AADL components.

The third edition of the workshop, "UML&AADL'2008" will again be held with the ICECCS conference since many concerns are found to be common and/or complementary. The proposed topics of the workshop are revolve around the architecture modeling of complex systems. This year, the main concerns are:
• How to handle code generation from a high-level specification
• How to ensure architecture model verification
• How to model DRE (Distributed Real-time Embedded) systems with an MDA approach
• How to carry out scheduling analysis from system models

Topics:
======

New real-time systems have increasingly complex architectures because of the intricacy of the multiple interdependent features they have to manage. They must meet new requirements of reusability, interoperability, flexibility and portability. These new dimensions favour the use of an architecture description language that offers a global vision of the system, and which is particularly suitable for handling real-time characteristics.

Due to the even more increased complexity of distributed, real-time and embedded systems (DRE), the need for a model-driven approach is more obvious in this domain than in monolithic RT systems. The purpose of this workshop is to provide an opportunity to gather researchers and industrial practitioners to survey existing efforts related to behaviour modelling and model-based analysis of DRE systems.

This workshop seeks contributions from researchers and practitioners interested in all aspects of the representation, analysis, and implementation of DRE system behaviour and/or architecture models. To this end, we solicit short papers (~6 pages long) as well as full papers (not more than 20 pages) related to, but not limited to, the followingprincipal topics:

• Code generation from UML (action language) or an ADL (for instance,building a runtime corresponding to what is specified in an ADL description, code patterns) towards multiple target languages. Presentation of code genaration frameworks, tool suites or component-based programming will be particularly appreciated
• Model verification to verify functional properties against constraints given in the architecture model
• Verification of non-functional properties given in the architecture model against constraints given in the model
• Modelling DRE systems with languages such as UML and/or AADL, ACME,Wright, or other ADLs
o Behaviour modelling (concerns described in the Scope part)
o How to enhance modelling languages and ADLs to capture real
time,
embedded and distributed aspects in a convenient manner
o How to specify real-time requirements and characteristics in
modelling languages

Workshop Format
===============
This full-day workshop will consist of an introduction of the topic by the workshop organizers, presentations of accepted papers, and in depth discussion of previously identified subjects emerging from the submissions. A summary of the discussions will be made available.

Submission and Publication
==========================
To contribute, please send a position paper or a technical paper to agusti[dot]canals[at]c-s[dot]fr with "ICECCS08 UML&AADL Workshop" in the title. Papers should not exceed 6 pages. Submitted manuscripts should be in English and formatted in the style of the IEEE Computer Society Proceedings Format. Preferably, submissions should be in PDF format.

Workshop proceedings will be distributed to all participants and made available through the workshop website.

The seven best papers and a workshop overview will be published in the IEEE Computer Society Press Proceedings.

Additionally, all selected papers will be availables in an "IEEE Xplore Digital Library File Cabinet".

IMPORTANT DATES
===============
Submission deadline: December 01, 2007
All Notification of acceptance: December 15, 2007
Workshop date : April 02, 2008

Organizers
==========
Agusti Canals (CS, France)
Sébastien Gérard (CEA-LIST, France)
Isabelle Perseil (ENST, France)

Programme Committee:
Yamine Ait Ameur (LISI / ENSMA, France)
Jean-Paul Bodeveix (IRIT, France)
Agusti Canals (CS, France)
Mamoun Filali (IRIT, France)
Madeleine Faugère (THALES, France)
Robert France (Colorado State University, USA)
Sébastien Gérard (CEA-LIST, France)
Irfan Hamid (ENST, France)
Bruce Lewis (US Army AMCOM)
Dominique Mery (LORIA, France)
Thierry Millan (IRIT, France)
Richard Paige (University of York, United Kingdom)
Douglas C. Schmidt (Vanderbild University, USA)
Françoise Simonot Lion (LORIA, France)
Oleg Sokolsky (University of Pennsylvania, USA)
Jing Sun (University of Auckland, New Zealand)
Martin Törngren (KTH - Royal Institute of Technology, Sweden)
Thomas Vergnaud (CNES, France)
François Vernadat (CNRS-LAAS, France)
Sergio Yovine (CNRS-Verimag, France)
André Windisch (EADS Military Aircraft, Germany)

CFP: Software and Compilers for Embedded Systems (SCOPES 2008), March 13-14, Munich

noreply@blogger.com (Christopher Brooks) — Thu, 18 Oct 2007 19:54:00 +0000

11th International Workshop on
Software and Compilers for Embedded Systems

SCOPES 2008

March 13-14, 2008
ICM, Munich, Germany

http://www.scopesconf.org

----------------------------------------------------------------------------

CALL FOR PAPERS

ABOUT SCOPES 2008

The influence of embedded systems is constantly growing. Increasingly powerful and versatile devices are developed and put on the market at a fast pace. The number of features is increasing, and so arre the constraints on the systems concerning size, performance, energy dissipation and timing predictability. Since most systems today use a processor to execute an application program rather than using dedicated hardware, the requirements can not be fulfilled by hardware architects alone: Hardware and software have to work together to meet the tight constraints put on modern devices.

One of the key characteristics of embedded software is that it heavily depends on the underlying hardware. The reason of the dependency is that embedded software needs to be designed in an application specific way. To reduce the system design cost, e.g. code size, energy consumption etc., embedded software needs to be optimized exploiting the characteristics of the underlying hardware.

SCOPES focuses on the software generation process for modern embedded systems. Topics of interest include all aspects of the compilation process, starting with suitable modeling and specification techniques and programming languages for embedded systems. The emphasis of the workshop lies on code generation techniques for embedded processors. The exploitation of specialized instruction set characteristics is as important as the development of new optimizations for embedded application domains. Cost criteria for the entire code generation and optimization process include runtime, timing predictability, energy dissipation, code size and others. Since today's embedded devices frequently consist of a multi-processor system-on-chip, the scope of this workshop is not limited to single- processor systems but particularly covers compilation techniques for MPSoC architectures.

In addition, this workshop intends to put a spotlight on the interactions between compilers and other components in the embedded system design process. This includes compiler support for e.g. architecture exploration during HW/SW codesign or interactions between operating systems and compilation techniques. Finally, techniques for compiler aided profiling, measurement, debugging and validation of embedded software are also covered by this workshop, because stability of embedded software is mandatory.

SCOPES 2008 is the 11th workshop in a series of workshops initially called "International Workshop on Code Generation for Embedded Processors". The name SCOPES has been used since the 4th workshop. The scope of the workshop remains software for embedded systems with emphasis on code generation (compilers) for embedded processors. SCOPES will be held in cooperation with ACM SIGBED and is sponsored by ARTIST2 and EDAA. SCOPES 2008 is co-located with the DATE conference.

----------------------------------------------------------------------------

IMPORTANT DATES

Full paper submission: Dec 01, 2007
Notification of acceptance: Jan 30, 2008
Final paper submission: Feb 21, 2008

----------------------------------------------------------------------------

SUBMISSION INSTRUCTIONS

Papers should present original research results not published or submitted for publication in other forums. Papers should not exceed 10 pages (single- spaced, 2 columns, 10pt font; see the DATE website http://www.date-conference.com for detailed guidelines) and must be submitted using the SCOPES paper submission website. To permit blind review, submissions should not include the author names. Accepted papers will be published via the ACM digital library.

----------------------------------------------------------------------------

GENERAL CHAIR

Heiko Falk
Computer Science 12
University of Dortmund, DE

PUBLICITY CHAIR

Peter Marwedel
Computer Science 12
University of Dortmund, DE

----------------------------------------------------------------------------

FURTHER INFORMATION

Website: http://www.scopesconf.org
Mailing List: http://www.scopesconf.org/list

----------------------------------------------------------------------------

CFP: 2008 ACM International Conference on Computing Frontiers

noreply@blogger.com (Christopher Brooks) — Wed, 10 Oct 2007 03:42:00 +0000

Call for Papers
2008 ACM International Conference on Computing Frontiers
(Computing Frontiers 2008)

Ischia, Italy
May 5-7, 2008

http://www.computingfrontiers.org/
Sponsored by:

Association for Computing Machinery
ACM Special Interest Group on Microarchitecture

=================================================================

Call for Papers - Computing Frontiers 2008

The increasing needs of present and future computation-intensive applications have stimulated research in new and innovative approaches to the design and implementation of high-performance computing systems. These boundaries between state of the art and innovation constitute the computing frontiers that must be pushed forward to provide the computational support required for the advancement of all science domains and applications. This conference focuses on a wide spectrum of advanced technologies and radically new solutions; it is designed to foster communication among many scientific and technological disciplines.

Authors are invited to submit papers on all areas of innovative computing systems that extend the current frontiers of computer science and engineering and that will provide advanced systems for current and future applications.

Papers are sought on theory, methodologies, technologies, and implementations concerned with innovations in computing paradigms, computational models, architectural paradigms, computer architectures, development environments, compilers, and operating environments. Papers should be submitted to one of the following areas:

* Non-conventional computing
* Next-generation high performance computing, esp. novel high-performance systems (including Cell, GPGPU and custom accelerators)
* Applications, programming models and performance analysis of parallel architectures and novel high-performance systems
* Virtualization and virtual machines
* Grid computing
* Compilers and operating systems
* Workload characterization of emerging applications
* Service oriented architecture (SOA) and system impact
* Supercomputing
* SOC architectures, embedded architectures and special purpose architectures
* Temperature, energy, and complexity-aware designs
* System management and security
* Quantum computing
* Computational biology
* Reconfigurable computing
* Autonomic and organic computing
* Computation intelligence frontiers: theory and industrialapplications
* Fault tolerance and Reliability

Selected papers will be published in a special issue of the HiPEAC journal.

Submitted manuscripts should not exceed 20 double-spaced, single-column pages, including figures, tables, and references. Submission implies that at least one author will register for the conference and present the paper, if accepted. Submissions must be made electronically as Adobe PDF files through the conferenceweb-site, and must not be simultaneously submitted to any other publication outlet.

=========================================================
Computing Frontiers 2008 Committee Information
=========================================================

* General Chair: Alex Ramirez, Universitat Politecnica de Catalunya (UPC)
* Program Chairs: Michael Gschwind, IBM TJ Watson Research Center,
Gianfranco Bilardi, University of Padova

* Finance Chair: Carsten Trinitis, TU M’nchen
* Special Session Chair: Osman Unsal, BSC, ES
* Local Arrangements Chair: Claudia Di Napoli, CNR
* Publicity Chair: Julita Corbalan, UPC
* Liaison Chair for Asia: Hitoshi Oi, University of Aizu
* Registration Chair: Monica Alderighi, INAF
* Publication Chair: Sergio D'Angelo, INAF, IT
* Web Chair: Greg Bronevetsky, LLNL

=========================================================
Important dates
=========================================================

* Paper submission: *December 7, 2007*
* Author notification: *January 18, 2008*
* Final papers due: *February 22, 2008*

=========================================================
Forms / downloads
=========================================================
* Call For Papers: http://www.computingfrontiers.org/docs/cf08_cfp.pdf

=========================================================
Sponsors
=========================================================

Association for Computing Machinery ACM Special Interest Group on Microarchitecture
http://www.acm.org/sigmicro

CFP: First Workshop on Programmability Issues for Multi-Core Computers (MULTIPROG)

noreply@blogger.com (Christopher Brooks) — Wed, 10 Oct 2007 03:34:00 +0000

CALL FOR PAPER

First Workshop on Programmability Issues for Multi-Core Computers (MULTIPROG)

Held in conjunction with the 3rd International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC) Goteborg, Sweden, January 27, 2008

Goal of the Workshop
--------------------
As computer manufacturers are embarking on the multi-core roadmap, which promises a doubling of the number of processors on a chip every other year, the programming community is faced with a severe dilemma. Until now, software has been developed with a single processor in mind and it needs to be parallelized to take advantage of the new breed of multi-core computers. As a result, progress in how to easily harness the computing power of multi-core architectures is in great demand.

This workshop aims to bring together, and cause fruitful interaction between, researchers interested in programming models and their implementation and in computer architecture with the common interest in advancing our knowledge how to simplify the task of parallelization of software for multi-core platforms. A wide spectrum of issues are central themes for this workshop such as what the future programming models should look like to accelerate software productivity and how it should be implemented at the runtime, the compiler, and the architecture level.

We will prioritize papers reporting on on-going work that address cross-cutting issues and that provide thought-provoking insights into the main themes. A special issue that contains the accepted papers is planned for the second issue of Transactions on HiPEAC in June 2008.

Topics of interest
-----------------

Papers are sought on topics including, but not limited to:

* Multi-core architectures
o Architectural support for compilers/programming models
o Processor (core) architecture
o Memory system architecture
o Performance/power issues
* Programming models for multi-core architectures
o Language extensions
o Run-time systems
o Compiler optimizations and techniques
* Applications for multi-core architectures
o Methodologies
o Benchmarking

Organizers
----------

Eduard Ayguade Barcelona Supercomputing Center Spain eduard[at]ac.upc.edu
Roberto Gioiosa Barcelona Supercomputing Center Spain roberto.gioiosa[at]bsc.es
Per Stenstrom Chalmers University of Technology Sweden pers[at]chalmers.se
Osman Unsal Barcelona Supercomputing Center Spain osman.unsal[at]bsc.es

Important dates
---------------
Submission deadline: Oct 5, 2007
Notification to authors: Nov 16, 2007
Final version of accepted papers: Dec 7, 2007

Paper submission
----------------

Submitted papers should use the LNCS format and should be 12 pages maximum. Manuscript preparation guidelines can be found at the LNCS specification web site (go to -> For Authors -> Information for LNCS Authors).
In order to submit your paper go to http://multiprog.ac.upc.edu/CRP/.

Program committee
-----------------

David Bernstein IBM Research Lab in Haifa Israel
Mats Brorsson KTH Sweden
Barbara Chapman University of Houston USA
Marcelo Cintra University of Edinburgh U.K.
Magnus Ekman Sun Microsystems USA
Pascal Felber University of Neuchatel Switzerland
Guang Gao University of Delaware USA
Roberto Georgi University of Siena Italy
Rachid Guerraoui EPFL Switzerland
Erik Hagersten Uppsala University Sweden
Michael Hohmuth AMD - Dresden Germany
Tim Harris Microsoft Research - Cambridge U.K.
Haoquiang Jin NASA Ames USA
Stefanos Kaxiras University of Patras Greece
Ami Marowka Shenkar College of Engineering and Design Israel
Milo Martin University of Pennsylvania USA
Dieter an Mey RWTH, Aachen Germany
Kathy O'Brien IBM Watson Research USA
Mitsuhisa Sato University of Tsukuba Japan
Sanjiv Shah Intel USA
Andre' Seznec IRISA France
Peng Wu IBM Watson Research USA

More details about the workshop can be found at http://multiprog.ac.upc.edu/

EWeek Foundations of Component-based Design slides available

noreply@blogger.com (Christopher Brooks) — Wed, 10 Oct 2007 03:31:00 +0000

The slides from the Embedded Systems Week "Foundations of Component-based Design", workshop in Salzburg are now available.

Honda Initiation Grant Fall Symposium: Mountain View, CA, 11/15

noreply@blogger.com (Christopher Brooks) — Tue, 09 Oct 2007 16:13:00 +0000

The Honda Initiation Grant Fall Symposium will be held on the afternoon of November 15 at the Computer History Museum in Mountain View.

The Honda Initiation Grant (HIG) is a university outreach program designed to develop collaborative research between Honda and members of the academic community. The program typically awards several research grants each year - each between 50 & 100K - and also hosts a Fall Symposium which is set up to promote face-to-face collaboration between Honda executives, associates and university faculty attendees.

Many Honda executives, engineers and scientists will be on hand exhibiting a broad variety of Honda research interest including automotive, computer science, chemistry, materials and aviation technology. In addition to the many research topics, we will be giving a demonstration with the ASIMO humanoid robot, and presenting the HondaJet, world premiere, dynamic large-scale detailed model.

Using model-based design to test auto embedded software

noreply@blogger.com (Christopher Brooks) — Thu, 04 Oct 2007 00:01:00 +0000

The EETimes article, "Using model-based design to test auto embedded software," by Jim Tung of the Mathworks gives a good overview of the issues involved in testing embedded software with a focus on the automotive sector.

CFP: 20th Euromicro, Prague.

noreply@blogger.com (Christopher Brooks) — Mon, 01 Oct 2007 18:08:00 +0000

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CALL FOR PAPERS

20th EUROMICRO CONFERENCE ON REAL-TIME SYSTEMS

http://ecrts08.ecrts.org/

Prague, Czech Republic, July 2-4, 2008

Organised by the Euromicro Technical Committee on Real-time Systems

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* 11 January 2008: Submission deadline for full papers

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THEME AND TOPICS OF INTEREST

The twentieth EUROMICRO Conference on Real-Time Systems (ECRTS'08) is a forum aimed at covering state-of-the-art research and development in real-time computing. Papers on all aspects of real-time systems are welcome. These include, but are not limited to:

APPLICATIONS: consumer electronics; multimedia and entertainment; process control; avionics, aerospace; automotive; telecommunications.

INFRASTRUCTURE AND HARDWARE: communication networks; embedded devices; hardware/software co-design; power-aware and other resource-constrained techniques; systems on chip; time engines and time synchronization; wireless sensor networks.

SOFTWARE TECHNOLOGIES: compiler support; component-based approaches; middleware and distribution technologies; programming languages and operating systems.

SYSTEM DESIGN AND ANALYSIS: modelling and formal methods; probabilistic analysis for RT systems; quality of service support; reliability, security and survivability in RT systems; scheduling and schedulability analysis; worst-case execution time (timing) analysis; validation techniques.

This year we want to continue encouraging the submission of papers on industrial case studies, application of real-time technology on realistic systems, worst-case execution time analysis and measurement, and real-time operating systems implementations. An Advisory Board of representatives from industries will be appointed to evaluate papers with respect to industrial or strategic impact.

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SUBMISSION OF PAPERS

Full papers must be submitted electronically through our web form in pdf format (see "submission page" in http://ecrts08.ecrts.org/). The material must be unpublished and not under submission elsewhere. The paper must be in the same format as in the final published proceedings (10 pages maximum, 2 columns, 10 pt). Papers exceeding the maximum length will not be reviewed. See the submission page for more details.

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CONFERENCE HIGHLIGHTS

Twentieth Anniversary Celebrations.
In recognition of this being the 20th year of this conference a number of special events will be organised. This will include keynote presentations, historical reflections and visions of the future!

Work-in-Progress Session
Pursuing a successful tradition in the ECRTS series, a special Work in Progress (WiP) session will be organised. This session is mainly intended for presentation of on-going and recent work.

Satellite workshops and tutorials

A set of Satellite Workshops will be organized. They are in most cases the continuation of already successful series of workshops, focusing on hot topics.

A separate call for papers will be issued later for both WiP and satellite workshops. Please visit the conference website later for further information.

Awards

In this year's event, besides the Best Paper Award, a selection of best papers will be invited for a Special Issue of an international journal.

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IMPORTANT DATES

Submission of full papers: 11 January 2008

Notification of acceptance: 24 March 2008

Camera-ready paper due: 16 April 2008

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LOCAL INFORMATION

The ECRTS 08 Conference will be held in Prague that is the historical, cultural and industrial center of the Czech Republic. The centre of Prague is compact and intimate, making sightseeing a real pleasure. During a walk through the city, you will be met with a huge number of architectural treasures, representative of Prague's rich and varied history. There are Romanesque, Gothic, Renaissance, Baroque and Classicist buildings, as well as various neo-historic styles and Art Nouveau.

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ORGANISERS

GENERAL CHAIR
Zdenek Hanzalek, Czech Technical University in Prague,
Czech Republic, hanzalek@fel.cvut.cz

PROGRAM CHAIR
Alan Burns, University of York, UK
burns@cs.york.ac.uk

REAL-TIME TECHNICAL COMMITTEE CHAIR
Gerhard Fohler, Kaiserslautern University of Technology, Germany
fohler@eit.uni-kl.de

PROGRAM COMMITTEE MEMBERS:

Tarek Abdelzaher, University of Illinois at Urbana Champaign, USA
Luis Almeida, Universidade de Aveiro, Portugal
James H. Anderson, The University of North Carolina at Chapel Hill, USA
Neil Audsley, University of York, UK
Karl-Erik Arzen, Lund University, Sweden
Theodore P. Baker, Florida State University, USA
Sanjoy Baruah, The University of North Carolina, USA
Luca Benini, Universiti di Bologna, Italy
Scott Brandt, University of California, Santa Cruz, USA
Render Bril, Technische Universiteit Eindhoven, The Netherlands
Georgio Buttazzo, Scuola Superiore Sant'Anna, Italy
Samarjit Chakraborty, National University of Singapore, Singapore
Maryline Chetto, IUT de Nantes, France
Jean-Dominique Decotignie, CSEM, Switzerland
Rolf Ernst, TU Braunschweig, Germany
Gerhard Fohler, Technische Universitaet Kaiserslautern, Germany
Steve Goddard, University of Nebraska, USA
Jan Gustafsson, at Mälardalen University, Sweden
Michael González Harbour, Universidad de Cantabria, Santander, Spain
Hermann Härtig, TU Dresden, Germany
Tei-Wei Kuo, National Taiwan University, Taiwan
George Lima, Federal University of Bahia (UFBA), Brasil
Giuseppe Lipari, Scuola Superiore Sant'Anna, Italy
Julio Medina, Universidad de Cantabria, Santander, Spain
Frank Muller, North Carolina State University, USA
Stefan Petters, National ICT, Australia
Michale Pont, University of Leicester, UK
Isabelle Puaut, University of Rennes / IRISA, France
Peter Puschner, Technische Universitaet Wien, Austria
Krithi Ramamritham, IIT Bombay, India
Pascal Richard, University of Poitiers, France
Rodrigo Santos, Universidad Nacional del Sur-CONICET, Argentina
Eduardo Tovar, Polytechnic Institute of Porto, Porto, Portugal
Tullio Vardanega, University of Padua, Italy
Rich West, Boston University, USA

EETimes: Software stuck at C, No parallel languages for multi-core on horizon

noreply@blogger.com (Christopher Brooks) — Mon, 01 Oct 2007 17:35:00 +0000

The EETimes article, "Embedded software stuck at C, No parallel languages for multi-core on horizon," discusses a panel at Power Architecture Developer Conference. The panel discusses some of the impediments to multicore programming. David Kleidermacher, chief technology officer of Green Hills Software, is quotes as saying, "Eighty-five percent of all embedded developers use C or C++. Any other language is a non-starter, ... I don't have much hope a new parallel language will get a foothold." This points out the opportunity for coordination languages and for new machine architectures such as Precision Timed Machines (PRET).

Position Statement for Panel on Grand Challenges in Embedded Software

noreply@blogger.com (Christopher Brooks) — Mon, 01 Oct 2007 15:44:00 +0000

Professor Edward A. Lee presented the following position statement at EMSOFT 07 in Salzburg, Austria, Oct. 1, 2007. A PDF version is also available.

Abstractions currently used in computing hide timing properties of software. As a consequence, computer scientists have developed techniques that deliver improved average-case performance and/or design convenience at the expense of timing predictability. For embedded software, which interacts closely with physical processes, timing is usually an essential property. Lack of timing in the core abstractions results is brittle and non-portable designs. Moreover, as embedded software becomes more networked, the prevailing empirical test-based approach to achieving real-time computing becomes inadequate.

I believe it is necessary to reintroduce timing predictability as a first-class property of embedded processor architectures. Architectures currently strive for superior average case performance that regrettably ignores predictability and repeatability of timing properties. "Correct" execution of a C program has nothing to do with how long it takes to perform any particular action. C says nothing about timing, so timing is not considered part of correctness. Architectures have developed deep pipelines with speculative execution and dynamic dispatch. Memory architectures have developed multi-level caches and TLBs. The performance criterion is simple: faster (on average) is better.

The biggest consequences have been in embedded computing. Avionics offers an extreme example: in "fly by wire" aircraft, where software interprets pilot commands and transports them to actuators through networks, certification of the software is extremely expensive. Regrettably, it is not the software that is certified but the entire system. If a manufacturer expects to produce a plane for 50 years, it needs a 50-year stockpile of fly-by-wire components that are all made from the same mask set on the same production line. Even a slight change or "improvement" might affect timing and require the software to be re-certified. All users of embedded software face less extreme versions of this problem. Upgrading an engine controller in a car to a newer micro-processor, for example, often requires substantial redesign of the software and thorough retesting. Even "bug fixes" in the software can be extremely risky, since they can change timing behavior.

Designers have traditionally covered these failures by finding worst case execution time (WCET) bounds and using real-time operating systems (RTOS's). But these require substantial margins for reliability, and ultimately reliability is (weakly) determined by bench testing of the complete implementation. Moreover, WCET has become an increasingly problematic fiction as processor architectures develop ever more elaborate techniques for dealing stochastically with deep pipelines, memory hierarchy, and parallelism.

The reader may object that there are no true "guarantees" in life, so the correct solution should be to accept timing variability and to build in robustness. However, synchronous digital hardware--the technology on which most computers are built--can deliver astonishingly precise timing behavior with reliability that is unprecedented in any other human-engineered mechanism. Software abstractions, however, discard several orders of magnitude of precision. Compare the nanosecond-scale precision with which hardware can raise an interrupt request to the millisecond-level precision with which software threads can respond.

To fully exploit such timing predictability would require a significant redesign of much of computing technology, including operating systems, programming languages, compilers, and networks. I believe we must start by creating a new generation of processors whose temporal behavior is as easily controlled as their logical function. We call them precision timed (PRET) machines [1]. Our basic argument is that real-time systems, in which temporal behavior is as important as logical function, are an important and growing application; processor architecture needs to follow suit.

Of course, timing precision is easy to achieve if you are willing to forgo performance; the engineering challenge in PRET machines is to deliver both precision and performance. In [1], we argue that the problem should be first tackled from the hardware design perspective, developing precision timed (PRET) machines as soft cores on FPGAs. The near term goal would be that software on PRET machines be integrated with what would traditionally have been purely hardware designs. This provides a starting point for a decades-long revolution that will make timing predictability an essential feature of computing.

REFERENCES

[1] S. A. Edwards and E. A. Lee, "The case for the precision timed (PRET) machine," In Design Automation Conference (DAC), San Diego, CA, 2007.

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