Complete Electronics

2011-01-31T23:02:00.000-08:00

Direct memory access (DMA)

Direct memory access is a bus operation that permits reads and writes which are not controlled by the CPU. After gaining control, The DMA controller performs read and write operations directly between device and memory. DMA contoller initially ask for ownership of the bus to CPU through a bus request. On granting permissuion, DMA controller receives bus grant signals. CPU turns DMA controller to a bus master. Bus master is a device that can initiate its own bus transfer. Now DMA controller can perform reads and writes using a bus protocol. DMA controller includes three registers namely starting address register, length register and status register.

Direct memory access(DMA)

2010-09-28T20:54:00.000-07:00

Direct memory access(DMA)

This is a bus operation. This allows reads and writes which are not controlled by the CPU. Here we require a DMA controller which requests control of the bus from the CPU. DMA controller performs operations directly between devices and memory. An input to the CPU which DMA controller uses for asking ownership of the bus is known as bus request. The response of bus is known as bus grant. Bus master initiates bus transfer. A classic four-cycle handshake is employed by DMA controller to gain control of the bus. The main three registers in DMA controller performs tasks like beginning of transfer ( starting address register), specifying the number of words to be transferred ( length register) and DMA controller link to CPU (status register).

Geopositioning,remote sensing and electronics

2010-09-27T21:08:00.000-07:00

2D image processing by a digital computer is an interesting discussion topic. Digital processing of some particular two-dimensional data involves many steps.