Design Notes - EEWeb

Design Guidelines for 100 Gbps - CFP2 Interface

2013-05-23T07:41:44-07:00

The common electrical interface CEI~~28G~~VSR implementation architecture (IA) for short reach channels is intendedfornext generation100 Gbps chip- to – opticalmodule applications. CFP2 is apluggable optical module that uses CEI~~28G~~VSR as its electrical interface (as defined by the CFP Multi-Source Agreement (MSA)member companies).CFP2alsodefinesthemechanical formfactorfora100 Gbpsoptical transceiver module targeted for Ethernet and OTN (Optical Transport Network) applications. CFP2 provides an industry standard to develop next generation 100 G interfaces with lower power and greater port density compared to previous generation CFP optical modules. The channel layout on the PCB is optimized in order to meet the strict insertion and return loss masks defined by CEI~~28G~~VSR. Refer to the following documents for more information on optimizing your board designs for high speed serial links.

Getting Started with AT91SAM9XE Microcontrollers

2013-05-22T07:00:34-07:00

This section describes how to program a basic application that helps you to become familiar with AT91SAM9XE microcontrollers. It is divided into two main sections: the first one covers the specification of the example (what it does, what peripherals are used), the other details the programming aspect. 3.1 Specification 3.1.1 Features The demonstration program makes two LEDs on the board blink at a fixed rate. This rate is generated by using a timer for the first LED. The second one uses a Wait function based on a 1 ms tick. The blinking can be stopped using two buttons (one for each LED). While this software may look simple, it uses several peripherals which make up the basis of an operating system. As such, it makes a good starting point for someone wanting to become familiar with the AT91SAM microcontroller series. 3.1.2 Peripherals In order to perform the operations described in the previous section, the software example uses the following set of peripherals: • Parallel Input/Output (PIO) controller • Timer Counter (TC) • Periodic Interval Timer (PIT) • Advanced Interrupt Controller (AIC) • Debug Unit (DBGU) LEDs and buttons on the board are connected to standard input/output pins of the chip; those are managed by a PIO controller. In addition, it is possible to have the controller generate an interrupt when the status of one of its pins changes; buttons are configured to have this behavior. The TC and PIT are used to generate two time bases, in order to obtain the LED blinking rates. They are both used in interrupt mode: the TC triggers an interrupt at a fixed rate, each time toggling the LED state (on/off). The PIT triggers an interrupt every millisecond, incrementing a variable by one tick. The Wait function monitors this variable to provide a precise delay for toggling the second LED state.

Integrated Debugging- A New Approach to Troubleshooting Your Designs with Real-Time Oscilloscopes

2013-05-21T13:55:02-07:00

Traditional jitter analysis software provides you valuable information about jitter trends (temporal fluctuation of jitter), and the jitter spectrum (frequency component of jitter). It can also separate RJ and DJ. You can use the software to figure out how much jitter your device has, and if it meets the specification in question. But when you want to reduce jitter, you have to find out what is causing it. You may have an idea of the causes by looking at the peak frequencies of the jitter spectrum. However if the jitter is not systemic but intermittent, the root cause is difficult to determine. Eye pattern tools recover the clock of the signal, make an eye pattern and make mask tests. When the eye fails the mask test, you can unfold the waveform to see when it fails. You can also decode 8b10b coding. Using this approach you can check if mask test failures and waveform patterns have correlations. But if there is no correlation, you cannot find the cause of the mask failure. As you have seen, using features of your oscilloscope separately limits your debugging ability. These tools lack power working alone, and you need to combine them to use the full power of your oscilloscope. Case study 1: Combining jitter analysis tool with oscilloscope general measurements. You know that your device has large quantities of jitter on the DDR memory clock, and this causes problems. You want to improve the situation. Using jitter analysis measurements, you pinpoint the exact value of the jitter, but you can’t figure out what is behind it. You can guess that this is periodic jitter by the shape of the histogram. The jitter trend also shows that there is periodic noise on the clock. Next, you use your oscilloscope’s general purpose tools to look at several signal waveforms at the same time. You then probe some signals you suspect could be contributing jitter, and show them on the scope. A browser probe is convenient at times like this. You check to see if the suspected signal and the clock jitter trend have any correlation. If there is a correlation, the signal you are probing is the cause of the jitter. If there is no correlation, you continue probing until you find the source of jitter.

Implementing Memory Structures for Video Processing in the Vivado HLS Tool

2013-05-20T08:18:39-07:00

Video processing algorithms, which are predominantly computation intensive, are natural candidates for hardware implementation with the HLS tool. The techniques described in this application note cover the basics of video algorithm implementation in the HLS tool in terms of synchronization signal handling and memory architectures. Regardless of the exact computation in the user algorithm, these types of applications are memory intensive. The memory architecture expressed in the algorithm has a direct correlation to overall system performance and hardware resource consumption. The recommendations on memory buffer architecture presented in this application note are applicable to Vivado HLS designs on all Xilinx FPGAs. Introduction The Vivado HLS tool provides a methodology for implementing video and image processing blocks in Xilinx FPGAs. The HLS tool enables the creation of accelerators targeted at different performance points and different FPGAs from the same algorithmic code. For video and image processing, different performance targets can be specified in terms of maximum image resolution and frames per second. This application note focuses on the following aspects of video processing IP creation in the HLS tool: • Overview of the basic video frame format and its description in C/C++ • Memory architecture specification for high-throughput processing The video processing IP core can be controlled from a processor using application program interfaces (APIs) generated by the HLS tool. For more information on processor control of Vivado HLS IP, refer to Processor Control of Vivado HLS Designs.

Designing High-Performance Video Systems in 7 Series FPGAs

2013-05-17T13:19:41-07:00

The design uses eight AXI video direct memory access (VDMA) engines to simultaneously move 16 streams (eight transmit video streams and eight receive video streams), each in 1920 × 1080 pixel format at 60 or 75 Hz refresh rates, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the onboard high-definition media interface (HDMI) video display interface through the color space converter. The performance monitor block is added to capture DDR performance metrics. DDR traffic is passed through the AXI Interconnect to move 16 video streams over 8 VDMA pipelines. All 16 video streams moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Kintex-7 FPGA XC7K325TFFG900-1 on the Xilinx KC705 evaluation board (revision C or D) [Ref 1]. Included Systems The reference design is created and built using version 14.3 of the Xilinx Platform Studio (XPS) tool, which is part of the ISE® Design Suite: System Edition. In addition to the XPS project, an equivalent Vivado™ tools logic design flow project is also provided for reference. The XPS tools delivered in the Vivado Design Suite: System Edition (EDK) might provide a higher level of automation than building the equivalent system using the Vivado tools logic design flow. Creation of the reference design using the Vivado tools logic design flow is described in detail in Building Hardware, page 16. The design also includes software built using the Xilinx Software Development Kit (SDK). The software runs on the MicroBlaze processor subsystem and implements control, status, and monitoring functions. Complete XPS and SDK project files are provided with this application note to allow the user to examine and rebuild the design or to use it as a template for starting a new design. Introduction High-performance video systems can be created using Xilinx AXI IP. The use of AXI Interconnect, Memory Interface Generator (MIG), and VDMA IP blocks can form the core of video systems capable of handling multiple video streams and frame buffers sharing a common DDR3 SDRAM memory. AXI is a standardized IP interface protocol based on the Advanced Microcontroller Bus Architecture (AMBA®) specification. The AXI interfaces used in the reference design consist of AXI4, AXI4-Lite, and AXI4-Stream interfaces as described in the AMBA AXI4 specifications [Ref 2]. These interfaces provide a common IP interface protocol framework around which to build the design.

Apple iPad Remote Control for Broadcasting T&M Instruments

2013-05-16T12:27:51-07:00

Remote desktop access is a convenient way to remotely control Rohde & Schwarz measuring instruments over a network. When using WLAN, this function can also be used with an Apple iPad running a remote desktop app. One particularly appealing possibility is to set up a measuring instrument with a USB WLAN adapter. In addition to standard “infrastructure” mode for use with a dedicated access point, these adapters also support “ad hoc” mode, making it possible to connect to an iPad, without needing any additional external devices. The connection only has to be configured once. The settings are then saved so that the connection is started directly after switching on the instrument. This simplifies access to instruments without dedicated displays and offers a simple, detached solution for operating measuring instruments installed in places that are difficult to reach.

Calculating Motor Driver Power Dissipation

2013-05-15T12:20:33-07:00

When selecting a motor driver IC for a particular application, consider the maximum amount of current that must be driven. The thermal characteristics of the IC and PCB are often the limiting factor in how much current a given motor driver provides. When an output transitions from high to low or low to high, the output devices traverse a linear region where they are dissipating significantly more power than when fully turned on. This power dissipation is referred to as switching loss. Switching loss is a function of the following: • rise and fall times of the output, how quickly the output swings from one extreme to the other • supply voltage • output current • frequency that the output is switching In some cases, such as a DC motor driver that is only turned on or off (not subjected to PWM speed control or current control), this rate may be so small as to be negligible. On the other extreme, for example a stepper motor driver using current control, the outputs are always being switched at some PWM frequency to maintain current regulation.

Sources of Power Dissipation in a Motor Driver There are a number of sources of power dissipation inside a motor driver IC. Some are obvious, like the power dissipated in the FET ON-resistance, others are more subtle. To make an accurate assessment of the total power dissipation, all sources must be considered. 1.1 RDS Dissipation The biggest source of power dissipated inside a motor driver IC is the power dissipated in the FET ONresistance, or RDS. The power dissipated in an H-bridge (consisting of a high-side FET and a low-side FET) is calculated with the following: PRDS = (HS-RDS × (IOUT) 2 ) + (LS-RDS × (IOUT) 2 ) where PRDS is the power dissipated in the output FETs, HS-RDS is the resistance of the high-side FET, LS-RDS is the resistance of the low side FET, and IOUT is the RMS output current being applied to the motor. Note that RDS increases with temperature, as the device heats, the power dissipation increases. This must be considered when calculating the total device power dissipation. If a device has two H-bridges, like a typical stepping motor driver, you need to add the power dissipated in each H-bridge. 1.2 Switching Losses When an output transitions from high to low or low to high, the output devices traverse a linear region where they are dissipating significantly more power than when fully turned on. This power dissipation is referred to as switching loss. Switching loss is a function of the following: • rise and fall times of the output, how quickly the output swings from one extreme to the other • supply voltage • output current • frequency that the output is switching In some cases, such as a DC motor driver that is only turned on or off (not subjected to PWM speed control or current control), this rate may be so small as to be negligible. On the other extreme, for example a stepper motor driver using current control, the outputs are always being switched at some PWM frequency to maintain current regulation.

Base of Electrostatic Capacitance Method Touch Key

2013-05-14T08:18:18-07:00

The Touch panel microcomputer R8C/33T group contains a hardware peripheral (SCU:sensor control unit) that monitors the ”touch” of the human body by measuring the stray capacitance generated between the touch electrode and the human. The electrostatic capacitance method is the general principle used in “Touch” measurements. The touch electrode is formed with materials such as PCB (printed circuits board), ITO (Indium Tin Oxide) films and electroconductive rubbers. The electric capacitance generated between the touch electrode and the human body is measured and a key ON or OFF judgement is made. As an application example, there are matrix keys, sliders, a wheel, etc. when the detection of movement around the circumference is desired, the wheel is used. When a lot of keys are necessary, the matrix configuration is used. The touch key matrix is like the key scanning matrix used with mechanical switches. When detection of movement of the finger that is the top to bottom or right and left is desired, the slider is used, and when the detection of movement around the circumference is desired, the wheel is used.

Practical Considerations For Attaching Surface-mount Components

2013-05-13T15:42:42-07:00

What automated soldering methods can be considered for Mini-Circuits surface-mount components? There are two basic methods: reflow and wave soldering. Generally, reflow soldering can be done when (l) there are only surface mount components, or (2) these are present together with through-hole components and the latter will be soldered in a separate (wave soldering) step. The surface-mount components can be located on both the upper and lower sides of the board, when reflow is used. Wave soldering is suitable for through-hole components mounted on top of the board as well as for surface-mount components on the bottom of the board. Both ceramic and polymer-based boards can be accommodated. reflow Reflow requires applying a controlled amount of solder and flux to the areas where connections are to be made. A common technique is to print a pattern of solder paste on the board, and then put the components onto their places. They tend to stay in position because of the stickiness of the paste. Optionally, components can be held with chip-bonding epoxy. When heat is applied, it must produce a time-temperature profile suitable for accomplishing several process steps. First, solvent evaporation is done at temperatures up to about l00o C. Second, flux reduces metal oxides as temperature rises to the solder melting point, typically l83o C. Third, as temperature continues to rise, the solder particles in the paste melt and wetting and wicking in the joint area begin. In the next step when temperature reaches a peak around 215o, surface tension shapes the fillet of fully molten solder. It takes only a few seconds for proper solder wetting at that temperature. The length of time that the work is actually above 200o is usually limited to one or two minutes to avoid damage. Many plastic encapsulated components can withstand several minutes of solder-melt temperature when re-flowed. Even at the higher temperature experienced in wave soldering such components tend to withstand several seconds immersion in molten solder. There are several techniques for applying the heat needed for re-flow. Two of the most common are infrared and vapor phase. Infrared heat sources operate at very high temperature and are placed at the inner walls of the chamber, not in contact with the work. The actual temperature of the work is strongly affected by its mass, geometry and composition, as well as bel speed. Organic materials such as epoxy-based boards tend to absorb the IR radiation and conduct the heat to metal parts which, by themselves, would tend to reflect the IR away. On the other hand, in the vapor-phase soldering process the vapor surrounding the work is maintained at the optimum solder-wetting temperature. This is accomplished by boiling an inert liquid in a tank. The boiling point is approximately 215o C. When the work is held in the vapor just above the liquid, the heat at that temperature is transferred to all surfaces quite uniformly

Serial Bootloader for PIC24F Devices

2013-05-10T15:32:20-07:00

One of the advantages of Microchipís PICÆ microcontrollers with self-programmable enhanced Flash memory is the ability to implement a bootloader. This allows designers to implement applications that can be updated many times over, potentially extending the application ís useful lifetime. This application note describes a serial bootloader for 16-bit PIC24F devices using the UART module as a communication channel. The bootloader application uses the communication protocols originally outlined in Microchip Application Note AN851, ìA Flash Bootloader for PIC16 and PIC18 Devicesî. Some modifications to the original protocol have been made to maintain compatibility with the PIC24 architecture. It has also been redesigned to accommodate the current generation of PIC24FJ Flash microcontrollers, as well as the next generation of PIC24F devices. FIRMWARE Basic Operation. Data is received through the UART module and passed through the transmit/receive engine. The engine filters and parses the data, storing the information into a data buffer in RAM. The command interpreter evaluates the command information within the buffer to determine what should be done (e.g., Is the data written into memory? Is data read from memory? Does the firmware version need to be read?). Once the operation is performed, reply data is passed back to the transmit/receive engine to be transmitted back to the source, closing the software flow control loop.

Powerline Communications for Street Lighting Automation

2013-05-09T15:27:11-07:00

Street lighting in its many forms—roadway lighting, tunnel lighting, car park lighting, and urban lighting— is a major consumer of electricity. All outdoor lighting is, in fact, estimated to comprise 19% of worldwide electricity usage today. For municipalities and businesses with large facilities, street lighting is a significant portion of operational expenses. Street lighting is also a vital part of public safety. Ensuring that street lights are reliably on and at the optimal illumination level for pedestrian and vehicle traffic is critical to public safety and the operators’ liability. As a result, any improvements to energy usage, operational reliability, and maintenance costs provide significant payback for the organizations responsible for that street lighting. There are, of course, obvious added benefits to the environment as energy usage is lowered. Powerline communication (PLC) is the natural choice for automating street lighting networks. PLC enables companies and municipalities to reduce operational costs and improve safety. G3-PLC is a new OFDM~~based PLC system designed for grid automation that dramatically extends the range, data rate, and performance of powerline communications. This article discusses the benefits of a G3~~PLC-based automation system and presents a real-world example of a system for reducing energy usage and lowering maintenance costs in tunnels. The basic system design is explained and key performance parameters discussed. A transceiver optimized for PLC automation is presented.

Current Sense Circuit Collection

2013-05-08T15:16:15-07:00

Sensing and/or controlling current flow is a fundamental requirement in many electronics systems, and the techniques to do so are as diverse as the applications themselves. This Application Note compiles solutions to current sensing problems and organizes the solutions by general application type. These circuits have been culled from a variety of Linear Technology documents. Circuits Organized by General Application Each chapter collects together applications that tend to solve a similar general problem, such as high side current sensing, or negative supply sensing. The chapters are titled accordingly (see “Circuit Collection Index” below). It is unlikely that any particular circuit shown will exactly meet the requirements for a specific design, but the suggestion of many circuit techniques and devices should prove useful. Specific circuits may appear in several chapters if they have broad application.

Loading Configuration Files in a Manufacturing Environment

2013-05-08T14:58:57-07:00

The methodology for loading a configuration file into a Zilker Labs Digital-DC device during low-volume engineering / validation phase and for the high-volume production phase is the same except for the hardware used to load the data into the devices. For the low-volume / validation phase, Zilker Labs has developed a socketed programming station called ZLProgrammer for loading configuration files. For high-volume production, industry standard programmers, such as BP Microsystems programmers, are used to load configuration files. The available software tools and associated hardware are described later in this document. In general, the steps for loading a configuration file into a Zilker Labs device are: 1. Using the PowerNavigator™ evaluation software, configure and optimize the design. 2. Save the configuration file. 3. Edit the configuration file using any text editor, adding Password and Operation commands, if required. See AN33 for use of the Password and Operation commands. 4. If using a ZLProgrammer, use the ConfigZL™ software to load the configuration file and configure devices. If using a commercial programmer, follow step 5 below. 5. If using an industry standard production programming system, convert the configuration file to ASCII Hex using ZLHLD Generator (Figure 5 shows a screen shot of the ZLHLD Generator and Figure 3 shows an example of an output file). 6. In the event of a communication error, commercial programmer or ZLProgrammer will provide an error message.

Power MOSFET Basics

2013-05-06T14:49:29-07:00

Discrete power MOSFETs employ semiconductor processing techniques that are similar to those of today’s VLSI circuits, although the device geometry, voltage and current levels are significantly different from the design used in VLSI devices. The metal oxide semiconductor field effect transistor (MOSFET) is based on the original field-effect transistor introduced in the 70s. The invention of the power MOSFET was partly driven by the limitations of bipolar power junction transistors (BJTs) which, until recently, was the device of choice in power electronics applications. Although it is not possible to define absolutely the operating boundaries of a power device, we will loosely refer to the power device as any device that can switch at least 1A. The bipolar power transistor is a current controlled device. A large base drive current as high as one-fifth of the collector current is required to keep the device in the ON state. Also, higher reverse base drive currents are required to obtain fast turn-off. Despite the very advanced state of manufacturability and lower costs of BJTs, these limitations have made the base drive circuit design more complicated and hence more expensive than the power MOSFET.

Cyclic Redundant Checker Calculation

2013-05-03T14:39:26-07:00

Big-endian versus littleendian: what does it mean? The difference is in how data is stored in the memory. Little-endian stores low significant bytes in the lower addresses and big-endian stores more significant bytes in the lower addresses. The collision can appear when data is stored in big-endian but the device works with them in the little-endian or on the contrary. Formats in which data is stored and the device works are very important. Figure 2 shows data stored in big-endian but read in little-endian. It is visible that the number 0xA2E826EF is not equal to the 0xEF26E8A2. The same collision will appear when data would be stored in little-endian and the device works in big-endian.

Designing an Inverting Power Supply

2013-05-02T14:28:36-07:00

Applications such as bipolar amplifier, optical module, CCD bias, and OLED displays usually require a negative output voltage from a positive input voltage. Designers of power management systems need versatile switching controllers and regulatorsthat allow them to solve these power management challenges. The ADP2384 and ADP2386 switching regulators from Analog Devices, Inc., provide synchronous buck functionality. This rangesfrom 20 V input voltage down to 0.6 V output voltage at up to 4 A for the ADP2384 and up to 6 A for the ADP2386 of output current at the switching frequency range of from 200 kHz to 1.4 MHz. Although targeted for synchronous step-down applications, the versatility of the ADP2384 and ADP2386 allows these partsto realize an inverting buck-boosttopology, which can generate a negative output voltage from a positive input voltage, without additional cost, component count, or solution size. In addition, the synchronous topology has certain advantages over the asynchronous topology,such as higher efficiency at low output voltages and lower noise at light load operation. The synchronous topology remains in continuous conduction mode (CCM) in both light load and heavy load operation while the asynchronous topology encounters discontinuous conduction mode (DCM) and pulse skip mode (PSM) with the decrease of the output load current, which can be noisier than CCM. This application notes describeshow to implement the ADP2384/ ADP2386 in a synchronous inverting buck-boost topology to generate negative output voltages frompositive input power supplies.In addition, some concerns and possible solutions are discussed.

NAND Flash Support in SAM3X Microcontrollers

2013-05-01T14:18:16-07:00

The purpose of this application note is to introduce the NAND Flash memory technology and describe hardware and software requirements to interface NAND Flash memory with Atmel® SAM3X ARM® Cortex-M3®-based Microcontrollers that features an Embedded NAND Flash Controller. The SAM3X microcontroller family features an External Bus Interface (EBI) providing NAND Flash protocol support via the Static Memory Controller (SMC) and embedded NAND Flash Controller. It also contains an Error Corrected Code Controller (ECC) which performs data error identification and single bit correction.

Calibrating a Three-Phase Energy Meter Based on the ADE7880

2013-04-24T09:35:30-07:00

The ADE7880 is a high accuracy, 3-phase electrical energy measurement IC with serial interfaces and three flexible pulse outputs. The ADE7880 device incorporates second order sigma-delta (Σ-Δ) analog-to-digital converters (ADCs), a digital integrator, reference circuitry, and all of the signal processing required to perform the total (fundamental and harmonic) active, and apparent energy measurements, rms calculations, as well as fundamental-only active and reactive energy measurements. In addition, the ADE7880 computes the rms of harmonics on the phase and neutral currents and on the phase voltages, together with the active, reactive, and apparent powers, and the power factor and harmonic distortion on each harmonic for all phases. Total harmonic distortion plus noise (THD + N) is computed for all currents and voltages.

Using the Transceiver Reconfiguration Controller for Dynamic Reconfiguration in Arria V and Cyclone

2013-04-23T09:25:01-07:00

The Altera® Transceiver Reconfiguration Controller dynamically reconfigures the transceiver PHY in Arria® V and Cyclone® V devices. You can use the dynamic reconfiguration features to reconfigure the transceiver channels to support multiple or different data rates and physical medium attachment (PMA) settings without interrupting adjacent transceiver channels or powering down the transceiver channels. The reconfiguration methods are similar between Arria V, Cyclone V, and Stratix® V devices. The features supported in Arria V and Cyclone V devices are a subset of those supported in Stratix V devices. You can dynamically change the transceiver setting using either register-based or streamer-based reconfiguration. Both methods use a sequence of Avalon® -MM writes and reads to update the transceiver settings.

Getting Started with the AT91SAM9263 Microcontroller

2013-04-23T07:17:37-07:00

This application note is intended as an aid in familiarizing the user with the Atmel ARM® Cortex® M3-based SAM3N series of microcontrollers. It describes in detail a simple project that uses several important features present on the SAM3N MCU, including how to set up the microcontroller prior to executing the application, as well as adding functionality. After examination of this application note, the reader should be able to successfully start a new project from scratch. This application note also explains how to setup and use a GNU ARM toolchain in order to compile and run a software project. Note that the getting started example has been ported and is included in IAR® Embedded Workbench for ARM (EWARM) and Keil® MDK-ARM development kit.

Getting Started with the AT91SAM9263 Microcontroller

2013-04-23T07:17:10-07:00

The Truth About the Fidelity of High-Bandwidth Voltage Probes

2013-04-22T08:13:49-07:00

This application note is intended for users of highbandwidth voltage probes. It presents an analysis of high-bandwidth voltage probes that is detailed enough to accurately describe their behavior, yet is simple enough to maintain a clear understanding of what is going on and why. The analysis reveals a fundamental tradeoff between fidelity and ease of use that exists with all high-bandwidth probes. A new topology that alleviates this fundamental tradeoff will be presented, along with measurements that compare the new topology to older ones. Figure 1 shows a picture of a probe and oscilloscope measuring the voltage between a point on the leg of a surface-mounted device and a ground plane. First of all, the exact location of the probe input needs to be clearly defined. When accessories such as pins or short wires are used to connect a probe to a circuit, the exact location of the probe input can become ambiguous. Is it on the probe side or the circuit side of a short wire? What is being measured is the voltage between two points on a circuit, hence the input of the measuring device is, by definition, at the points where the probe connects to the circuit.

High Precision Calibration of a Three-Axis Accelerometer

2013-04-11T15:38:42-07:00

Three-axis accelerometers supplied for the consumer market are typically calibrated by the sensor manufacturer using a six-element linear model comprising a gain and offset in each of the three axes. This factory calibration will change slightly as a result of the thermal stresses during soldering of the accelerometer to the circuit board. Additional small errors, external to the accelerometer, including rotation of the accelerometer package relative to the circuit board and misalignment of the circuit board to the final product, will also be introduced during the soldering and final assembly process. The original factory accelerometer calibration will still be adequate for the vast majority of consumer applications. Manufacturers of premium products looking to obtain improved accuracy from a consumer accelerometer may, however, wish to perform their own calibration either by repeating the calibration performed by the accelerometer manufacturer or by using a more sophisticated calibration model.

OpAmps for MEMS Microphone Preamp Circuits

2013-04-09T10:48:45-07:00

A microphone preamp circuit is used to amplify a microphone’s output signal to match the input level of the devices following it in the signal chain. Matching the peaks of the microphone’s signal level to the full-scale input voltage of an ADC makes maximum use of the ADC’s dynamic range and reduces the noise that subsequent processing may add to the signal. A single op amp can be easily used in a circuit as a preamp for a MEMS microphone output. The MEMS microphone is a single ended output device, so a single op amp stage can be used to add gain to the microphone signal or just to buffer the output. This application note covers some of the key op amp specifications to consider in a preamp design, shows a few basic circuits, and provides a table of Analog Devices, Inc., op amps that may be appropriate for a preamp design. The ADMP 504 MEMS microphone is used as an example in this application note to describe different design choices. This is an analog microphone with 65 dB SNR. Designs using different microphones may require adjustment from whatis described in this application note, depending on the microphone noise, sensitivity, maximum acoustic input and other specifications. For more information on Analog Devices MEMS microphones, see http://www.analog.com/mic. An op amp data sheet has many different specifications and performance graphs, so it can be overwhelming to try to find exactly which of these specs matter for your application. For a microphone preamp design, there are a few specs that matter more than others; these specs are reviewed here. Noise An op amp’s noise spec is given for both voltage noise and current noise. Typically, you only need to concern yourself with an op amp’s voltage noise in a preamp design. The current noise becomes limiting in the design only when high value (that is, noisy) resistors are used. To keep the overall noise of the circuit low, typically resistors with values less than 10 kΩ are used. The voltage noise of an op amp is specified as a noise density unit of nV/√Hz. To get the device noise in the circuit’s bandwidth of interest, you need to multiply this noise density by the square root of the bandwidth.

High-Speed Link Tuning Using Signal Conditioning Circuitry in Stratix V Transceivers

2013-04-08T01:00:58-07:00

Backplane systems introduce insertion loss, reflections, and crosstalk to channel data, which degrade the signal’s integrity. All of the above losses reduce the eye opening at the receiver (RX). The non-uniform loss over frequencies also causes inter-symbol interference (ISI). Stratix V transceivers are designed with link tuning features to handle channel degradation for data rates up to 12.5 Gbps. The link tuning features are as follows: • Programmable transmitter (TX) voltage output differential (VOD) and pre-emphasis • Continuous time linear equalizer (CTLE) or adaptive equalizer (AEQ) • Decision feedback equalizer (DFE).