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		<title>EDN - Practical Chip Design</title>
		<link>http://www.edn.com</link>
		<pubDate>Wed, 16 May 2012 11:57:26 MDT</pubDate>
		<description />
		<language>eng</language>
		<copyright>Copyright 2012 UBM Canon. Subject to its Terms of Use (http://www.edn.com/info/terms-and-conditions.php)</copyright>
		


									
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			<title>Top-down analog flows. Myth or reality?</title>
			<link>http://www.edn.com/blog/Practical_Chip_Design/41761-Top_down_analog_flows_Myth_or_reality_.php?rssid=20882</link>
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			<pubDate>Wed, 02 May 2012 17:00:42 GMT</pubDate>
										<description>There are very few designs these days that are not mixed-signal, meaning that analog functionality has been integrated onto the same die as digital logic. This is being done for several reasons,...</description>
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			<title>June Conferences: DAC and Symposium on VLSI Technology and Circuits</title>
			<link>http://www.edn.com/blog/Practical_Chip_Design/41735-June_Conferences_DAC_and_Symposium_on_VLSI_Technology_and_Circuits.php?rssid=20882</link>
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			<pubDate>Mon, 23 Apr 2012 18:25:37 GMT</pubDate>
										<description>Before we know it, it will be summer and that means conferences. First there is the Design Automation Conference (DAC) in San Francisco from June 3 until June 7 and then if you need to be warmed...</description>
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			<title>Power integrity -- How much does it matter?</title>
			<link>http://www.edn.com/blog/Practical_Chip_Design/41725-Power_integrity_How_much_does_it_matter_.php?rssid=20882</link>
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			<pubDate>Mon, 16 Apr 2012 17:23:26 GMT</pubDate>
										<description>If you have been following my month of power over on the EE Times EDA Designline, you will know that I have been featuring books that tackle the subject of power integrity. It should tell you...</description>
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			<title>Time to rethink EDA flows and tool infrastructure</title>
			<link>http://www.edn.com/blog/Practical_Chip_Design/41696-Time_to_rethink_EDA_flows_and_tool_infrastructure.php?rssid=20882</link>
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			<pubDate>Tue, 27 Mar 2012 14:47:51 GMT</pubDate>
										<description>Recently, I have had the pleasure of talking to a number of entrepreneurs within the EDA space and got to hear some of their concerns and recommendations for people thinking about starting a new...</description>
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			<title>Functional verification concepts have to change</title>
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			<pubDate>Wed, 07 Mar 2012 19:20:59 GMT</pubDate>
										<description>Last week was DVCon, probably the best conference of the year for those interested in functional verification. DVCon stands for Design and Verification Conference and it used to be that it...</description>
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			<title>Analog Bits appear everywhere in the chip</title>
			<link>http://www.edn.com/blog/Practical_Chip_Design/41639-Analog_Bits_appear_everywhere_in_the_chip.php?rssid=20882</link>
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			<pubDate>Thu, 23 Feb 2012 15:39:52 GMT</pubDate>
										<description>Last week I had the pleasure of talking to Mahesh Tirupattur, executive VP at Analog Bits. I have to admit that I had never heard of Analog Bits before, but the talk was quite enlightening. Many...</description>
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