Electrical,Electronics and Instrumentation Engineering

Networking concepts (Objective type)

2012-06-18T08:16:00.002-07:00

Networking

1. What are the two types of transmission technology available?

(i) Broadcast and (ii) point-to-point

2. What is subnet?

A generic term for section of a large networks usually separated by a bridge or router.

3. Difference between the communication and transmission.

Transmission is a physical movement of information and concern issues like bit polarity, synchronizations, clock etc.

Communication means the meaning full exchange of information between two communication media.

4. What are the possible ways of data exchange?

(i) Simplex (ii) Half-duplex (iii) Full-duplex.

5. What is SAP?

Series of interface points that allow other computers to communicate with the other layers of network protocol stack.

6. What do you meant by "triple X" in Networks?

The function of PAD (Packet Assembler Dissembler) is described in a document known as X.3. The standard protocol has been defined between the terminal and the PAD, called X.28; another standard protocol exists between the PAD and the network, called X.29. Together, these three recommendations are often called "triple X"

7. What is frame relay, in which layer it comes?

Frame relay is a packet switching technology. It will operate in the data link layer.

8. What is terminal emulation, in which layer it comes?

Telnet is also called as terminal emulation. It belongs to application layer.

9. What is Beaconing?

The process that allows a network to self-repair networks problems. The stations on the network notify the other stations on the ring when they are not receiving the transmissions. Beaconing is used in Token ring and FDDI networks.

10. What is redirector?

Redirector is software that intercepts file or prints I/O requests and translates them into network requests. This comes under presentation layer.

11. What is NETBIOS and NETBEUI?

NETBIOS is a programming interface that allows I/O requests to be sent to and received from a remote computer and it hides the networking hardware from applications.

NETBEUI is NetBIOS extended user interface. A transport protocol designed by Microsoft and IBM for the use on small subnets.

12. What is RAID?

A method for providing fault tolerance by using multiple hard disk drives.

13. What is passive topology?

When the computers on the network simply listen and receive the signal, they are referred to as passive because they don’t amplify the signal in any way. Example for passive topology - linear bus.

14. What is Brouter?

Hybrid devices that combine the features of both bridges and routers.

15. What is cladding?

A layer of a glass surrounding the center fiber of glass inside a fiber-optic cable.

16. What is point-to-point protocol

A communications protocol used to connect computers to remote networking services including Internet service providers.

17. How Gateway is different from Routers?

A gateway operates at the upper levels of the OSI model and translates information between two completely different network architectures or data formats

18. What is attenuation?

The degeneration of a signal over distance on a network cable is called attenuation.

19. What is MAC address?

The address for a device as it is identified at the Media Access Control (MAC) layer in the network architecture. MAC address is usually stored in ROM on the network adapter card and is unique.

20. Difference between bit rate and baud rate.

Bit rate is the number of bits transmitted during one second whereas baud rate refers to the number of signal units per second that are required to represent those bits.

baud rate = bit rate / N

where N is no-of-bits represented by each signal shift.

21. What is Bandwidth?

Every line has an upper limit and a lower limit on the frequency of signals it can carry. This limited range is called the bandwidth.

22. What are the types of Transmission media?

Signals are usually transmitted over some transmission media that are broadly classified in to two categories.

a) Guided Media:

These are those that provide a conduit from one device to another that include twisted-pair, coaxial cable and fiber-optic cable. A signal traveling along any of these media is directed and is contained by the physical limits of the medium. Twisted-pair and coaxial cable use metallic that accept and transport signals in the form of electrical current. Optical fiber is a glass or plastic cable that accepts and transports signals in the form of light.

b) Unguided Media:

This is the wireless media that transport electromagnetic waves without using a physical conductor. Signals are broadcast either through air. This is done through radio communication, satellite communication and cellular telephony.

23. What is Project 802?

It is a project started by IEEE to set standards to enable intercommunication between equipment from a variety of manufacturers. It is a way for specifying functions of the physical layer, the data link layer and to some extent the network layer to allow for interconnectivity of major LAN

protocols.

It consists of the following:

Ø 802.1 is an internetworking standard for compatibility of different LANs and MANs across protocols.

Ø 802.2 Logical link control (LLC) is the upper sublayer of the data link layer which is non-architecture-specific, that is remains the same for all IEEE-defined LANs.

Ø Media access control (MAC) is the lower sublayer of the data link layer that contains some distinct modules each carrying proprietary information specific to the LAN product being used. The modules are Ethernet LAN (802.3), Token ring LAN (802.4), Token bus LAN (802.5).

Ø 802.6 is distributed queue dual bus (DQDB) designed to be used in MANs.

24. What is Protocol Data Unit?

The data unit in the LLC level is called the protocol data unit (PDU). The PDU contains of four fields a destination service access point (DSAP), a source service access point (SSAP), a control field and an information field. DSAP, SSAP are addresses used by the LLC to identify the protocol stacks on the receiving and sending machines that are generating and using the data. The control field specifies whether the PDU frame is a information frame (I - frame) or a supervisory frame (S - frame) or a unnumbered frame (U - frame).

25. What are the different type of networking / internetworking devices?

Repeater:

Also called a regenerator, it is an electronic device that operates only at physical layer. It receives the signal in the network before it becomes weak, regenerates the original bit pattern and puts the refreshed copy back in to the link.

Bridges:

These operate both in the physical and data link layers of LANs of same type. They divide a larger network in to smaller segments. They contain logic that allow them to keep the traffic for each segment separate and thus are repeaters that relay a frame only the side of the segment containing the intended recipent and control congestion.

Routers:

They relay packets among multiple interconnected networks (i.e. LANs of different type). They operate in the physical, data link and network layers. They contain software that enable them to determine which of the several possible paths is the best for a particular transmission.

Gateways:

They relay packets among networks that have different protocols (e.g. between a LAN and a WAN). They accept a packet formatted for one protocol and convert it to a packet formatted for another protocol before forwarding it. They operate in all seven layers of the OSI model.

26. What is ICMP?

ICMP is Internet Control Message Protocol, a network layer protocol of the TCP/IP suite used by hosts and gateways to send notification of datagram problems back to the sender. It uses the echo test / reply to test whether a destination is reachable and responding. It also handles both control and error messages.

27. What are the data units at different layers of the TCP / IP protocol suite?

The data unit created at the application layer is called a message, at the transport layer the data unit created is called either a segment or an user datagram, at the network layer the data unit created is called the datagram, at the data link layer the datagram is encapsulated in to a frame and finally transmitted as signals along the transmission media.

28. What is difference between ARP and RARP?

The address resolution protocol (ARP) is used to associate the 32 bit IP address with the 48 bit physical address, used by a host or a router to find the physical address of another host on its network by sending a ARP query packet that includes the IP address of the receiver.

The reverse address resolution protocol (RARP) allows a host to discover its Internet address when it knows only its physical address.

29. What is the minimum and maximum length of the header in the TCP segment and IP datagram?

The header should have a minimum length of 20 bytes and can have a maximum length of 60 bytes.

30. What is the range of addresses in the classes of internet addresses?

Class A 0.0.0.0 - 127.255.255.255

Class B 128.0.0.0 - 191.255.255.255

Class C 192.0.0.0 - 223.255.255.255

Class D 224.0.0.0 - 239.255.255.255

Class E 240.0.0.0 - 247.255.255.255

31. What is the difference between TFTP and FTP application layer protocols?

The Trivial File Transfer Protocol (TFTP) allows a local host to obtain files from a remote host but does not provide reliability or security. It uses the fundamental packet delivery services offered by UDP.

The File Transfer Protocol (FTP) is the standard mechanism provided by TCP / IP for copying a file from one host to another. It uses the services offer by TCP and so is reliable and secure. It establishes two connections (virtual circuits) between the hosts, one for data transfer and another for control information.

32. What are major types of networks and explain?

Ø Server-based network

Ø Peer-to-peer network

Peer-to-peer network, computers can act as both servers sharing resources and as clients using the resources.

Server-based networks provide centralized control of network resources and rely on server computers to provide security and network administration

33. What are the important topologies for networks?

Ø BUS topology:

In this each computer is directly connected to primary network cable in a single line.

Advantages:

Inexpensive, easy to install, simple to understand, easy to extend.

Ø STAR topology:

In this all computers are connected using a central hub.

Advantages:

Can be inexpensive, easy to install and reconfigure and easy to trouble shoot physical problems.

Ø RING topology:

In this all computers are connected in loop.

Advantages:

All computers have equal access to network media, installation can be simple, and signal does not degrade as much as in other topologies because each computer regenerates it.

34. What is mesh network?

A network in which there are multiple network links between computers to provide multiple paths for data to travel.

35. What is difference between baseband and broadband transmission?

In a baseband transmission, the entire bandwidth of the cable is consumed by a single signal. In broadband transmission, signals are sent on multiple frequencies, allowing multiple signals to be sent simultaneously.

36. Explain 5-4-3 rule?

In a Ethernet network, between any two points on the network ,there can be no more than five network segments or four repeaters, and of those five segments only three of segments can be populated.

37. What MAU?

In token Ring , hub is called Multistation Access Unit(MAU).

38. What is the difference between routable and non- routable protocols?

Routable protocols can work with a router and can be used to build large networks. Non-Routable protocols are designed to work on small, local networks and cannot be used with a router

39. Why should you care about the OSI Reference Model?

It provides a framework for discussing network operations and design.

40. What is logical link control?

One of two sublayers of the data link layer of OSI reference model, as defined by the IEEE 802 standard. This sublayer is responsible for maintaining the link between computers when they are sending data across the physical network connection.

41. What is virtual channel?

Virtual channel is normally a connection from one source to one destination, although multicast connections are also permitted. The other name for virtual channel is virtual circuit.

42. What is virtual path?

Along any transmission path from a given source to a given destination, a group of virtual circuits can be grouped together into what is called path.

43. What is packet filter?

Packet filter is a standard router equipped with some extra functionality. The extra functionality allows every incoming or outgoing packet to be inspected. Packets meeting some criterion are forwarded normally. Those that fail the test are dropped.

44. What is traffic shaping?

One of the main causes of congestion is that traffic is often busy. If hosts could be made to transmit at a uniform rate, congestion would be less common. Another open loop method to help manage congestion is forcing the packet to be transmitted at a more predictable rate. This is called traffic shaping.

45. What is multicast routing?

Sending a message to a group is called multicasting, and its routing algorithm is called multicast routing.

46. What is region?

When hierarchical routing is used, the routers are divided into what we will call regions, with each router knowing all the details about how to route packets to destinations within its own region, but knowing nothing about the internal structure of other regions.

47. What is silly window syndrome?

It is a problem that can ruin TCP performance. This problem occurs when data are passed to the sending TCP entity in large blocks, but an interactive application on the receiving side reads 1 byte at a time.

48. What are Digrams and Trigrams?

The most common two letter combinations are called as digrams. e.g. th, in, er, re and an. The most common three letter combinations are called as trigrams. e.g. the, ing, and, and ion.

49. Expand IDEA.

IDEA stands for International Data Encryption Algorithm.

50. What is wide-mouth frog?

Wide-mouth frog is the simplest known key distribution center (KDC) authentication protocol.

51. What is Mail Gateway?

It is a system that performs a protocol translation between different electronic mail delivery protocols.

52. What is IGP (Interior Gateway Protocol)?

It is any routing protocol used within an autonomous system.

53. What is EGP (Exterior Gateway Protocol)?

It is the protocol the routers in neighboring autonomous systems use to identify the set of networks that can be reached within or via each autonomous system.

54. What is autonomous system?

It is a collection of routers under the control of a single administrative authority and that uses a common Interior Gateway Protocol.

55. What is BGP (Border Gateway Protocol)?

It is a protocol used to advertise the set of networks that can be reached with in an autonomous system. BGP enables this information to be shared with the autonomous system. This is newer than EGP (Exterior Gateway Protocol).

56. What is Gateway-to-Gateway protocol?

It is a protocol formerly used to exchange routing information between Internet core routers.

57. What is NVT (Network Virtual Terminal)?

It is a set of rules defining a very simple virtual terminal interaction. The NVT is used in the start of a Telnet session.

58. What is a Multi-homed Host?

It is a host that has a multiple network interfaces and that requires multiple IP addresses is called as a Multi-homed Host.

59. What is Kerberos?

It is an authentication service developed at the Massachusetts Institute of Technology. Kerberos uses encryption to prevent intruders from discovering passwords and gaining unauthorized access to files.

60. What is OSPF?

It is an Internet routing protocol that scales well, can route traffic along multiple paths, and uses knowledge of an Internet's topology to make accurate routing decisions.

61. What is Proxy ARP?

It is using a router to answer ARP requests. This will be done when the originating host believes that a destination is local, when in fact is lies beyond router.

62. What is SLIP (Serial Line Interface Protocol)?

It is a very simple protocol used for transmission of IP datagrams across a serial line.

63. What is RIP (Routing Information Protocol)?

It is a simple protocol used to exchange information between the routers.

64. What is source route?

It is a sequence of IP addresses identifying the route a datagram must follow. A source route may optionally be included in an IP datagram header.

MG1351 Principles of Management

2012-06-17T08:17:00.001-07:00

1) What is Management ?

Management is the process of giving direction and controlling the various activities of the people to achieve the objectives of an organization.

2) Define: Management.

According to Knootz and Weihrich “Management is the process of designing and maintaining of an environment in which individuals working together in groups efficiently accomplish selected aims”.

3) Write some characteristics of Management ? Management is a continuous process.

Manager use the resources of organization both physical as well as human achieve the goal.

Management aims act achieving the organization goals by ensuring effective use of resources.

4) Write any two points favor for management as a science

Management principle should be verified. Reliable basis for predicting future.

5) what is time study ?

The movement which take minimum time is the best one.

6) What is motion study ?

Taylor suggested the that eliminating wasteful movements and performing only necessary movement .

7) what is authority ?

It is the power given to a person to get work from his subordinates.

8) what is responsibility ?

It is the amount of work from a man by his superior+.

9) Comment: Management is both –A science and an art

Management is a science because it contains general principles. It

is also an art because it requires certain personal skills achieve desired result

10) What is centralization?

The organization is centralized when the power is concentrated with one person.

11) What is decentralization ?

If the power is fully distributed to the subordinates of the

organization.

12) what is Esprit-de-corps ?

This means union is strength. In organization employees should be harmony and unity.

13)Write some important functions of top level management?

1)Top level management.

2)Middle level management.

3)lower level management.

14)Write some important functions of top level management ?

1)To formulate goals and policies of the company.

2)To formulate budgets.

3)To appoint top executives.

15) Write the functions of management ?

1) Planning.

2) Organizing.

3) Staffing.

4) coordinating.

5) controlling.

16) Define sole trade ?

The sole proprietorship is that form of business organization which owned and controlled by a single individual.

17) What is partnership ?

A partnership is an association of two or more persons to carry on business and to share its profit and losses.

18) What is joint stock company ?

Joint stock company is association of many persons who contribute money worth to common stock and explaining source trade and also share the profit and losses.

19) What is private limited company ?

A private limited company is a company which has a minimum paid up capital dory be prescribed.

20) White is a co-operative society ?

It is a voluntary association of persons for mutual benefit and it aims are accomplished through self heap and collective effort.

21) What is a social responsibility ?

Society is the part of the management to interact actions wither to protect social interest a society.

22) Define planning .

Planning is the process of selecting the objectives and determining the course of action required to achieve these objectives.

23) What are the main objective of planning

Planning is a primary function of organization It helps in achieving objectives It done to cope with uncertainty and changeIt helps in facilitating control It helps in coordination Planning increases organization effectiveness Planning guides in decision making

24)Define “Mission”

Mission may be defined as “a statement which defines the role that an organization plays in the society”

25) Define “objectives”

The term “objective” or “ goals” are often used interchangeably. Objective are the end results towards which the activities of attain its objectives.

26) what is mean by strategy

`Strategy of an organization is the programmers of action and deployment

of resources to attain its objectives.

27) what are the factors to be considered while formulating strategies ? Mission and objectives of an organization.Values , aspiration and

prejudices of top level management Opportunities and threads of the external environment . Strength and weakness of the firm in various aspects such as funds , organization structure , human talent , technology etc..

28) Define “ policies”

Policies are general statement or understanding which provide guidance in decision making to various managers .

29) what is procedure?

Procedure is a chronological order of action required to implement

a policy and to achieve an objectives.

30)What is programme ?

programme is a broad term which includes goals , polices ,

procedure , rules , task assignment , step to be taken, resources to be employed to carryout a given course of action.

31)Define budgets.

A budget is a statement of expected result in numerical terms and therefore , it may be referred as a numerical programmer.

32) What is objective ?

Objectives are the aims, purposes or goals that an organization wants to achieve over varying period of time.

33) What is MBO ?

MBO is a process whereby the superior and the subordinate manager of an enterprise jointly identify its common goals, define

each individuals major areas of responsibility in terms of result expected of him , and use these measures as guides for operating the unit and the contribution of

each of its members is assessed.

34) what is meant by “strategy” ?

A strategy may also be defined as a special type of plan prepared for meeting the challenge posted by the activities of competitors and other environmental forces.

35) What are the major kinds of strategies and policies ?

Growth, Finance, organization , personnel, products or service and market.

36) Write down any four factors which leads to fail of strategic planning.

Managers are inadequately prepare for strategic planning. The information for preparing the plans is insufficient for planning for action. The goals of the Organization are too vague. The business units are not clearly identified.

37) What is planning premises ?

The assumptions about future derived from forecasting and used in planning are known as planning premises.

38)What are the practices made in making effective premising ? Selection of premises.

Collection of information..

Development of alternative premises for contingency planning. Verification of the consistency of premises.

Communication of planning premises.

39) Explain the term decision and decision making ?

A decision may be a direction to other to do or not to do ..Decision

–making is defined as the process of choosing a course of action from among alternatives to achieve a desired goal. It is one of the functions of management

and also a core process of planning The management executive takes a number of decisions every day. Thus, a decisions may be rational or irrational. The best one

is selected out of the available alternatives.

40) How would you evaluate the importance of a decision ?

Decision making is a selection process. The best alternative is selected out of many available alternatives.

Decision –making is a goal –oriented process . Decisions are made to achieve some goal or objective.

Decision making is the end process. It is preceded by detailed discussion and selection of alternatives.

Decision making is a human and rational process involving the application of intellectual ablates. It involves deep thinking and foreseeing things.

Decision making is a dynamic process. An individual takes a number of decisions each day.

41) Mention the three approaches generally adapted by managers in selections an alternative ?

Quantitative and Qualitative analysis. Marginal analysis.

Cost effectiveness analysis.

42)Define Organizing

Organizing is the process of identifying and grouping of activities required to attain objectivities , delegating authority, creating the responsibility and establishing relationship for the people to work effectively.

43) What do you understand by effective organizing ?

Effective organizing focuses on finding in present organizing avoids organizational inflexibility and makes the staff work effective by avoiding conflicts by clarification.

44) How informal organization characteristics differ from formal organization ?

It arises without any external cause

It is created on the basis of some similarity among the member. The bases

of similarity may be age, sex, place of birth, caste, religion, liking/ disliking etc…

Informal organization has no place in the organization chart.

It is one of the parts of total organization.

45) What is span control ?

Span of control means the number of people managed effective by a single superior in an organization. The term “Span of control” is also known as “Span of management”, “span of authority” ,and “Span of responsibility” . But span of management is a better term because control and supervision are elements of management.

46) What is matrix structure ?

Matrix structure is a hybrid organizational form, containing characteristics of both project and functional structures.

47) How can we define power ?

“Power is the probability that one actor with in the relationship will be in a position to carry out his own despite resistance”.

48) What is line authority ?

Line authority is the direct authority which a superior exercises over a number of subordinates to carry out orders and instruction . IN organization process, authority is delegated to the individuals to perform the activities.

49) What is staff authority ?

The relationship between a staff manager with whom he works depends in part on the staff duties.

50) Define staffing .

Staffing is the part of the management process which is concerned with

the procurement utilization , maintenance and development of large satisfied work force on the organization.

51) Define Human resource planning.

“ Human resource planning is the process by which an organization

ensures that it has the right number and all kind of people at the right place at the right time , capable of effectively and efficiently completion ,those tasks that will help the organization achieve its overall objectives”.

52)What is job analysis ?

Job analysis is a detailed study of a job to identify the skills, experience and aptitude required for the job.

53) What is job design ?

The job design is usually broad enough to accommodate people’s needs and desires.

54) Define : Recruitment

B. Flippo define recruitment as “ The process of searching for prospective employees and stimulating to apply for jobs in the organization”.

55) What is selection ?

Selection is the process of finding out the most suitable candidate to the job out of the candidates attracted

56) What is grading method ?

It is one of the trait-based appraisal method. The actual performance of the employees is measured against these grades . This method is generally useful for promotion based on performance .

57) What is mean by resources allocation ?

Manager is responsible for allocation of money, material and human resource in the organization. He utilizes minimum resource to give maximum profit to the organization.

58) Define the Peter principle.

The principle states that every person in a hierarchy tends to rise to the level of his incompetence .

59) Define :Training

According to B.Flippo “Training is the act of increasing the knowledge and skill of an employee for doing a particular job”.

60)Define ; Organizational conflict .

According to step “ conflict is a process in which an effort is purposefully made by one person or unit to block another that result in frustrating the

attainment of others goals of the furthering of his or her interests.

61)What is managerial grid ?

Managerial grid is behavioral theory of leadership. It plays an important role in managerial behavior in organizational development.

62 )What is meant by the term directing ?

Directing may be defined as the process of instructing ,guiding and inspiring human factors in the organization objectives. It is not only issuing

orders and instructions by a superior to his subordinates but also including process

of guiding and inspiring them to work effectively.

63) List down the human factors in managing ? Multiplicity of roles.

Individuality. Personal dignity.

64) Define creativity.

Creativity is defined as the ability to produce new and useful ideas through the components in novel and non obvious ways. Creativity exists throughout the populations, largely independent of age , sex and education.

65) What is a SCAMPER tool ?

SCAMPER is a checklist that helps us to think of changes. We can make

to an existing product to create a new one . these changes can be used either as direct suggestions or as starting points for lateral thinking.

66) What is meant by reframing matrix ?

Reframing Matrix is a simple technique that helps to look at business problems from a number of different viewpoints. It expands the range of creative solutions that you can generate. The approach relies on the fact that different

people with different experience approach problems in different ways.

67) State the function of mind mapping tool ?

This tool is similar to concept fan except looking one step back from main topic .A mind map consists of a central word or concept with 5 to10 main ideas

that relate to that word , similar to creating a spider-web.

68) Mention the use of DO IT process for creativity ?

DO IT is a process for creativity. Techniques explained earlier in this chapter focus on specific aspects of creative thinking. DO IT bundles them together introduce formal methods of problem definition and evaluation. These

help you to get the best out of the creativity techniques. DO IT is an acronym that stands for:

D – Define problem

O – Open mind and apply creative techniques

I _ Identify best solution

T _ Transform

69) Differentiate innovation and invention. Innovation means the use of creative ideas.

Invention means really finding new things which are not already available.

70) How can be harmonizing objectives achieved ? Mutual trust.

Cooperation and understanding.

Worker’s participation in management, and

Balancing the objectives of the organization with those of individuals.

71)Define “multiplicity of roles” .

Individuals are not only the productive factor in management’s plans. They are members of social system of many organizations.

72) What is meant by Brain storming ?

Brainstorming is an excellent way of developing many creative solution

to a problem. It works by focusing on a problem , and then coming up with very many radical solutions to it . The essence of brainstorming is a creative

conference, ideally of a to 8 to12 people meeting for less than an hour to develop

a long listed without criticism on a backboard or newsprint as they are offered ;

one visible idea leads to others. At the end of this session , participants are asked how the ideas could be combined or improve.

73) Define motivation

According to koonts and O’Donnell, “Motivation is a general terms applying to the entire class of drives, desires , needs wishes and similar forces that induce an individual or a group of people to work”

74) Names the steps involved in motivation process. Analysis of situation .

Preparing, selecting and applying a set of appropriate motivating tools. Follow up.

75) What are the types of motivation

Positive motivation Negative motivation Extrinsic motivation Intrinsic motivation

76) What is job enrichment ?

Job enrichment is therefore based on the assumptions that in order to motivate personnel, the job itself must provide opportunities achievement , recognition, responsibility, advancement and growth.

77) Define Leadership.

Leadership is the process of influencing the behavior of others towards the accomplishment of goals in a given situation.

78) List out few leadership traits

The Michigan studies

The Ohio state university studies

The managerial grid

79) State House’s path- goal approach .

Leaders are effective because of the influence on the followers motivation, ability to perfume and their satisfaction.

80) What is Laissez- faire ?

Complete freedom is given to the subordinate so that they plan , motivate, control and otherwise be responsible for their own action.

81) What is communication ?

Communication is the passing of information from one person to another

person.

82) Name the various types of communication

Downward communication

Upward communication

Horizontal or Lateral communication

83) Define control ?

According to Knootz “ Controlling to the measurement and correction of performance in order to make sure that enterprise objectives and the plans devised

to attain them are accomplished”.

84) Why need of control in the organization ? Control process is universal.

Control is a continuous process. Control is action based.

Control is forward looking.

85) Why need of control in the organization ? Control can minimize the mistake .

To discover the deviations in the management

To minimum dishonest behaviors of employees.

86) What are the Inter –relationship between planning and end with control ? The management process of adjusting future action on the basis of

information about past performance. Control helps in achieving them.

87) What is Feedback Control ?

Feedback control is the process of adjusting future action on the basis of information about past performance.

88)What is management by exception ?

Actual performance compare with the standard performs deviations which can not significant should be avoid.

89) What is concurrent control ?

This control measures for taking corrective action while an programmer meet any obstacle in this activities.

90) What is feed forward control ?

It is preventive in nature . This control involves evaluation of inputs and taking corrective action before a particular operation is completed.

91)What is direct labour Budget ?

Direct labour Budget reveals the expected labour requirements during the budget period.

92) What is fixed Budget ?

In this budget in which targets are rigidly fixed .This is a forecast of the targets for the coming fear prepared well in advance.

93)What is flexible budget ?

A flexible budget is a budget designed to change in the level of activity.

94) What is Internal Audit ?

Internal audit is done by an internal auditors who is an employee of the organization . He examines the objectives, policies, plans procedures and performance of the management

95) Define Productivity ?

Productivity is a measure of how much input is required to produce a given output .i.e. the ratio (output/input) is called productivity.

96) Define : OR

Operation Research is a systematic analysis of a problem through

scientific methods ,carried out by appropriate specialists ,working together. As a team , finding an optimum and the most appropriate solution to meet the given set

of constraints.

97) What is JIT?

Just In Time Inventory system. In this method the suppliers delivers the materials to the production spot just in time to be assembled .This method reduces cost of inventory.

98) What is value engineering?

It is a special type of cost reduction and product improved technique.

99) What is preventive control ?

An efficient manager applies the skills in managerial philosophy to eliminate undesirable activated which are the reasons for poor management.

100) Define : Multinational corporation.?

“ An enterprise which own or control production or service facilities outside the country in which they are based “.

101) What is Ethnocentric attitude ?

The manager orientation and managerial activities, operations was based on that of the parent company.

102) What is polycentric attitude ?

Polycentric attitude manager orientation was host country orientation .

103) What is geocentric attitude?

This type of managers are trained to balance central ,local and global objectives.

REVIEW QUESTIONS

1) Explain the principle of F.W.Taylor theory.

2)Explain the Henry Fayol management theory.

3)What are the major functions of management explain.

4)Explain management is an art or science both science and art.

5)Explain the types of business organization.

6)Describe the various elements in planning ?

7)What are different types of plans ?

8)Give an account of various steps involved in planning ?

9)Describe the different objectives of planning ?

10)Explain briefly the benefits and weakness of MBO ?

11)Describe the steps in rational decision making ?

12)Explain how formal organization is different from informal organization

13)Discuss about the factors determining an effective span of management

14)Write short note on types of departmentation and matrix organization

15)Explain the concept of functional authority . How do you delegate ?

16)Explain the concept of decentralization ?

17) Explain the concept of motivation.

18) Write short note on Maslow’s hierarchy of needs

19) Explain different styles of leadership based on authority

20) Explain the qualities required for effective leadership

21) What are the barriers of effective communication? Explain them

22) Discuss the importance of communication in a modern industrial organization

23) Explain the steps in the process of controlling.

24) Explain the role of MIS play at various levels of management

25) What are the effective steps for direct control and preventive control ?

26) What are the factors effect the operations of the multi national enterprises

27) Explain a unified global theory of management

SOURCE CODING OF SPEECH FOR WIRELESS COMMUNICATION

2012-06-17T08:15:00.002-07:00

SOURCE CODING OF SPEECH FOR WIRELESS COMMUNICATION

INTRODUCTION

Speech based wireless communication systems can be analogue or

digital based. The digital type is now the far more common … as

digital communication systems have many advantages over

analogue systems.

Speech coding generally refers to coding the analogue signal into a

digital signal (ADC). This is conducted at the transmitter. The

decoding (DAC) is conducted at the receiver. The coding/decoding

system is often referred to as a codec.

Speech coding also refers to `coding’ the bits of a digital speech

signal….again, this is conducted at the transmitter, while the

equivalent decoding is carried out at the receiver.

The main goal of this form of speech coding is to reduce the

number of bits required to represent the speech signal….speech

compression. This leads to a reduction in the required transmitted

bit rate Rb , and subsequently to a smaller required channel

bandwidth BC (approx. equal to Rb).

Generally there is a trade-off between a lower bit rate and coding

accuracy (how accurately the coded signal represents the original

speech signal). Other factors that need to be considered are the

computational complexity of the speech coder and the processing

delay.

SPEECH CODERS TYPES

Speech coders fall into two main categories

(i) waveform coders

(ii) source coders.

Waveform coders:

These coders aim at representing the time

domain waveform of the speech signal….that is the aim is to have

the reconstructed speech signal time waveform very similar to the

original speech signal time waveform.

These coders are relatively insensitive to the characteristics of the

particular speech signal and to noisy environments. Also, they

have a relatively low computational complexity, but they provide

only a relatively small reduction in the bit rate.

Source coders:

These coders aim to have the reconstructed speech

signal ‘sound’ very similar to the original speech signal. These

coders are based on representing the speech signal using dynamic

models. These dynamic models are based on assumptions on the

speech signals. For this reason they are relatively sensitive to the

characteristics of the particular speech signal. Also, they have a

relatively high computational complexity, but they do provide a

relatively large reduction in the bit rate.

We focus on waveform coders.

Time Domain Waveform Coders

We begin considering the most basic coder … Pulse code

modulation (PCM) coder, which is essentially an analogue to

digital conversion (ADC) device.Sampling the first step is to sample the analogue speech signal s(t), such that

the sampled signal accurately represents the analogue signal … or

alternatively, such that the analogue signal can be reconstructed

from the sampled signal.

The Nyquist theorem states that a bandlimited analogue signal can

be reconstructed from its uniformly sampled equivalent if the

sampling interval T0 <= 1/(2B) where B=bandwidth of analgue

signal…alternatively, if the sampling rate 1/T0=fs>=2B.

Furthermore, reconstruction of the analogue signal is achieved

simply by passing the sampled signal through a (ideal) LPF with

bandwidth B=fs/2 .

If the Nyquist sampling criterion is not satisfied, then the

reconstructed signal will show distortion … known as aliasing

distortion.

The typical speech signal has negligible signal power outside of

the frequency range 300Hz<f<3.4kHz. Based on this, PCM coders

commonly use a sampling frequency of fs=8kHz.

Note: In practice,

the speech signal is first passed through a LPF to ensure signal

power above 4kHz is negligible.

Quantisation

The second step is to quantise or discretise each sample value. The

discrete valued quantised samples then have values which belong

to a finite alphabet (as opposed to the infinite alphabet of the

continuously valued non-quantised samples). This is required if we

ultimately want to represent the sample with a finite number of

bits.

Unlike the sampling operation, quantisation causes signal

distortion. Often ,however, this distortion is referred to as

quantisation noise.

If uniform quantisation is used (the quantisation levels are

uniformly spaced) then, ignoring all other forms of distortion and

noise, the signal-to-quantisation noise ratio (SQNR) is

SQNR=bM2

Where M=number of quantisation levels

b=3, if considering peak signal power to average quantisation noise

power

b=1, if considering average signal power to average quantisation

noise power.

Bit encoding

The 3rd step is conversion of each quantised sample value into a

sequence of bits. Assuming we use the same number `n’ of bits for

each of the M quantisation levels, then we require

n=log2M … M=2n.

It follows that,

SQNR(dB)PEAK = 6.02n +4.77

SQNR(dB)AVE = 6.02n

… each additional bit used in bit encoding leads to a 6dB

improvement in SQNR. However, this comes at the cost of a

higher bit rate.

Non-uniform quantization

The mean/average quantisation noise power is given by

NQ=int{x=-infinity _ +infinity} [x-fQ(x)]2p(x) dx

Where x=non-quantised sample value, fQ(x)=quantised sample

value, p(x)=pdf of x.

It follows that NQ is reduced if we use finer quantisation level

spacing at values of x for which p(x) is larger. This is the basis of

non-uniform quantisation.

Note: Uniform quantisation is optimal if p(x) is flat, that is x is

uniformly distributed.

The (non-quantised) samples of a sampled speech signal have a

greater probability of having a `small’ amplitude than a `large’.

With the aim of reducing the quantisation noise power (for a given

number M of quantisation levels … or alternatively with the aim of

reducing M for a given quantisation noise power) speech coding

systems typically use a logarithmically based non-uniform

quantiser … more finely spaced quantisation levels at lower

amplitude values.

In practice, non-uniform quantisation is achieved via (i) passing

the analogue signal through a compressor … which nonuniformly

compresses the dynamic range of the signal or flattens out the

signal pdf p(x); then (ii) passing the resulting analogue signal

through a uniform quantising coder.

The action of the compressor is reversed at the receiver by an

expandor

Two popular compressor systems are m -law (used in Australia,

USA, Canada and Japan) and A-law (used in Europe)

m-law: |vOUT |= ln(1+m |vIN|)/ln(1+m) where |vIN| <=1

A-law: |vOUT| = A|vIN|/(1+lnA), 0<=|vIN|<=1/A

= [1+ln(A|vIN|)]/(1+lnA), 1/A<=|vIN|<=1.

Note: These formulae assume vIN has been normalized to |vIN|<=1.

Most common are m =255 and A=87.6.

The above approach to converting an analogue signal into a bit

stream is known as Pulse Code Modulation (PCM)

Example: Speech signal is converted into a PCM signal using a

sampling rate of fs=8kHz and M=256 quantisation levels. It

follows that number of bits per sample is n=log2256=8, and that

the bit rate

is Rb=64kbps. This is the bit rate commonly used for standard

PCM speech signals.

Reducing the bit rate of PCM based signals

Let Ds(k)=s(k)-s(k-1) be the kth sample difference, where

s(k)=current sample value. It follows that

s(k)=s(0)+S{i=1k} Ds

(i) Thus any sample of a sampled signal can be reconstructed from the

sum of the past sample differences.

Adjacent samples of a speech waveform are often highly

correlated. That is, on average, Ds(k) has a significantly smaller

dynamic range than s(k).

Based on the above, a reduction in the transmitted bit rate can be

achieved by transmitting quantised Ds(k) sample values….since

fewer quantisation levels are required for Ds(k) than s(k).

A further improvement (smaller bit rate) can be obtained if we use

a pre-determined model of the speech signal to predict the current

value s(k) from previous values s(k-1), s(k-2),…

ss(k)=a1.s(k-1)+a2.s(k-2)+…ap.s(k-p), where {ai}=predetermined

set of constants (typically determined via linear

prediction techniques).

Then we transmit a quantised version of the difference between the

predicted value and the actual value:

Dss(k)=s(k)-ss(k).

Differential pulse code modulation (DPCM).

As long as the set of coefficients {ai} are available at the receiver, then a quantised version of s(k) can be reconstructed at the

receiver. Adaptive DPCM adaptively updates the coefficient set {ai} to

ensure the model suitably describes the current speech signal.

(Adaptive) Delta modulation is a one bit version of (Adaptive)

DPCM.

Frequency Domain waveform coding

The two most common types are

(i) subband coding (SBC) and

(ii)block transform coding

Subband coding

It involves passing the speech signal through a

parallel set of L bandpass filters (essentially non-overlapping in

frequency). The result is a set of L subband speech signals. Each of

these signals is then passed through a PCM device, each with its

own number of quantisation levels. The lower the power in a

particular subband then the smaller the number of quantisation

levels.

Block transform coding

It involves passing time-windowed segments

of the sampled speech signal through a transform device. The

output coefficients are then each separately quantised and bit

encoded. The smaller coefficients are coursely quantised

(essentially ignored), leading to a reduction in the total number of

bits required to represent the particular windowed segment.

EC 1211 – ELECTRONIC DEVICES

2012-06-17T08:14:00.001-07:00

PART A – (10×2=20 marks)

1. What is meant by depletion region?

2. Define the transition capacitance of a diode.

3. What are power transistors?

4. Which of the BJT configuration is suitable for impedance matching applications? Why?

5. Define the pinch off voltage.

6. Give the drain current equation of JFET.

7. Differentiate a PN junction diode and LASER diode.

8. List the application of opto-electronic devices.

9. Draw the transistor equivalent circuit of SCR.

10. What is LDR?

PART B – (5×16=80 marks)

11. (a) With the volt-ampere characteristics, explain the working principal of the diode and also explain the static dynamic resistance of the diode? (16)

(b) Write a detailed note on:

(i) diode switching times. (6)

(ii) applications of diodes. (4)

(iii) Capacitance of diodes. (6)

12. (a) For common emitter-bipolar junction transistor configuration, analyze the input and output characteristics. Also, give the inference and necessary analytical expressions for the same. (16)

(b) Write a note on

(i) Transistor construction. (4)

(ii) Voltage gain and current gain expressions for CB Configuration using transistor hybrid model. (Figures are necessary) (12)

13. (a) With neat diagram explain the construction, working characteristics of Unijunction transistor. Give its equivalent circuit.(16)

(b) Write the construction, operation and characteristics behavior of JFET under various biasing conditions. Give its equivalent circuit.(16)

14. (a) What is the physics of photo emissivity. Explain in detail, the construction and working of any one optoelectronic device which uses this principle. (16)

(b) Give a detailed account on:

(i) Opto couplers and their application. (8)

(ii) Photo transistors and diodes. (8)

15. (a) (i) Define tunneling phenomenon. Explain how tunnel diode operates under different operating conditions. In what way it is different from the conventional diodes? Give the necessary energy level diagrams. (12)

(ii) Give the characteristic features of devices belonging to the thyristor family. (4)

(b) (i) Zener diode can be used as a voltage regulator-justify it.(8)

(ii) Write a note on PUT. (8)

A New Converter Transformer and a Corresponding Inductive Filtering Method for HVDC Transmission System

2012-06-17T08:12:00.002-07:00

Abstract—A new converter transformer and an inductive filtering

method are presented to solve the existing problems of

the traditional converter transformer and the passive filtering

method of the high-voltage direct current (HVDC) system. It

adopts the ampere-turn balance of the transformer as the filtering

mechanism. A tap at the linking point of the prolonged winding

and the common winding of the secondary windings is connected

with the LC resonance circuit. It can realize the goal that once the

harmonic current flows into the prolonged winding, the common

winding will induct the opposite harmonic current to balance it by

the zero impedance design of the common winding and the proper

configuration of LC parameters, so there will be no inductive

harmonic current in the primary winding. Moreover, the reactive

power that the converter needs can be partly compensated in the

secondary winding. Simulation results have verified the correctness

of the theoretical analysis. The new converter transformer

can greatly reduce the harmonic content in the primary winding,

loss, and noise generated by harmonics in the transformer, and

the difficulty of the transformer’s insulation design.

Index Terms—Filtering mechanism, harmonic, high-voltage

direct current (HVDC), inductive filtering, new converter

transformer.

I. INTRODUCTION

THE high-voltage direct current (HVDC) transmission

system has been widely used in remote and large power

transmission, submarine cable transmission, and domain electric

network interconnection [1]–[3]. HVDC transmission

system is always made up of a rectifier station, a dc line, and

an inverter station. During the commutating process, a large

number of harmonics will be generated by the nonlinear load.

Therefore, it is necessary to carry out harmonic suppression.

The traditional HVDC ac passive power filters (PPF) are always

placed at the converter transformer’s primary side (grid side),

and the transformer will be adversely affected by harmonics,

which causes a series of problems, such as additional harmonic

loss, heat, vibration, and noise [1], [4]–[7]. In addition, in order

to avoid series/parallel resonance between parallel PPF and

(b) Voltage phasor diagram.

system impedance, the traditional PPF cannot reach its tuned

point, which greatly affects the filtering effect [8]–[10]. The active

power filter (APF) has better filtering effect than the passive

power filter (PPF), but APF needs a complex regulation and

control system, especially a large power harmonic-generating

source, which is inapplicable in current HVDC transmission’s

ac system [11]–[13]. A patent named coupling-compensation

and harmonic-shielding converter transformer, that is, the new

converter transformer, proposes an ideal solution to harmonic

suppression.

II. PROBLEMS OF TRADITIONAL CONVERTER TRANSFORMER’S

WIRING MODE AND AC FILTERING SCHEME

As Fig. 1 shows, the traditional converter transformer and ac

passive filtering method are commonly used in 12-pulse HVDC

system. It is clear that the transformer adopts wye/wye/delta

wiring, and ac filters are placed at the transformer’s primary

side. Although this kind of converter transformer and passive

filters are widely applied in HVDC systems, these structures and

designs still have some disadvantages.

1) In HVDC transmission systems, the converter is the

main harmonic-generating source. A three-phase bridge

converter usually generates characteristic

harmonic currents at the ac side because of

the turning of the thyristors [14]. The noncharacteristic

harmonic currents can also be generated due to some

factors, such as various unbalances in ac voltages, system

impedance, and transformer parameters [15]. All the

harmonic currents will flow in the primary and secondary

windings of the traditional converter transformer, which

increases the transformer’s additional heat, vibration, and

NEW CONVERTER TRANSFORMER AND A CORRESPONDING INDUCTIVE FILTERING METHOD 1427

Fig. 2. New converter transformer and corresponding inductive filtering

system. (a) Wiring mode. (b) Voltage phasor diagram. (c) Arrangement of

filters.

noise. As a result, it increases the added loss, the difficulty

of insulating design, the capacity of the transformer, and

the margin of the design capability, which increases the

cost of the traditional converter transformer.

2) In the ac system of HVDC, traditional passive filtering

is the main method of harmonic suppression. However, it

still has several disadvantages. The most serious one is

that the series/parallel resonance may occur between the

system impedance and the passive power filters. This series/

parallel resonance will result in the amplification of

harmonic current and harmonic voltage, and it may damage

the passive power filters and neighboring power equipment

[16], [17]. To avoid the resonance of the passive

power filters, the tuned frequency of passive power filters

is designed slightly away from the dominant harmonic frequency.

However, it will degrade the performance of the

passive power filter, and the filtering effect of the traditional

passive filter cannot be optimal.

III. TECHNICAL CHARACTERISTICS OF NEW CONVERTER

TRANSFORMER AND CORRESPONDING

INDUCTIVE FILTERING METHOD

Fig. 2 shows the new converter transformer and the corresponding

inductive filtering system, in which, (a) shows the

wiring mode of the transformer, and its secondary winding

adopts prolonged-delta wiring. To facilitate our discussion,

the winding of , , is called

prolonged winding, and the winding of , , ,

, , is called common winding. (b) shows

the transformer’s voltage phasor diagram, which is used to

discuss the phase-shifting of the new transformer. (c) shows

the arrangement of the inductive filters. As can be seen from

(c), a tap at the linking point of each single-phase prolonged

winding and common winding is connected with double-tuned

(DT) filters. The inductive filtering method will be discussed

later on in this paper.

A. Phase-Shifting Principle

In order to satisfy the demand of 12-pulse HVDC, the converter

transformer has to supply 12-phase commutating line

voltage. The secondary winding of the traditional transformer

adopts wye/delta wiring, and the phase angle difference between

the wye winding’s line-voltage and the delta winding’s

line-voltage has to be 30 , which is shown in Fig. 1(b). As for

the new converter transformer, according to Fig. 2(b), we can

set the phase angle difference between the line-voltage

and the to , and set the phase angle difference

between the line-voltage and the to . In

this way, the phase angle difference between the line-voltage

and the is 30 . So we can deduce that the

phase-shifting angle should be 15 . Set that the

voltage value of the primary winding of the new converter

transformer is , the voltage value of the secondary prolonged

winding is , and the voltage value of the secondary common

winding is ; then, according to Fig. 2(b) and sine rule, the

following can be obtained:

(1)

According to the above equation, the turn-ratio can be obtained

as follows:

(2)

in which , , respectively, represent the turn-ratio of the secondary

prolonged winding and the common winding to primary

winding. , , and are the turn number of the primary

winding, the secondary common winding, and the prolonged

winding, respectively.

In the actual HVDC systems, the new converter transformer

can adopt the single-phase three-winding method. As long as the

relation of the turn-ratio satisfies (2), the new converter transformer

can supply 12-phase commutating line voltage and satisfy

the commutating demand of the 12-pulse converter.

B. Self-Coupling Action

The secondary prolonged winding and the common winding

of the new converter transformer adopt self-coupling connection,

which is similar to the series winding and the common

winding of autotransformer [17], [18]. According to Fig. 2(c),

set that the output line-voltage is , the voltage of the common

winding is and the voltage of the prolonged winding is ;

then, the following voltage phasor diagram in Fig. 3 can be

obtained.

According to cosine rule, the output line-voltage can be expressed

as follows:

(3)

Fig. 3. Voltage phasor diagram for secondary winding’s analysis.

Fig. 4. New converter transformer’s single-phase harmonic model.

Then, the voltage of the secondary prolonged winding is deduced

as follows:

(4)

The secondary prolonged and common winding of the new

converter transformer is electromagnetic coupling, which is

similar to the series andcommonwinding of the autotransformer.

When the prolonged winding and the common winding maintain

magnetic force balance, we can obtain the following relation:

(5)

in which and are the root-mean-square (RMS) current

of the secondary prolonged winding and the common winding,

respectively.

Fig. 2(c) shows that the current of the secondary prolonged

winding is equal to the output current , and its electromagnetic

capacity can be expressed as follows:

(6)

Meanwhile, the output capacity can be expressed as follows:

(7)

Then, the ratio coefficient can be obtained as follows, which

is used to analyze the material utilizing ratio of the transformer:

(8)

Assuming that the output line-voltage value of the new

converter transformer is 110 kV, and voltage value of the secondary

common winding is 35 kV, then, according to (4)–(8), we

can obtain the ratio coefficient , which indicates

that new converter transformer is material saving.

C. Inductive Filtering Mechanism

Fig. 4 shows the single-phase model of the new converter

transformer, which is used to analyze the inductive filtering

mechanism. In this figure, indicates the harmonic current

source, which is also the harmonic current of the secondary

Fig. 5. Single-phase model of the new converter transformer. (a) Winding arrangement.

(b) Equivalent circuit.

prolonged winding. and indicate the harmonic current

of the primary winding and the secondary common winding, respectively.

Because of the harmonic current of the secondary

prolonged winding, the primary winding and the secondary

common winding will induce harmonic current and to

balance . According to magnetic force balance, the following

results:

(9)

in which , , and are the turn number of the primary

winding, the secondary prolonged winding, and the common

winding, respectively.

If the harmonic ampere-turns of the secondary prolonged

winding and those of the common winding can keep balance,

then , that is, there will be no induction harmonic

current in the primary winding. That is to say, the harmonic

currents only flow in the secondary winding of the new transformer.

To realize the inductive filtering method, it not only

needs the full tuning design of the tapping filter, but also needs

the zero inductance design of the secondary common winding

of the new converter transformer, which will be analyzed in

the following equivalent circuit of the single-phase transformer

shown in Fig. 5.

Fig. 5(a) shows the winding arrangement of the single-phase

model of the new converter transformer. According to short-circuit

test, we can measure the short-circuit impedance , ,

and . Then, the equivalent impedance shown in Fig. 6(b) can

be expressed as follows:

(10)

By regulating the winding arrangement shown in Fig. 5(a),

it can realize the goal that the impedance of the secondary

common winding is approximately equal to 0 (the resistance

can be ignored for high-capacity converter transformers). In

Fig. 5(b), the solid arrow and the virtual arrow, respectively, indicate

basic frequency current and harmonic frequency current.

Under the specific harmonic frequency of the harmonic current

that needs suppressing, both of the double-tuned filter and the

harmonic impedance of the secondary common winding are

approximately 0, so the harmonic current mainly flows into

the branch of the secondary common winding, and there is

approximately no harmonic current in the primary winding.

In addition, under the fundamental frequency, the impedance

of the filter is capacitive, thus providing reactive power

compensation.

LUO et al.: NEW CONVERTER TRANSFORMER AND A CORRESPONDING INDUCTIVE FILTERING METHOD 1429

Fig. 6. New HVDC transmission analogy system with new converter transformer

in rectifier station and traditional converter transformer in inverter

station.

Fig. 7. Phase current fast Fourier transform (FFT) of the secondary terminal of

the traditional and the new converter transformer. (a) FFT of secondary phase

current I corresponding to Fig. 1. (b) FFT of secondary phase current I

corresponding to Fig. 2.

IV. SYSTEM SIMULATION STUDY

A. Simulation Model

In order to prove the correctness of the above analyses, according

to the new HVDC transmission testing system shown

in Fig. 6, we have established a system simulation model by

using MATLAB/SIMULINK. Fig. 6 shows the rectifier station

with the new converter transformer and in the corresponding inductive

filtering method and the inverter station with the traditional

converter transformer and in the passive filtering method.

It is necessary to clarify that the double-tuned filter (DT5/7)

is not needed when we consider suppressing fifth and seventh

harmonic currents in the wiring method of the new converter

transformer in the rectifier station. Here, due to the high content

of fifth and seventh harmonics, in order to remove their negative

effect of fifth and seventh harmonics on the converter transformer,

we have designed the DT5/7. In Fig. 7, HP2 indicates

the second-order high-pass filter; Zr and Zi, respectively, indicate

the system impedance of the rectifier and the inverter side,

and and , respectively, indicate the inductance of the rectifier

and the inverter side.

B. Contrast Analysis of Simulation Results

Fig. 7 shows the phase current FFT of the secondary terminal

of the traditional converter transformer and that of the

Fig. 8. Phase current FFT of the primary terminal of the traditional and the

new converter transformer. (a) FFT of primary phase current I corresponding

to Fig. 1. (b) FFT of primary phase current I corresponding to Fig. 2.

TABLE I

COMPARISON OF THE HARMONIC CONTENT OF THE SECONDARY SIDES

OF THE NEW AND THE TRADITIONAL CONVERTER TRANSFORMERS

New converter transformer. It can be seen that the harmonic content

of each order of the traditional and the new converter transformers

is similar, which is determined by the nonlinear load,

that is, the converter. However, as for the primary phase current

of the transformer shown in Fig. 8, it can be seen that the primary

phase-current waveform of the new converter transformer

is better than that of the traditional one, which is determined

by the wiring method of the transformer and by the filtering

method. We can see that adopting the new winding wiring and

the inductive filtering method can effectively suppress the 5th,

7th, 11th, and 13th harmonic currents that only flow in the secondary

winding of the new transformer, so the THD shown in

Fig. 8(b) is lower than that in Fig. 8(a). Table I shows the FFT

value of the exact harmonic contents of Figs. 7 and 8, which further

proves the correctness of the above analysis.

Fig. 9 shows the phase current FFT at the grid side of the

rectifier and the inverter station, respectively.We can see that the

waveform of the phase current in Fig. 9(a) is better than that in

Fig. 9(b), which is caused by the new inductive filtering method.

Considering the effect of the system impedance, the resonance

point of the passive filters cannot be reached. So the filtering

effect is not ideal, as shown in Fig. 9(b). While adopting the

inductive filtering method, the harmonic currents are confined

by the coupling-windings of the new converter transformer, so

the resonance point of the tap filters can be reached. Therefore,

we can obtain the ideal phase current waveform at the grid side

shown in Fig. 9(a).Acomparison of the exact harmonic contents

is shown in Table II.

1430 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 23, NO. 3, JULY 2008

Fig. 9. Phase current FFT at the grid side of the rectifier station and the inverter

station, respectively. (a) FFT of phase current I at the grid side of the rectifier

station corresponding to Fig. 6. (b) FFT of phase current I at the grid side of

the inverter station corresponding to Fig. 6.

TABLE II

COMPARISON OF THE HARMONIC CONTENT OF THE GRID SIDES

OF THE RECTIFIER STATION AND THE INVERTER STATION

V. CONCLUSION

In 12-pulse HVDC transmission systems, the secondary

windings of the new converter transformer adopt prolonged

delta wiring, which brings about good symmetrical characteristics

to its structure. Each phase short-circuit impedance can be

equal. It can facilitate the reliable commutation and the sound

operation of the converter. The equivalent impedance of the

secondary common winding is approximately 0, which provides

good conditions for inductive filtering. The resonance point of

the tap filters of the new transformer can be reached without the

consideration of the effect of the system impedance. Simulation

results verify the correctness of our theoretical analysis, and

show that the filtering effect of the inductive filtering method

is better than that of the traditional passive filtering method.

Adopting the new converter transformer and the corresponding

inductive filtering method can optimize the structure of HVDC

transmission systems, greatly reducing the negative effect of

harmonic on the operation of the transformer and improving

the filtering effect at the ac side of HVDC systems.

Wellsprings of Knowledge: Beyond the CBC Policy Trap

2012-06-17T08:03:00.001-07:00

Wellsprings of Knowledge: Beyond the CBC Policy Trap

Catherine Murray (School of Communication, Simon Fraser University)

Abstract: The CBC/Radio Canada is in a policy trap which is endemic to all cultural policy today. A casualty of the 1990s policy focus on the cultural industries, the traditional public interest discourse has failed to gain a toehold in arguments favouring a continued state role in the development of cultural capital. This paper explores a cultural capital perspective and argues for a closer link with and co-ordination between education and culture in policy fields at both the theoretical and operational levels. The paper concludes that the instrumental utility of a cultural capital approach is ultimately too limiting. What is needed is a theoretical shift from public interest rhetoric to a democratic rights-based discourse. Such a shift in the conceptual underpinnings of cultural policy implies radical decentralization and deconcentration of control within the CBC. New models of democratic cultural governance are needed to reclaim public broadcasting.

Résumé: Radio-Canada/CBC s'empêtre dans des politiques communes à toute culture politique aujourd'hui. Le discours traditionnel sur l'intérêt public, victime des politiques des années 90 axées sur les industries culturelles, n'a pas réussi à s'infiltrer dans les arguments favorisant une participation soutenue de l'état dans le développement du capital culturel. Cet article examine une perspective appuyant cette idée de capital culturel et prône un rapport et une coordination plus étroites entre éducation et culture dans les politiques, autant au niveau théorique qu'opérationnel. Cet article conclut qu'une approche prônant l'idée de capital culturel a en fin de compte une utilité instrumentale trop limitée. Il faudrait plutôt changer d'approche, passant d'une rhétorique défendant l'intérêt public à un discours démocratique fondé sur les droits de la personne. Une telle modification dans la conception des politiques culturelles entraînerait l'appui d'une décentralisation et déconcentration radicales à Radio-Canada. En somme, pour reconquérir la radiodiffusion publique, il nous faudrait de nouveaux modèles de gouvernance culturelle démocratique.

The CBC is in a policy trap: controversies over shutting down supper hour news, the Canadian Radio-television and Telecommunications Commission's (CRTC) license renewal decisions, and allegations of political editorial tampering during the Gustafson Lake and APEC affairs swirl around the CBC while its television audience share declines. Per capita funding levels have sunk to the bottom half of all public broadcasters, one fifth the level of Ireland or Germany. The political nadir was reached in the 2000 federal election campaign when the leak of the Alliance's plans to privatize CBC-TV failed to generate any sustained public debate, coinciding with an early resignation of Mme. Guylaine Saucier, the CBC's Chair of the Board. The CBC's only supporters are insiders: insider listeners or insider employees. The politics of self-interest, or fragmenting public interest, are rampant. To defend public broadcasting has become politically incorrect in Canada: a call for either the status quo or a return to a dimly remembered or fictitious golden age.

The policy trap

Official broadcasting policy in Canada, like many European nations, has its roots in the doctrine of public service which established a public radio and television monopoly (Rutherford, 1990). For the period of its hegemonic nationalist model, broadcasting policy in Canada was based on a stable division between elites and masses and an effective consensus around the public service principle among elites of all partisan stripes.¹

The Canadian public service doctrine was structured through three axes: Canada versus the U.S.; public versus private ownership; and high versus low culture. These axes have often been collapsed in policy discourses, resulting in a three-way reductionism: that the private sector reproduced American low culture, or its corollary; that the public sector reproduced Canadian high or merit culture (Angus, 1997). Such reductionism has led to a systematic suppression of key issues. The ideological compact between public service broadcasting and the nation masked internal social differences (Raboy, 1996), obscured transnational identity construction and flows (McGuigan, 1992), and avoided questions of democratic accountability. Public broadcasting culture was universal, eurocentric, and uniform. Two solitudes of policy discourse across English and French linguistic communities (de la Garde, Tremblay, Dorland, & Paré, 1994; Fletcher, 1998), a weak overlay of cultural federalism (Beale, 1999), and the privatization and stratification of policies concerning other ethno-linguistic groups (Roth, 1998) marginalized debates over public broadcasting and its relation to cultural, economic, or social policy concerns.²

In the 1990s, for the first time, the non-partisan compact supporting the public interest doctrine failed. The Reform party called for privatization of the CBC, revising that position by 1997 to target only CBC-TV. The call was later picked up by the Alliance, but buried in the 2000 federal election. Early in the decade, the Liberal government enacted cuts totalling $400 million, or 33% of the parliamentary appropriation. On top of a decade of indirect cuts by Conservative governments, achieved by not adjusting appropriations for inflation, the CBC's budget was reduced to half its size in the early 1980s, in constant dollars (Mandate Review Committee, 1996). Coalitions supporting the CBC failed to emerge. The Friends of Canadian Broadcasting, which claims to represent 40,000 members, escalated its oppositional lobbying tactics in defence of the CBC, targeting backbench MPs in swing ridings, staging protests in the Minister's home riding, and leaking internal memoranda to the press - but failed to bridge to other social movements, artists, or groups active in cultural politics. Independent policy inquiries, by the Parliamentary Committee or the Mandate Review Committee, experimented with new ways to frame the case for a public broadcaster unsuccessfully. Making Our Voices Heard, published almost at the same time as UNESCO's Our Creative Diversity, used a "made in Canada" cultural development frame to make the case for cultural policy and the centrality of a public broadcaster. Easily superseded by furor over the recommendations for an alternative funding structure manipulated by the cable lobby, the changes in conceptual framework were ignored.³

Today, the public service doctrine is in retreat. Policy literature shows an almost complete absence of language promoting Canadian national unity or national consciousness, a premise abandoned in law with the 1990 Broadcasting Act. A decline of deference has become the political characteristic of the times (Nevitte, 1996). There is a backlash against shadowy bureaucrats imposing cultural tastes, or elites defending special public institutions. The CBC now finds itself a public broadcaster in name only: increasingly adrift from political support, unable to justify its existence, and insufficiently distinguished from its private sector competition.

The CBC's policy trap is endemic to all cultural policy today. The strong association between nationalism as a movement, modernism, and public interest in culture has crumbled. The rise of free trade, the forces of economic globalization and digital networks, and the emergence of social movements pressing for recognition of minority groups, combined with postmodern cultural theory, have had a fundamental impact on cultural policy (McFadyen, Hoskins, Finn, & Lorimer, 1994). Nationalism as a defensive cultural stance is being displaced by new forms of cosmopolitan identity or a resurgence of tribalism, or local ethnic identity (Jensen, 1998). Eurocentric cultural elitism is in retreat. Modernist public interest discourse has little resonance in an age of postmodern politics (Mulgan, 1994). Left behind is a fundamental ideological vacuum at the heart of contemporary cultural policies (Bennett & Mercer, 1996).

Yet a public broadcaster still remains one of the primary sites of popular cultural practice in many nations. In a Bourdieu-inspired study of Australians' everyday cultural habits, public broadcasting proved the most open and accessible of cultural forms (Bennett, Emmison, & Frow, 1999). When rate of participation is compared across class structure for those with extensive postsecondary education and income and those with less formal education, public broadcasting has proved the least stratified cultural practice.

All cultural policymakers are struggling with the basic questions: Why do we need cultural policy? What does it represent? What difference does it make? Who should decide? How can political support for culture be mobilized? How can public broadcasting open up access to culture? What is the political opportunity structure for advancing cultural policy?

In cultural policy networks today, the idea of social or human capital is emerging as a legitimate sphere for state intervention and replacing national identity or unity discourse. Investments in healthy social relations are now seen as conducive to innovation in the knowledge economy and to sustainable economic growth. Cities use their cultural resources to attract the highskilled labour they need to establish technopoles. A cultural capital or resource-based frame for cultural policy discourse establishes an instrumental need for culture, at the engine of innovation.

A cultural capital argument

Scholars must rethink the role of public broadcasting in the so-called knowledge economy. A casualty of the 1990s policy focus on the cultural industries, the CBC has failed to gain a toehold in the arguments favouring a continued state role in the development of human capital, or innovation in the globalizing economy.⁴ Federalism bifurcates the obvious convergence between public broadcasting and education in this country, to the detriment of successful repositioning of the CBC.

Article Title

Using Contemporary Psychological Perspectives in Re-Understanding
Taiwanese EFL Development: Observations and
Implications for Tertiary Education

Author

Joseph Anthony Narciso Z. Tiangco, Ph.D.

Bio Data:

Dr. Tiango started his career 12 years ago as an English teacher for elementary school students in the Philippines. Later he joined the Department of Psychology of De La Salle University-Manila, Philippines. Currently, he is affiliated with the Applied Foreign Languages Department of Shu-Te University in Taiwan. His research interests are cognitive psycholinguistics, psychology of learning, philosophical issues concerning language and identity, and cultural postmodernism.

Abstract
The paper argues that EFL teaching and learning in Taiwan can be enriched by integrating contemporary perspectives in psychology that deal with the areas of psychology of learning and language development to help Taiwanese college students in their study of the English language. Specifically, the first part of the paper is a discussion regarding the implications of both the Information-Processing Theory and Social-Behavioral Perspective alongside the author's experience in handling Taiwanese students at the tertiary level. The second part of the paper focuses on the author's recommendations with the hope of improving the plight of EFL teaching in Taiwan and in developing the general English proficiency of college students. As a whole, the paper argues for the consolidation of EFL language policies, the language curriculum, and teaching strategies within an espoused and viable theoretical paradigm other than focusing on the traditional approaches utilized in the country. This is meant to boost efforts to internationalize the human resources in Taiwan towards national and global competitiveness.

Keywords: EFL, Psychology of Learning, Cognitive Psycholinguistics, Taiwanese EFL Students, EFL Teaching

Introduction
Taiwanese society has put much pressure on itself to develop the EFL proficiency within the country in the hope of gaining more access in the global arena of international trade and commerce (Carey, 1998; Thompson, 2003; see also, Mok & Lee, 2001 for a discussion on the higher education reforms in Taiwan as brought about by globalization). To cope with the demands that accompany internationalization, awareness has been growing regarding the importance of English language study for both social and economic mobility. For some, it is a career-related necessity in order to gain prestige and move up the corporate ladder. For others, it is like mining for gold especially in consideration of what Krashen (2003) calls as the English fever that looms over the country. Hence, it is observable that learning English in Taiwan, as a foreign language, has become a fashionable trend and business other than studying it for scholarly purposes (Liu, 2002; Taipei Times, 2003). Alongside the developments in EFL teaching and learning that have been transpiring all over the country, pervasive issues can also be said to continuously persist. Sadly, these issues haunt Taiwan's efforts in internationalizing the potentials of its human resources (see Huang, 2003b; Huang, 2003c; Thompson, 2003; Taipei Times, 2002; Yiu, 2003; Yun-Ping, 2003). These issues pose a concern, not only for the parents and students themselves, but the whole educational system as well (Carey, 1998).

Specifically, the tertiary educational system in Taiwan partly carries the burden in internationalizing the potentials of its human resources (Tiangco, 2004). It plays a crucial role in the sense that it is responsible for preparing undergraduate students for future careers and in providing them with the necessary skills to become productive members of both industry and government. It is also responsible for providing continuing education programs such as courses in English for students with a college degree but would like to study the language further without embarking on a formal graduate or post-graduate EFL/ESL degree program. More importantly, the influence of globalization presents a challenge to higher education for it to provide relevant language training and education to promising Taiwanese in preparing them for global-competitiveness. Subsidies are being provided to those interested in pursuing post- graduate degrees in foreign countries. Obviously, all of these reflect the great importance the Taiwanese place on learning English as a foreign language (Baker, 2003).

Although the responsibility should really fall on the Ministry of Education and its general language program as a whole, but pressure is mostly felt at the tertiary level. Such pressure is evident in the increase in the number of Applied Foreign Languages Department in different tertiary educational institutions (Su, 2004). An increase demand for foreign teachers is also evident (Shu-ling, 2003). Moreover, preparing and taking standardized language tests such as the General English Proficiency Test (GEPT) and the Test of English for International Communication (TOEIC) have definitely become a routine for most college students. To every extent it has now even become a burden wherein teachers teach in order for students to pass the said tests (Chang, 2003)

Amidst efforts to create a national bilingual environment in the next few years to come (see, Oladejo, 2003), most Taiwanese students continuously grapple with the intricacies involved with vocabulary acquisition, the grammatical features of English, and the desire and preoccupation to develop an accent similar to native English speakers. Taiwanese technology, college, and university students are cut-off from the intellectual vibrancy involved in the critical study of the English language. Higher-order language skills are underdeveloped given the predicament that basic skills are not well-formed and largely remain unstable. And yet, high educational demands such as emphasis on tests and the crammed memorization of words are a reality for most students (Thompson, 2003). Little room is provided for intellectual flexibility that allows Taiwanese students to exercise creativity to test their capacity for intellectual reasoning using the English language. Consequently, the prevalent perception remains regarding the disappointing general English proficiency of some Taiwanese college students in spite of the high cost of learning, expensive books, and enrollment at expensive cram schools (Yiu, 2003).

Some of these students will later on become the next generation of teachers who are going to handle English courses in different levels, which Oladejo (2003) regards as not competent enough to teach English using the language itself as a medium of instruction. In connection to this, is it still worth pointing a finger as to who is to blame amidst the problems and issues identified?

The paper argues that perhaps a new outlook should be undertaken in Taiwan given the backdrop of the issues presented. Specifically, this outlook aims at a more theoretically grounded approach to EFL teaching vis-à-vis sensitivity to contemporary developments in psychology. The first part of the paper outlines the theoretical implications of the Information-Processing Theory and the Behavioral and Social Learning Perspectives. Within this context, the specific implications of these theoretical standpoints shall be discussed as it can be applied inside the EFL classroom. The second part of the paper focuses on anecdotal observations and recommendations in improving the plight of Taiwanese EFL development at the tertiary level within the framework of the theoretical standpoints presented.
Contemporary Psychological Perspectives and EFL Learning:
Implications to Taiwanese Learners
Background knowledge of psychology plays an important role in facilitating the processes involved in both language teaching and language learning (Bernardo, 1998; Chomsky, 2000; Clarke & Silberstein, 1987; Krashen, 1987; Krashen, 2003; Taylor, 1990; Williams & Burden, 1997). More importantly, knowledge of both the theoretical and practical applications of cognitive psychology to EFL/ESL learning and teaching can definitely yield fruitful results (Barrow, 1990). Hence, it can be argued that psychology has a clear role in facilitating language development and teaching even within the context of EFL learning in Taiwan.

Taiwanese teachers handling tertiary EFL courses, therefore, should be made aware that the study of any language is not bound by a structural linguistic approach that is limited to syntax, phonology, and the memorization of vocabulary words. From a psycholinguistic perspective, it is equally important to understand how the mind acquires and processes linguistic information for use in communication (Deuchar & Quay, 2000). In relation to this, the study of English should not be detached from understanding how the mind is able to think and process information in the first place (Chomsky, 2000; Deuchar & Quay, 2000; Muter & Johns, 1985; Stemmer, 1999).

Good Client Relations
The Key to Succe$$
by Stuart A. Forsyth

Your phone is ringing. It’s a new client who wants to talk with you about a serious legal problem. Wait. Think before you pick up the phone, because you are about to do something they didn’t teach you in law school: relating to your clients. Studies show that how well lawyers relate to their clients is just as important to their success as all those other things they did teach you in law school. You should be aware of this fact, and take it into account in conducting your practice.

What Clients Think About Lawyers

For years surveys have shown that clients generally like their own lawyer but do not like the other side’s lawyer. Perhaps that is a natural cost of our adversarial system. But a new, disturbing trend is developing. Recent surveys reveal that growing numbers of clients do not like their own lawyer, either. State Bar data indicates that poor relationships with clients are triggering numerous malpractice claims, fee disputes and complaints to the State Bar — adding significantly to lawyers’ costs in time and money.

The public ranks lawyers 56th in honesty and integrity out of a list of 71 professions. Lawyers, for example, rank ahead of real estate agents, local politicians, prostitutes and drug dealers—but behind cab drivers, newspaper reporters, stockbrokers, TV talk show hosts and many, many others. Recall the last time you took a cab; the public trusts the honesty and integrity of that cab driver more than yours as a lawyer. Of all the traditional honored professions, the public perceives lawyers as having the least honesty and integrity.

According to the 1995 Hart survey conducted by the American Bar Association, 56 percent of clients have an unfavorable impression of their own lawyers. Only 38 percent have a favorable impression. And a concurrent poll conducted by the National Law Journal indicated that those clients who use lawyers the most, like them the least.

The ABA survey showed that our clients think we are knowledgeable and able to solve problems. But they do not think that we put them first or that we are dedicated to their rights. They do not view us as honest, ethical, easily understood or compassionate. Indeed, we are perceived as being greedy and making too much money.

Is this because we are failing to deliver competent legal services? No. The studies show that lawyers usually do not fail in the law, i.e., technical competence.

Lawyers fail most often in communicating with clients, reaching agreements about fees and managing their practices — the "business" side of the practice of law. In a way this should not be surprising. How many of us even met a client in law school? Most of us were never taught the business of practicing law, nor how to relate effectively to our clients.

What Clients Really Want From Their Lawyers

So what do clients want? Studies have shown that clients want their lawyers to be dedicated and communicative, and (surprisingly) they want these two things even more than they want their lawyers to be competent or fair with fees.

Of course clients want quality legal services, and they do expect their lawyers to be competent. But we do not get much credit for our legal competence because that is the essence of the definition of a profession: competence. Our clients expect us to be competent precisely because we are members of the legal profession.

Interestingly, what clients really want is good customer service and common business courtesy. They are willing to pay to get it. They are quite able to judge whether or not they have received it and to complain when they haven’t. Many clients use customer service and courtesy — not competency — to evaluate lawyers.

We know from the business world that customers want service, value and respect.

Your clients want quality legal services, reasonable fees, communication from you and your commitment to them and their goals.

Complaints to the State Bar

Clients are complaining in growing numbers. On average, someone contacts the State Bar to complain about the conduct of one out of every four lawyers in Arizona, each and every year.

Many of these complaints involve problems in communication, and two-thirds come from just five areas of practice: domestic relations, torts, criminal law, bankruptcy and wills and estates.

What are clients complaining about? The number one complaint is, "My attorney won’t return my telephone calls!" Failure to respond to written communications is the sixth most frequent complaint.

Have you ever ordered something from a mail-order company, and when the package arrived you discovered they had sent the wrong item? You call the company to straighten out the order, but they will not take the merchandise back without a "return authorization number." The person you are talking with can’t give you one, and the person who can is out to lunch, so they take your number and promise to call back. But they don’t. You call again and ask for the person who can help, but he or she is busy on another call so you leave your number again. After a few days of this you finally get the return authorization number and ship the merchandise back. How do you feel about that mail order company? Will you ever do business with them again? What will you tell your friends about them?

That’s exactly how far too many clients feel about their own lawyers today. They are frustrated because they have retained a lawyer to look out for their best interests and now they can’t get in touch with their own lawyer. The trust which is at the very heart of the attorney-client relationship begins to erode, and clients start to wonder if their lawyer is looking out for his or her own interests more than the client’s interests.

Malpractice Claims

These dissatisfied clients have significant and costly impacts in other areas, too. Lack of competence in communication skills and misunderstandings concerning fees are listed by Oregon’s Professional Liability Fund as two of the five major causes of malpractice losses. One malpractice carrier has estimated that 40 percent of the claims made against its insured lawyers are nothing but client relations problems. They will not pay a single penny in substantive liability, but they sure will pay to defend them; and the cost of defense will show up in your malpractice insurance premiums.

If you talk to those in the industry, they have a very interesting saying: "Clients don’t sue lawyers they like, even when they have committed malpractice; clients do sue lawyers they don’t like, even when they haven’t committed malpractice." We tend to think of malpractice in substantive terms: did we do anything wrong? But that’s not what causes the lawsuit. The lawsuit is triggered by how the client feels about the lawyer.

Fee Disputes

The public’s attitude towards lawyers’ fees has changed dramatically in the past few years. A 1986 poll by the National Law Journal revealed that about 22 percent of the public perceived lawyers’ fees as too high; by 1993 that figure had jumped to 42 percent.

A 1992 California fee arbitration study found that 94 percent of fee disputes could have been avoided entirely if the lawyer had done just two things: (1) improved communication with the client and (2) furnished a written fee agreement.

What Can We Do as a Profession?

The most important thing we can do is to recognize that we have a problem and take responsibility for solving it.

As Joan D. Johnson, Director of Loss Prevention/Underwriting for the Oregon Professional Liability Fund, has observed: "The real problems are human, common sense problems. For example, lawyers don’t know how to talk to their clients, especially about fees."

Lawyers are wonderful problem solvers, and we need to use those skills for our own benefit. We need to realize that this problem is not just about image; it is about our conduct. The many clients who have experienced poor business relations with their own lawyers are a major reason for public dissatisfaction with the legal profession as a whole.

The most powerful influence shaping the image of Arizona lawyers is the day-to-day conduct of each of us as lawyers with our clients and colleagues. That’s why the ABA suggests that this problem be addressed one client at a time.

What can you do to be part of the solution? Begin to see your clients as customers and as sources of referrals. Studies show that most clients retain and relate to individual lawyers, not law firms. As much as 80 percent of your future clients will come from word-of-mouth referrals by your current and former clients. Practice common business courtesy in dealing with your clients. Try to see things from their perspective and treat them as you would like to be treated if you were in their situation.

What Can You Do to Create and Maintain Good Client Relations?

Take responsibility for creating and maintaining good client relations in your own law practice. The practice of law is not just a profession; it is a service profession. Broaden the definition of your own job: go beyond just solving legal problems and encompass how well you and your office relate to your clients (and others) while solving them. Furnish quality legal services and good customer service. Creating and maintaining good client relations is your responsibility.

Establish a comfortable setting for meeting with your clients. Some lawyers like to meet with their clients around a conference table (particularly a round one) rather than from behind a desk to create a more cooperative, less imposing atmosphere. The area should be free of clutter (especially other client files!) so that your clients can feel that they have your complete and undivided attention. For the same reason, you should hold all telephone calls during client conferences; if you do need to take a call, let your clients know in advance that your meeting may be interrupted. Items which reflect your hobbies or personal interests can be icebreakers and help you appear more personable. You should also take note of your clients’ personal interests to show that you are interested in them as people as well as sources of business.

POWER SYSTEM OPERATION AND CONTROL

2012-06-05T21:06:00.001-07:00

EE 1401 – POWER SYSTEM OPERATION AND CONTROL

PART A

UNIT I

1. What is the objective of power system control?

2. What is the objective of power system operation and control?

3. What is load curve?

4. What is daily, Weekly, Annual load curve?

5. What is load duration curve?

6. Define load factor.

7. Define diversity factor.

8. Define spinning reserve.

9. Define Cold reserve.

10. Define hot reserve.

11. Define Maximum Demand.

12. Define demand factor.

13. What is plant use factor?

14. Define reserve

15. Define Plant capacity factor.

16. What is the necessity of frequency regulation in power systems?

UNIT II

1. What is the necessity for frequency constancy in a power system? (M/J 2006)

2. What is the need for frequency regulation? (M/J 2006)

3. What is the need for voltage regulation in power system? (M/J 2006)

4. What happens to frequency if the load on the generator increases? (M/J 2006)

5. What is meant by AFRC? (M/J 2006)

6. State the difference between P-f and Q-lVl.(N/D 2006)

7. Define area control error.(M/J 2006)

8. Give the two control loops of large generators. (A/M 2005)

9. What is the basic role of ALFC?(N/D 2004)(N/D 2006)

10. What is meant by control area? (N/D 2004)(N/D 2005)

11. Specify the disadvantage of ALFC loop.(A/M 2005)

12. Write the tie line power deviation equation in terms of frequency?(N/D 2005)

13. List the advantage of multi area operation. (M/J 2007)

14. Define Control area

15. Define AGC

UNIT III

1. List the various components in AVR loop. (N/D 2004)

2. State whether changes in AVR loop will be reflected in ALFC loop.(N/D 2004)

What is meant by stability compensation?(M/J 2007)

4. Name the methods of voltage control in network

Write the need for Stability Compensator.

6. Draw a simple brushless AVR loop.

7. Compare SVC and series capacitor.

What is SVC?
What are the applications of tap changing transformer?
What is synchronous condenser?

UNIT IV

1. What is the purpose of economic dispatch?

2. Write the co- ordination equation taking the effect of losses.

3. What is meant by unit commitment?

4. Write the constraints in Unit Commitment.

5. Write the co- ordination equation without losses.

6. What is meant by incremental cost curve?

7. Name the different solution methods for unit commitment.

UNIT V

1. List the factors that affect power system security.

2. Denote the hierarchical levels used in EMS.

3. Name the methods of voltage control in network

4. List the functions of energy control centre.

5. What is SCADA?

6. List the functions of SCADA.

7. What are the functions of EMS?

8. Name the different states of a power system.

9. What is power system security?

10. Define state estimation in a power system.

PART B

1. A generating station has the following daily load cycle:

Time (hours)	0-6	6-10	10-12	12-16	16-20	20-24
Load(MW)	20	25	30	25	35	20

Draw the Load curve (1)and load duration curve(1) and find

i. Maximum demand(2)

ii. Units generated per day(2)

iii. Average Load(2)

iv. Load Factor.(2)

2. Consider an inductive Load of type Z=R+jX

i. By how many percent will the real load drop if the voltage is reduced by 5 percent?(8)

ii. How would a 2 percent drop in frequency affects the real load, if the load is assumed to have a power factor of 0.8.(8)

3. A Power station has to meet the following demand.

Group A:200kW between 8 A.M and 6 P.M

Group B:100kW between 6 A.M and 10 A.M

Group C:50kW between 6 A.M and 10 A.M

Group D:100kW between 10 A.M and 6 P.M and 6 P.M and 6 A.M

Plot the daily load cure and load duration curve and determine

(i) diversity factor

(ii) units generated per day

(iii) load factor.

1. Using a simplified functional diagram explain the operating features of a speed governing system.(8) (M/J 2006)

2. Develop a linear mathematical model of a speed governing system.(8) (M/J 2006)

3. Explain the static and dynamic response of ALFC control loop.(8)(N/D 2004)

4. Explain the technique involved in load frequency control (LFC)of a single area

system.(8) (M/J 2006)

5. Explain the principle , involved in tie line frequency control in case of two area system.

(M/J 2006)

6. Develop a linear mathematical model of two area system.(8)(N/D 2004)

7. Explain the tie line bias control of two area system .(8)(N/D 2004)

8. Briefly discuss the LFC control of single area systems.(16)(N/D 2005)

9. Explain the dynamic response of two area system.(8) (N/D 2005)

10. Develop a linear mathematical model of two area system.(6)

11. Explain the tie line bias control of two area system.(6)

12. Describe the expression for Critical gain (4)

13. A single area controlled system has the following data(8)

Area capacity =2000MW

Operating Load=1000MW

R=2.4Hz/p.u.MW

Find K_I and find the nature of roots for K_I=1.

14. Determine the primary ALFC loop parameter for a control area having the following

data :

Total rated area capacity, P_r =2000MW

Normal Operating Load,P_d=1000MW

Inertia constant ,H= 5 sec

R=2.4Hz/p.u.MW(all area generators)

We shall assume that the load frequency dependency as linear meaning that the old load would increase 1% for 1% frequency increases.

15. A single area controlled system has the following data(8)

Area capacity =3000MW

Operating Load=1500MW

R=3%

H=5 sec and frequency=50 Hz

Compute steady state drop in frequency in Hz for a step load changing of 25MW

16. Two 50 Hz power station are connected by means of an interconnected cable of negligible

impedance so that the station are in parallel. Station A has a full load capacity of 15 MW and uniform speed regulation of 3%, Station B has a capacity of 4MW and a uniform speed regulation of 4%. The load on the bus bar of station A is 10MW and B is 4MW. Calculate the generated output of each station. The power transmitted by the interconnected and the operating frequency .Assume frequency governor action and the speed changer of generator were set to have a frequency of 50 Hz

4. Develop a mathematical model of an exciter system and brief on its control action. (8)

5. Explain the static and dynamic performance of AVR loop . (8)

6. With the neat flow chat explain dynamic programming method in unit commitment.(8)

7. For a simple two unit system the loss coefficients are

B₁₁=0.001

B₁₂=-0.0005

B₂₂=0.0024

dC₁/dP₁=0.08P₁+16 Rs/MWhr.

dC₂/dP₂=0.08P₂+12 Rs/MWhr.

Find the generation P1 and P2 for l=50, also compute the transmission loss and total load . (8)

8. Explain the static VAR compensators(8)

1. Derive the relation between voltage , power and reactive power at a node. (8)

2. Write about the stability compensation of AVR loop . (8)

3. Develop an iterative algorithm for solving the optimum dispatch equation of an ‘n’ bus power system taking into account the effects of system losses (8)

4. A generating station has two units A and B. The incremental operating cost of the two

units are as follows

Unit A:l₁=0.1P₁+20 Rs/MWhr.

Unit B:l₂=0.12P₁+16 Rs/MWhr.

Where P1=load on unit A in MW,P2=load on unit B in MW,Calculate the load distribution based on economic loading of two generating stations for load of 180 MW (8)

5. Consider three units,

C₁=561+7.92P₁+0.00156P₁²

C₂=310+7.85P₂+0.00194P₂²

C₃=780+7.97P₃+0.00482P₃²

Unit Minimum Maximum

1 150 600

2 100 400

3 50 200

Find the priority by which the units are committed and de committed in unit commitment problem. (8)

1. a)(i)Develop a mathematical model of an exciter system and brief on its control action. (8)

(ii)Explain the static and dynamic performance of AVR loop . (8)

2)(i)Explain the static VAR compensators with a phasor diagram. (8)

(ii)Discuss the effect of compensation on the maximum power transfer in a transmission lines. (8)

3.(i)Explain the tasks of energy control center and its interaction with individual power plants.(8)

(ii)Explain the different functions that are performed by SCADA systems (8)

(Or)

4)(i)Classify and distinguish between the various operating states of power system (8)

(ii)Explain briefly how the system states are continuously monitored and controlled. (8)

EE 1352 P0WER SYSTEM ANALYSIS

2012-05-23T01:24:00.002-07:00

QUESTION AND ANSWERS

TWO MARK QUESTION

1. What are the main divisions of power system?

The generating system,transmission system,and distribution system

2. What are the adv. Of interconnected power system?

1.less no. of generators are required as areserve for operation at peak loads.Hence the

reserve capacity of the generating station gets reduced.

2.less no. of generators which are running without load are required for meeting the sudden

unexpected increase in load.

3. it allows the use of most economical sources of power depending on time.

3.What are the problems of interconnection?

1.it increase the amount of current which flows when a short circuit occurs on a system and

thereby requires the installation of breakers which are able to interrupt a larger current‘

2. synchronism must be maintained between of all the interconnected systems .

4.Define one line diagram.

A simplified diagram by omiting the completed circuit through the neutral and by indicating

the components of the power system by standard symbols rather than by their equivalent circuits.

5.What is meant by impedance diagram.

The equivalent circuit of all the components of the power system are drawn and they are

interconnected is called impedance diagram.

6.What is meant by reactance diagram.

Omitting all static loads ,all resistance. The magnetizing components of each transformer and

the capacitance of the transmission line are reduced from the impedance diagram is called

reactance diagram.

7.Define per unit value.

Per unit of any quantity is defined as the ratio of the quantity ti its base value is expressed as a

decimal.

8. Need for per unit value

the per unit impedance referred to either side of a single phase transformer is the same.

The chance of confussion b/n line and phase quantities in a three phase balanced system is

greatly reduced.

The manufacturers usually produce the impedance values in per unit.

9.Define base current.

Ratio of base MVA to base KV

10.What is the need for short circuit study.

To determine the current interrupting capacity of the circuit breakers so that the faulted

equipments can be isolated.

To establish the relay requirements and settings to detect the fault and cause the circuit breaker

to operate when the current flowing through it exceeds the max. value.

11. Define stability study.

Stability studies are performed in order to ensure that the system remains stable

following a severe fault or disturbance.

12. What are the eliments of y bus matrix.

short circuit driving point adm. Short circuit transfer admittance.

13. What are the eliments if Z bus matrix.

Open circuit driving point impedance, open circuit transfer impedances.

14.What are the methods to determine the Ybus$Z bus matrices.

Primitive n/w, n/w grafh theory , incidence matrix

15.What is primitive n/w

Primitive network is a set of unconnected elements which provides information

regardin.

Primitive n/w is a set of unconnected eliments which provides information

regaurding the characteristics of individual eliments only.

16.what is meant gy grafh of a n.w.

Agrafh shows the geometrical interconnection of the elements of a n/w.

17. Define sub graph?

Asub graph is any subset of elements of a graph.

18 What is meant by path of a n/w?

Apath is a subgraph of connected elements with not more than two elements

connected to any one nide.

19.What is meant by connected oriented graph?

Agraph is connected if and only if there is a path b/n every pairs of nodes.If each

element of the connected graph is assigned a direction it is called oriented graph.

20.What are the properties of a graph.

Tree is a sub graph connecting all the nodes of the oriented graph.

Tree is a connected subgraph.

21.Define basic cutest?

Acutset is the minimum set of elements in the graph, which when removed, divide a

connected graph inti two connected subgraph.

22. What are the quantities whose base values are required to represent the power system

by reactance diagram.

The base values of voltage, current, pwer and impedance are required to represent the

power system by reactance diagram. Selection of base valuesfor any two of them

determines the base values of the remaining two.

23.What is the need for base values?

The components of power system may operate at different voltage and power levels. It

will be convenient for analysis of power system if the voltage, power, current ratings of

the components of the power system is expressed with referance to a common value

called base value.

24.What is impedance and reactance diagram?

The impedance diagram is the equivalent circuit of power system in which the various

components of power system are represented by their approximate equivalent circuits.

The impedance diagram is used for load flow studies.

The reactance diagram is the simplified equivalent circuit of the power system in which

the various components are represented by their reactance. The reactance ddiagram can

be obtained from impedance diagram if all the resistive components are neglected.

25. What are the approximations made in impedance diagram?

The neutral reactances are neglected.

The shunt branches in equivalent circuit of induction motor are neglected.

26. What are the approximations made in reactance diagram?

The neutral reactances are neglected.

The resistances are neglected.

All static loads and induction motors are neglected.

27. What is a bus?

The meeting point of various components in a power system is called a bus. The bus

is a conductor made of copper having negligible resistance. The buses are considered as a

points of constant voltage in a system.

28. What is bus admittance matrix?

The matrix consisting of the self and mutual admittances of the network of a power

system is called bus admittance matrix.

29. Name the diagonal and off diagonal elements of bus admittance matrix.

The diagonal elements of bus admittance matrix are called self admittances of the

buses and off diagonal elements are called mutual admittances of the buses.

30. What is bus imbedance matrix?

The matrix consisting of driving point impedances and transfer impedances of the

network of a power system is called bus impedance matrix.

31. Name the diagonal elements and off diagonal elements of bus impedance matrix.

The diagonal elements of bus impedance matrix are called driving point impedances

of the buses and off diagonal elements of bus impedance matrix are called transfer

impedances of the buses.

32.What are the methods available for forming bus impedance matrix.

1. Form the bus impedance matrix and then take its inverse to get bus impedance

matrix.

2. Directly form the bus impedance matrix from the reactance diagram. This

method utilizes the techniques of modifications of existing bus impedance

matrix due to addition of new bus.

32. Write the four ways of adding an impedance to an existing system so as to modify

bus impedance matrix.

1. Adding a branch of impedanceZb from a new bus p to the referance bus.

2. Adding a branch of impedance Zb from a new busp to an existing bus.

3. Adding a branch of impedance Zb from an existing busq to the referance

bus.

4. Adding a branch of impedance Zb between two existing buses h and q.

33.What are symmetrical components?

An unbalanced system of N related vectors can be resolved into N systems of

balanced vectors. The N sets of balanced vectors are called symmetrical

components.

33. Write the symmetrical components of three phase system.

1.positive sequence components

3. negative sequence components.

4. zero sequence components.

34. What are positive sequence components?

The positive sequence components of a three phase unbalanced vectors consists of three

vectors of equal magnatude, displased from each other by 120 in phase and having the

same phase sequence as the original vectors.

35. What are negative sequence components?

The negative sequence components of a three phase unbalanced vectors consists of three

vectors of equal magnitude displaced from each other by 120 degree in phase and having

the phase sequence opposite to that of the original vectors.

36.What are zero sequence components?

The zero sequence components of a three phase unbalanced vectors consists of 3 vectors

of equal magnitude and with zero phase displacement from each other.

36. What are sequence impedance and sequence networks?

The sequence impedances are the impedances offered by the devices for the like

sequrnce component of the current.

The single phase equivalent circuit of a power system consists of impedances to current

of any one sequence is called sequence network.

37.What is meant by positive, negative and zero sequence impedance.

The impedance of the circuit element for positive, negative and zero sequence

component currents are called positive, negative and zero sequence impedances resp.

38.What is meant by positive, negative and zero sequence reactance.

The reactance diagram of a power system, when formed using positive, negative and

zero sequence reactances are called positive, negative and zero sequence reactance

diagram resp.

39.What is load flow or power flow study?

The study of various methods of solution to power system network is reffered to as load

flow study. The solution provides the voltages at various buses, power flowing in various

lines and line losses.

40.What are the information that are obtained from a load flow study.

The information obtained from a load flow study are magnatude and phase of bus

voltages,real and reactive power flowing in each line and the line losses. T he load flow

solution also gives the initial conditions of the system when the transient behaviour of

the system to be studied.

41.What is the need for load flow study.

The load flow study of a power system is essential to decide the best operation existing

system and for planning the future expansion of the system. It is also essential for

designing the power system.

42. What are the quantities associated with each bus ina system?

Each bus in a power system is associated with four quantities and they are real power,

reactive power, magnitude of voltage, and phase angle of voltage.

43. What are the different types of buses.

Load bus,generator bus,slack bus.

44.Define voltage controlled bus?

A bus is called voltage controlled bus if the magnitude of volte\age and real power are

specified for it. In a voltage controlled bus the magnitude of the voltage is not allowed to

change.

45. What is PQ bus?

A bus is called PQ bus when real and reactive components of power are specified for the

bus. In a load bus the voltage is allowed to vary within permissible limits.

46. What is swing bus?

Abus is called swing bus when the magnitude and phase of the bus voltage are specified

for it. The swing bus is the referance bus for load flow solution and it is required for

accounting line losses. Usually one of the generator bus is selected as swing bus.

47.What is the need for slack bus?

The slack bus is needed to account for transmission line losses. In a power system the

total power generated will be equal to sum of power consumed by loads and losses. In a

power system only the generated power and load power are specified for buses. The

slack bus is assumed to generate the power required for losses. Since the losses are

unknown the real and reactive power are not specified for slack bus.

48.What are the operating constraints imposed in the load flow studies?

The operating constraints imposed in load flow studies are reactive power limits for

generator buses and allowable change in magnitude of voltagefor load buses.

49What are the iterative methods mainly used for solution of load flow study.

The Guass sedal method and Newton Raphson method are the two iterative methods.

50.Discuss the effect of acceleration factor in load flow study.

The acceleration factor is a real quantity and it modify the magnitude of voltage alone.

51What is meant by flat voltage start.

In iterative methods of load flow solution, the initial voltages of all buses exept slack bus

are assumed as 1+j0 pu.This is reffered as flat voltage profile.

52.When the generator buses are treated as load bus.

If the reactive power constraints of a generator bus violates the specified limits then the

generator is treated as load bus.

53. What will be the reactive power and bus voltage whan the generator bus is treated as

load bus.

When the generator bus is treated as load bus, the reactive power of the bus is equated to

the limit it has violated, and the previous iteration value of bus voltage is used for

calculating current iteration value.

54. What are the advantages of Guass sedal methoa?

Calculations are simple and so the programming task is lesses.

The memory requirement is less

Useful for small systems

55 What are the disadvantages of Guass seidal method?

Requires large no. of iterations to reach converge

Not suitable for large systems

Convergence time increases with size of the system

56. How approximations is performed in Newton Raphson method?

In N-R method, the set of nonlinear simultaneous equations are approximated to a set of

linear simultaneous equations using tailors series expansion and the terms are limited to

first order approximation.

57.What is Jacobian matrix? How the elements of Jacobian matrix are computed.

The matrix formed from the first derivatives of load flow equations is called Jacobian

matrix.

The elements of Jacobian matrix will change in every itration. In each iteration the

elements of the jacobian matrix are obtained by partially differentiating the load flow

equations w.r. t a unknown variable and then evaluating the first derivatives using the

solution of previous iteration

58.What are the adv. Of N-R method?

The N-R method is faster, more reliable and the results are accurate.

Requires less no. of iterations

Suitable for large size system

59. What are the disadv. Of N-R method?

The programming is more complex

The memory requirement is more

60 What is off nominal turns ratio?

When the voltage or turns ratio of a transformer is not used to decide the ratio of base

KV then its voltage ratio is called off nominal turns ratio. Usually the voltage ratio of

regulating transformer will be off nominal ratios.

61 What is meant by a fault?

A fault in a circuit is any failure which interferes with the normal flow of current. The

faults are associated with abnormal change in current, voltage and frequency of the

power systwm. The faults may cause dan\mage to the equipments if it is allowed to persit

for a long time. Hence every part of the system has been protected by means of relays

and circuir breakers to sence the faults to isolate the faulty part from the healthy part in

the event of fault.

62Why fault accurs in a power system?

The fault occur in a power system due to insulation failure of equipments, flashover of

lines initiated by a lightning stroke, due to permanent damage to conductors and towers

63. How are faults are classified?

The faults are classified as shunt and series faults. The shunt faults are due to short

circuits in conductors and the series faults are due to oped conductors.

64.List the various types of series and shunt fault?

Shunt faults are,

Line to ground fault line to line fault, double line to ground fault, three phase fault.

Series faults are,

One open conductor fault

Two open conductor fault

64 What is symmetrical and unsymmetrical fault?

The fault is called symmetrical fault if the fault current is equal in all the phases. The

fault is called unsymmetrical fault if the fault current is not equal in all the phases.

65. Name any two methods of reducing short circuit current/

By providing neutral reactance.

By introducing a large value of shunt reactance between buses.

66. What is meant by fault calculations/

The fault condition of a power system can be dived into subtransient, transient and steady

state periods. The currents in the various parts of the system and in the fault are different

in these periods. The estimation of these currents for various types of faults at various

locations in the system are commenly reffered as fault calculations.

67.Define stability?

The stability of a system is defined as the ability of power system to return to stable

operation when it is subjected to a disturbance.

68. Define steady state stability

The stady statenstability is defined as the ability of a system to remain stable for small

disturbance.

69. Define transient stability?

The transient stabilitymis defined as the abilitymof a system to remain stable for large

disturbance.

70What is steady state state stability limit?

The steady state stability limit is the max. power that can be transferred by a machine toa

receving system without loss of synchronism.71 Define swing curve? What is the use of

swing curve.

The swing curve is the plot between the power angle and time. It is usually plotted for a

transient state to stydy the nature of variation in angle for a sudden large disturbance.

71.Define power angle/

The power angle is defined as the angular displacement of the rotor from synchronously

rotating referance frame.

72Define critical clearing time and critiacal clearing angle

The critical clearing angle is the max. allowable change in the power angle before

clearing the fault, without loss of synchronism.

The critical clearing time can be defined as thw max. time delay that can be allowed to

clear a fault without loss of synchronism.

73.Define equal area criterion?

The equal area criterion for stability states that the system is stable if the area under pvs

angle curve reduces to zero at some value of angle.

74.What is transient state stability limit?

The transient state stability limit is the max. power that can be transmitted by a machine

to a receiving system without loss of synchronism.In steady state the power transferred

by synchronous machine is always less than the steady state stability limit.

75.what is transient stability limit ?

The transient stability limit is the max power that can be transmitted by a machine to a

fault or a receiving system during a transient state without loss of synchronism.The

transient stability limit is always less than the steady state stability limit.

16 Mark questions

1.Explain the methods adopted in utilities for planning the operation of power system.

2Give some general aspects relating to power flow , short circuit and stability studies

3A 100 mva, 33kv three phase generator has a subtransient reactance of 15%. The generator is

connected to 3 motors through a transmission line and 2 transformers. The motors have rated

inputs of 30 mva,20mva,anm50mva at 30kv with 20%subtransient reactance. The three phase

transformer are ratted at 110mva,32kv/110kv with leakage reactance8%.Selecting the generator

rating as the base quantities in the generator circuit,determine the base quantities in other partsof

the system and evaluate the corresponding p.u values.

4.Define the per unit value of a quantity.How will you change the base impedance from one set of

base values to another set.

5.Explain the modellingof generator,transformer,transmission line,load,shunt capscitor,and shunt

reactor for sc ,power flow and stability studies.

6Asynchronous generator and asynchoronous motor each rated 25 MVA, 11KV HAVING 15%

SUBTRASIENT REACTANCE ARE CONNECTED through transformers and a line as shown

in fig. THE TRANSFORMERS are rated 25 MVA, 11/66 KV WITH LEAKAGE REACTANCE

OF 10% EACH. The line has a reactance of 10% ona base of 25 MVA,66kv

DIGITAL SIGNAL PROCESSING(EC 1361)

2012-05-23T01:22:00.001-07:00

1. Define signal?

Any physical quantity that carries information varies with other independent or

dependent variables.

2. What are the main types of signals with respect to time as independent variable?

Continous time (analog) signals &discrete time (discrete) signals

3. What is analog signal?

The analog signal is a continous function of independent variabls.The analog

signal is defined for every instant of independent variable and so magnitude of

independent variable is continous in the specified range.here both the independent

variable and magnitude are continous.

4. What is discrete signal?

The discrete signal is a function of discreted independent variabls.The

indindependent variable is divided into uniform interval and is represented by an

integer,The discrete signal is is defined for every integer value of independent

variable.here both the values of signal and independent variable are discrete.

5. What is digital signal?

The digital signal is same as discrete signal except that the magnitude of signal is

quantised.

6.What are the different types of signal representations?

a. Graphical representation

b. Functional representations

c. Tabular representation

d. Sequence representation

7. Define periodic and non periodic discrete timesignals?

If the discrete time signal repeated after equal samples of time then it is called

periodic signal.When the discrete time signal x[n] satis fies the condition

x[n+N]=x(n), then it is called periodic signal with fundamental period N samples.if

x(n) ¹x(n+N) then it is called nonperiodic signals.

0 __'HILQH_XQLW_VDPSOH_VHTXHQFH"WKH_XQLW_VDPSOH_VHTXHQFH_ _Q__DQG_LV_GHILQHG_DV__________________________________________ _Q_ _____IRU_Q _

0 for n_ __ _Q_

•1

9. .Define unit step sequence

A unit step sequence is denoted as u(n)=1 for n._

u(n) 0 other wise

…….. n

10.Define unit ramp sequence?

A unit ramp sequence is defined as r(n)= n for n._

0 other wise

r(t)

11..Define a system?

A system is a physical device or algorithm that performs an operation on the

signal

12.What is digital signal processing?

The dsp refers processing of signal by digital system.

13. What are the steps involved in digital signal processing?

a. Converting the analog signal to digital signal ,which is performed by A/D

converter

b. Processing the digital signal by digital systems.

c. Converting the digital output signal from the digital system to analog

signal by D/A converter.

14. What are the advantages of DSP?

a. The programme can be modified easily for better Performance.

b. Better accuracy can be achieved by using adaptive algorithm.

c. The digital signal can be easily stored and transported.

d. Digital systems are cheaper than analog equallent.

15. Give some applications of DSP?

a. Speech processing

b. Communications

c. Biomedical

16. Write the difference equation governing the Nth order LTI system.

N M

Y(n)=å ak y(n-k) +å bk x(n-k)

k=1 k=0

a. N is the order of the system

b. ak & bk are constant coefficients

c. y(n)&x(n) are output and input to the system

17. List the various methods of classifying discrete time systems?

a. Static and dynamic systems.

b. Time invariant and time variant

c. Linear and nonlinear

d. Causal and noncausal

e. Stable and unstable

f. FIR and IIR systems

g. Recursive and non recursive systems

18. What are static and dynamic systems? Give examples?

A discrete time system is called static(memory less)if it’s output at any instant

n dependent on the input sample at the same time (but does not depend on past or

future samples).If the response depends on past or future samples, then the system

is called dynamic system.

Eg.y(n)=ax(n) static system

Y(n)=ax(n)+bx(n-1)

19. Define time invariant system?

A system is said to be time invariant if it’s input output characteristics does

not change with time. Let H be a system and H{X(n)}=Y(n).now if H{X(nk)}=

Y(n-k) then the system H is called time invariant.

20. What is linear and nonlinear systems?

If a system satisfies superposition and homogeneity principles then the system

is called linear otherwise it is called nonlinear

If H is a system,X1(n) and X2(n) are inputs a and b are constants then

H{aX1(n)+BX2(n)}=aH{X1(n)}+bH{X2(n)} then His linear.

21. What is a causal system give an example?

A system is said to be causal, if the output of the system at any time n depends

on present and past inputs ,but does not depend on future inputs.

Eg.y(n)=x(n)+x(n-1)

22. Define a stable system?

Any relaxed system is said to be bounded input bounded output stable if and

only if every bounded input yields a bounded output.

å h(n)< µ where h(n)is impulse response of the system

n=-µ

23. What is LTI system?

A linear time invariant system is defined that a system obeys both linearity

and time invariant properties.

If a system satisfies superposition and homogeneity principles then the system

is called linear

A system is said to be time invariant if it,s input output characteristics does

not change with time.

24. What are FIR and IIR systems?

FIR (finite impulse response):this type of system has an impulse response

which is zero outside the finite time interval eg. h(n)=0 for n<0 and n>N

IIR (Infinite Impulse Response):An IIR system exhibits an impulse response

of infinite duration.

25. State sampling theorem.

A band limited continous time signal ,with higher frequency fc Hz can be

uniquely recovered from it’ s samples provided that the sampling rate F>2fc

samples per second.

26. Show whether the system is linear?

Y(n)=n x(n)

H{aX1(n)+BX2(n)}=a H{X1(n)}+b H{X2(n)} then H is linear.

a H{X1(n)}+b H{X2(n)}=anx1(n)+bnx2(n) ------------(1)

H{aX1(n)+BX2(n)}= anx1(n)+bnx2(n) --------------(2)

(1)=(2) So the system is linear.

27. Show whether the system is linear?

Y(n)=nx2(n)

Since x2(n) term is present in the system which implies non linearity in to the

system. Therefore the system is nonlinear.

28. Determine if the following system is time invariant or time variant?

Y(n)=x(n)+x(n-1)

If the input is delayed by k units in time we have y(n,k)=H{x(n-k)}=x(nk)+

x(n-k-1)

If we delay the output by k units then y(n-k)= x(n-k)+x(n-k-1)

So the system is time invariant.

29. Determine if the system described by the following equation is causal or not?

Y(n)=x(n2)

For n = -1

Y(-1)=x(1)

For n = 2 Y(2) = x(4)

Therefore the output of the system depends on future input and hence the

system is non causal.

30. Define unit sample response of a system and what is it’ s significance?

The response of a system denoted as h(n),obtained from a discrete time

system when the input signal is a unit sample sequence is known as unit sample

response.

31. Define z transform?

The Z transform of a discrete time signal x(n) is defined as

X(z) = ._[_Q_]-n

n= -.

where z is a complex variable. In polar form z=re-jw

32. What is meant by ROC?

The region of convergence (ROC) is defined as the set of all values of z for

which x(z) converges.

33. Explain about the roc of causal and anti-causal infinite sequences?

For causal system the roc is exterior to the circle of radius r.

For anti causal system it is interior to the circle of radius r.

34. Explain about the roc of causal and anti causal finite sequences

For causal system the roc is entire z plane except z=0.

For anti causal system it is entire z plane except z=._

35. What are the properties of roc?

a. The roc is a ring or disk in the z plane centered at the origin.

b. The roc cannot contain any pole.

c. The roc must be a connected region

d. The roc of an LTI stable system contains the unit circle.

36. Explain the linearity property of the z transform

If z{x1(n)}=x1(z) and z{x2(n)}=x2(z) then z{ax1(n)+bx2(n)}=ax1(z)+bx2(z)

a&b are constants.

37. State the time shifting property of the z transform

If z{x(n)}=x(z) then z{x(n-k)}=z-kx(z)

38. State the scaling property of the z transform

If z{x(n)}=x(z) then z{anx(n)}=x(a-1z)

39. State the time reversal property of the z transform

If z{x(n)}=x(z) then z{x(-n)}=x(z-1)

40. Explain convolution property of the z transform

If z{x(n)}=x(z) & z{h(n)}=h(z) then z {x(n)*h(n)}=x(z)h(z)

41. Explain the multiplication property of z transform

If z{x(n)}=x(z) & z{h(n)}=h(z) then ]_^[_Q__K_Q_` ____ M_.c_[_ _K_]_ __ -1G_ _

42. State Parseval’ s relation in z transform

If x1(n) and x2(n) are complex valued sequences then . .[1(n)x2_Q_ ____ M_.c x1_ _[2*(1/ __ -1G_ _

n=-.

43. State and proveinitial value theorem of z transform

If x(n) is causal then x(0)= lt x(z)

z .

proof: .

X(z)= .[_Q_]-n ----------------------(1)

n=-.

in(1) put n=0 [_Q_ [_]_ .

hence proved

44. State final value theorem of z tramsform

If x(n) is causal z{x(n)}=x(z), where the roc of x(z) includes, but it is not

necessary to confined to _]_ !__DQG__]-1)x(z)has no pole on or outside the unit

circle then

x(.__ __OW__]-1) x(z)

z _

45. Define system function?

The ratio between z transform of out put signal y(z) to z transform of input

signal x(z) is called system function of the particular system

Y(z)

H(z)= ---------

X(Z)

46. What are the conditions of stability of a causal system ?

All the poles of the system are with in the unit circle.

The sum of impulse response for all values of n is bounded

._K_Q____.

n = -.

47. Determine z transform and roc of the signal {1,2,3,4}

X(z) = ._[_Q_]-n

n =-.____

= .[_Q_]-n =x(0)z-0+x(1)z-1+x(2)z-2+x(3)z-3

n=0

= 1z-0+2z-1+3z-2+4z-3

roc is entire z plane except z = 0

48. Determine z transform and roc of the signal {1,2,3,4}

X(z) = ._[_Q_]-n

n=-.

X(z)= ._[_Q_]-n = x(-3)z3+x(-2)z2+x(-1)z1+x(0)

n=-3

= 4+3z1+2z2+1z3

ROC is entire z plane except z=.

49. Determine z transform and roc of the signal {1,2,3,4}

X(z)= ._[_Q__]-n

n=-.

X(z)= .[_Q_]-n = x(-1)z1 + x(0)z0 + x(1)z-1 + x(2)z -2

n=-1

= 1z1+2+3z-1+4z-2

ROC is entire z plane except z=.__

50. Find the z transform and roc of anu(n)

X(z) = ._[_Q_]-n

n=-. .

X(z) = ._Dn z-n =1/(1-az-1) roc ] !D_

n=0

51. Find the z transform and roc of -anu(-n-1)

X(z)= ._[_Q_]-n

n=-.

-1

X(z)= - .__Dn z-n

n= - . .

= -._D-1z)n = 1/(1-az-1) roc ] _D_

n=1

52. The z-transform of a sequence x(n) is x(z),what is the z transform of nx(n)

If z{x(n)}=x(z) then z{nx(n)}=-zd(x(z))/dz

53. Find the z-transform of (a) A digital impulse (b) A digital step.

(a)Since x(n) is zero except for n = 0, where x(n) is 1, we find x(z) = 1.

(b) Since x(n) is zero except for n.___ZKHUH_[_Q__LV____ZH_ILQG_

.________

x(z) = ._=-n =

n=0 1 – z-1

54. What is the relationship between z-transform and DTFT?

The z-transform of x(n) is given by

.________

x(z) = ._[_Q__=-n ; where z = re􀀀 … … … … … … .. (1)

n=-._____

Substituting z in x(z) we get,

.________

x(z) = ._[_Q__U-ne-􀀀 _ … … … … … … . (2)

n=-._____

The Fourier transform of x(n) is given by

x(e􀀀 ) = ._[_Q__H-􀀀 _ … … … … … … ..(3)

n=-.__

Equation (2) and (3) are identical, when r = 1.

In the z-plane this corresponds to the locus of points on the unit circle ] ____

Hence X(e􀀀 ) is equal to H(z) evaluated along the unit circle, or X(e􀀀 ) = x(z) z = e􀀀

For X(e􀀀 ) to exist, the ROC of x(z) must include the unit circle.

55. What are the different methods of evaluating inverse z-transform?

It can be evaluated using several methods.

i. Long division method

ii. Partial fraction expansion method

iii. Residue method

iv. Convolution method

56. Define DFT of a discrete time sequence.

The dft is used to convert a finite discrete time sequence x(n) to an N point

frequency domain sequencex(k).The Npoint DFTof a finite sequence x(n) of

length L,(L<N) is defined as

N-1

x(k)= ._[_Q_H-􀀀__ ______ K=0,1,2,3,… N-1

n=0

57. Define IDTFT

The IDTFT of the sequence of length N is defined as

N-1

X(n)=(1/N ) .[_N_H􀀀__ ______ n=0,1,2,3,… N-1

k=0

58. Define DTFT and IDTFT of a sequence?

The DTFT (Discrete Time Fourier Transform) of a sequence x(n) is

defined as

X(w) = .[_Q_H-jwn

n = -. __________________

The IDTFT is defined as _[_Q_ _____ _.[_Z__Hjwn dw

59. What is the drawback in DTFT?

The drawback in discrete time fourier transform is that it is continuous

function of w and cannot be processed by digital systems.

60. What is the relation between DFT and DTFT?

Let x(n) be a sequence. DTFT{x(n)}=x(w) and DFT{X(n)}=x(k).x(k)

is a N point sequence which is obtained by sampling one period of x(w) at N

equal intervals.

;_ ___ = X(K)

___________________________ _ N_1

61. Calculate DFT of the sequence x(n)={1,1,2,2}

N-1

x(k)= ._[_Q_H-􀀀__ ______ K=0,1,2,3,… N-1

n=0

x(k)= .[_Q_H-􀀀__ ______ K=0,1,2,3

n=0

N=4

= x(0)+x(1)e-􀀀__ _ _ +x(2)e-􀀀__ +x(3)e-􀀀 __ _ _

= 1+ e-􀀀__ _ _ -2e-􀀀__ -2e-􀀀 __ _ _ K=0,1,2,3

62. List any four properties of DFT

a. Periodicity

b. Linearity

c. Time reversal

d. Circular time shift

63. State periodicity property with respect to DFT.

If x(k) is N-point DFT of a finite duration sequence x(n), then

x(n+N) = x(n) for all n.

x(k+N) = x(k) for all k.

64. State periodicity property with respect to DFT.

If x1(k) and x2(k) are N-point DFTs of finite duration sequences x1(n) and

x2(n), then DFT [a x1(n) + b x2(n)] = a x1(k) + b x2(k), a, b are constants.

65. State time reversal property with respect to DFT.

If DFT[x(n) =x(k), then

DFT[x((-n))N] = DFT[x(N-n)] = x((-k))N = x(N-k)

66. State circular time shifting property with respect to DFT.

If DFT[x(n)] = x(k), then DFT [x((n-l))] = x(k) e-j2 ___ _

67. Assume two finite duration sequences x1(n) and x2(n) are linearly combined. Let

x3(n) = a x1(n) + b x2(n). What is the DFT of x3(n)?

Given x3(n) = a x1(n) + b x2(n).

Let DFT[ x1(n)] = x1(k) and DFT[ x2(n)] = x2(k), then

DFT[ x3(n)] = DFT [a x1(n) + b x2(n) ]

= a DFT[ x1(n)] +b DFT[ x2(n)]

= a x1(k) + b x2(k)

68. &RPSXWH_WKH_')7_RI_[_Q__ _ _Q_– k1)

*LYHQ_[_Q__ _ _Q_– k1) = 1, when n = k1

0, otherwise

N-1

x(k)= .[_Q_H-􀀀__ ______ K=0,1,2,3,… N-1

n=0

N-1

x(k)= ._ _Q_– k1)e-􀀀__ ______ K=0,1,2,3,… N-1

n=0

= e-􀀀__ _

k/N

69. What are the two methods used for sectional convolution?

(a) Overlap and add method

(b) Overlap and save method

70. Define circular convolution.

Let x1(n) and x2(n)are finite duration sequences both of length n with

DFTs x1(k) and x2(k). If x3(k) = x1(k) x2(k), then the sequence x3(k) can be

obtained by circular convolution, defined as

N-1

x(k) = ._[1(m) x2((n)) N

n=0

71. Why FFT is needed?

FFT is needed to compute DFT with reduced number of calculations.

DFT is required for spectrum analysis and filtering operations on the signals using

digital computers.

72. Calculate the number of multiplications needed in the calculation of DFT and FFT

with 64 point sequence.

The number of complex multiplications required using direct computation

is N2 = 642 = 4096.

The number of complex multiplications required using FFT is

N log2 N = 64 log264 = 192

2 2

73. What is the main advantage of FFT?

FFT reduces the computation time required to compute discrete fourier

transform.

74. Calculate the number of multiplications needed in the calculation of DFT using

FFT with 32 point sequence.

The number of complex multiplications required using FFT is

N log2N = 32 log232 = 80

2 2

75. What is FFT?

FFT is a method for computing the DFT with reduced number of

calculations using symmetry and periodicity properties of twiddle factor Wk

N .

The computational efficiency is achieved by decomposing of an N-point DFT into

successively smaller DFTs to increase the speed of computation.

76. How many multiplications and additions are required to compute N-point DFT

using radix-2 FFT?

N log2N multiplications and N log2N additions

77. What is meant by radix-2 FFT?

If the number of output points N can be expressed as a power of 2, i.e.,

N = 2M Where M is an integer then this algorithm is known as radix-2 algorithm.

78. What is DIT radix2 algorithm.

The radix 2 DIT FFT is an efficient algorithm for computing DFT.The

idea is to break N point sequence in to two sequences ,the DFT of which can be

combined to give DFT of the original N-point sequence. Initially the N point

sequence is divided in to two N/2 point sequences ,on the basis of odd and even

and the DFTs of them are evaluated and combined to give N-point sequence.

Similarly the N/2 DFT s are divided and expressed in to the combination of N/4

point DFTs. This process is continued until we left with 2-point DFTs

79. What is DIF radix2 algorithm.

The radix 2 DIFFFT is an efficient algorithm for computing DFT in this

the out put sequence x(k) is divided in to smaller and smaller. The idea is to break

N point sequence in to two sequences ,x1(n) and x2(n) consisting of the first N/2

points of x(n)and last N/2 points of x(n) respectively. Then we find N/2 point

sequences f(n) and g(n).f(n)=x1(n)+x2(n)and g(n)= (x1(n)+x2(n))WN

n .Similarly

the N/2 DFT s are divided and expressed in to the combination of N/4 point

DFTs. This process is continued until we left with 2-point DFTs

80. What are the differences between DIT and DIF algorithms?

For DIT the input is bitreversed and the output is in natural order ,and in

DIF the input is in natural order and output is bitreversed.In butterfly the phase

factor is multiplied before the add and subtract operation but in DIF it is

multiplied after add-subtract operation

81. What is the basic operation of DIT algorithm?

The basic operation DIT algorithm is called butterfly in which two inputs

G(n) and H(n)are combined to give x1(k) and x2(k)

x1(k)= G(n)+WN

kH(n)

x2(k)= G(n)-WN

kH(n)

k is the twiddle factor

82. What is the basic operation of DIF algorithm?

The basic operation DIF algorithm is called butterfly in which two inputs

G(n) and H(n)are combined to give x1(k) and x2(k)

x1(k)= G(n)+ H(n)

x2(k)={G(n)- H(n)} WN

k is the twiddle factor

83. Draw the flow-graph of a two-point DFT for a decimation in time decomposition

The flow-graph of a two-point DFT for decimation in time algorithm is

G(n) x1(k)= G(n)+ H(n)

x2(k)= G(n)- H(n)

H(n)

84. Draw the flow-graph of a two-point DFT for a decimation in frequency

decomposition

The flowgraph of a twopoint DFT for decimation in frequency algorithm

G(n) W2

0 x1(k)= G(n)+ H(n)

x2(k)= G(n)- H(n)

H(n)

85. Draw the basic butterfly diagram for decimation in time algorithm

The flowgraph of a twopoint DFT for a decimation in time algorithm is

G(n) x1(k)= G(n)+WN

kH(n)

x2(k)= G(n)- WN

kH(n)

H(n)

G(n)andH(n) are inputs and x1(k) ,x2(k) are outputs WN

k is phase factor

86. Draw the basic butterfly for a decimation in frequency decomposition

The butterflyof a twopoint DFT for a decimation in frequency algorithm is

G(n) WN

k x1(k)= G(n)+ H(n)

H(n)

x2(k)= {G(n)- H(n)} WN

G(n)andH(n) are inputs and x1(k) ,x2(k) are outputs WN

k is phase factor

87. Arrange the 8 point sequence x(n)={1,2,3,4,-1,-2,-3,-4} inn bit reversed order.

Normal order x(n)={1,2,3,4,-1,-2,-3,-4}

Bit reversal order x(n)={1,-1,3,-3, 2,-2,4,-4}

88. How we can calculate IDFT using FFT algorithm?

-The inverse DFT of N point sequence x(k) is defined as

N-1

X(n)=(1/N ) .>[_N_:N

nk ] * n=0,1,2,3,… N-1

k=0

a. Take conjugate of x(k)

b. Compute N point DFT of x*(k) using radix 2 FFT.

c. Take conjugate of output sequence.

d. Divide the output sequence by N.

89. What are the applications of FFT?

1. linear filtering

2. correlation

3. spectrum analysis

90. What are the twiddle factors involved in the first stage of computation in 8 point

DIT radix-2, FFT algorithm?

0, W8

1, W8

2, W8

91.What is filter?

Filter is a frequency selective device ,which amplify particular range of

frequencies and attenuate particular range of frequencies.

92.What are the types of digital filter according to their impulse response?

IIR(Infinite impulse response )filter

FIR(Finite Impulse Response)filter.

93. How phase distortion and delay distortion are introduced?

The phase distortion is introduced when the phase characteristics of a filter is

nonlinear with in the desired frequency band.

The delay distortion is introduced when the delay is not constant with in the desired

frequency band.

94.whar are FIR filters?

The filter designed by selecting finite number of samples of impulse response (h(n)

obtained from inverse fourier transform of desired frequency response H(w)) are called

FIR filters

95. Write the steps involved in FIR filter design

Choose the desired frequency response Hd(w)

Take the inverse fourier transform and obtain Hd(n)

Convert the infinite duration sequence Hd(n) to h(n)

Take Z transform of h(n) to get H(Z)

96. What are advantages of FIR filter?

Linear phase FIR filter can be easily designed .

Efficient realization of FIR filter exists as both recurrisive and non recursive structures.

FIR filter realized non recursively are stable.

The round off noise can be made small in non recursive realization of FIR filter

97. what are the disadvantages of FIR FILTER

The duration of impulse response should be large to realize sharp cutoff filters.

The non integral delay can lead to problems in some signal processing applications.

98.what is the necessary and sufficient condition for the linear phase characteristic of a

FIR filter?

The phase function should be a linear function of w, which inturn requires

constant group delay and phase delay.

99. List the well known design technique for linear phase FIR filter design?

Fourier series method and window method

Frequency sampling method.

Optimal filter design method.

100.Define IIR filter?

The filter designed by considering all the infinite samples of impulse response are

called IIR filter.

IAS syllabus for electrical engineering

2012-05-23T01:21:00.001-07:00

1. Circuit Theory:

Circuit components; network graphs; KCL, KVL; circuit analysis methods: nodal analysis, mesh analysis; basic network theorems and applications; transient analysis: RL, RC and RLC circuits; sinusoidal steady state analysis; resonant circuits; coupled circuits; balanced 3-phase circuits; Two-port networks.

2. Signals & Systems:

Representation of continuous–time and discrete-time signals & systems; LTI systems; convolution; impulse response; time-domain analysis of LTI systems based on convolution and differential/difference equations. Fourier transform, Laplace transform, Z-transform, Transfer function. Sampling and recovery of signals DFT, FFT Processing of analog signals through discrete-time systems.

3. E.M. Theory:

Maxwell’s equations, wave propagation in bounded media. Boundary conditions, reflection and refraction of plane waves. Transmission line: travelling and standing waves, impedance matching, Smith chart.

4. Analog Electronics:

Characteristics and equivalent circuits (large and small-signal) of Diode, BJT, JFET and MOSFET. Diode circuits: clipping, clamping, rectifier. Biasing and bias stability. FET amplifiers. Current mirror; Amplifiers: single and multi-stage, differential, operational, feedback and power. Analysis of amplifiers; frequency-response of amplifiers. OPAMP circuits. Filters; sinusoidal oscillators: criterion for oscillation; single-transistor and OPAMP configurations. Function generators and wave-shaping circuits. Linear and switching power supplies.

5. Digital Electronics:

Boolean algebra; minimization of Boolean functions; logic gates; digital IC families (DTL, TTL, ECL, MOS, CMOS). Combinational circuits: arithmetic circuits, code converters, multiplexers and decoders. Sequential circuits: latches and flip-flops, counters and shift-registers. Comparators, timers, multivibrators. Sample and hold circuits, ADCs and DACs. Semiconductor memories. Logic implementation using programmable devices (ROM, PLA, FPGA).

6. Energy Conversion:

Principles of electromechanical energy conversion: Torque and emf in rotating machines. DC machines: characteristics and performance analysis; starting and speed control of motors; Transformers: principles of operation and analysis; regulation, efficiency; 3-phase transformers. 3-phase induction machines and synchronous machines: characteristics and preformance analysis; speed control.

7. Power Electronics and Electric Drives:

Semiconductor power devices: diode, transistor, thyristor, triac, GTO and MOSFET–static characteristics and principles of operation; triggering circuits; phase control rectifiers; bridge converters: fully-controlled and half-controlled; principles of thyristor choppers and inverters; DC-DC converters; Switch mode inverter; basic concepts of speed control of dc and ac motor drives applications of variable-speed drives.

8. Analog Communication:

Random variables: continuous, discrete; probability, probability functions. Statistical averages; probability models; Random signals and noise: white noise, noise equivalent bandwidth; signal transmission with noise; signal to noise ratio. Linear CW modulation: Amplitude modulation: DSB, DSB-SC and SSB. Modulators and Demodulators; Phase and Frequency modulation: PM & FM signals; narrowband FM; generation & detection of FM and PM, Deemphasis, Preemphasis. CW modulation system: Superhetrodyne receivers, AM receivers, communication receivers, FM receivers, phase locked loop, SSB receiver Signal to noise ratio calculation for AM and FM receivers.

Paper-II

1. Control Systems:

Elements of control systems; block-diagram representation; open-loop & closed-loop systems; principles and applications of feed-back. Control system components. LTI systems: time-domain and transform-domain analysis. Stability: Routh Hurwitz criterion, root-loci, Bode-plots and polar plots, Nyquist’s criterion; Design of lead-lad compensators. Proportional, PI, PID controllers. State-variable representation and analysis of control systems.

2. Microprocessors and Microcomputers:

PC organisation; CPU, instruction set, register set, timing diagram, programming, interrupts, memory interfacing, I/O interfacing, programmable peripheral devices.

3. Measurement and Instrumentation:

Error analysis; measurement of current, voltage, power, energy, power-factor, resistance, inductance, capacitance and frequency; bridge measurement. Signal conditioning circuit; Electronic measuring instruments: multimeter, CRO, digital voltmeter, frequency counter, Q-meter, spectrum-analyzer, distortion-meter. Transducers: thermocouple, thermistor, LVDT, strain-gauge, piezo-electric crystal.

4. Power Systems: Analysis and Control:

Steady-state performance of overhead transmission lines and cables; principles of active and reactive power transfer and distribution; per-unit quantities; bus admittance and impedance matrices; load flow; voltage control and power factor correction; economic operation; symmetrical components, analysis of symmetrical and unsymmetrical faults. Concept of system stability: swing curves and equal area criterion. Static VAR system. Basic concepts of HVDC transmission.

5. Power System Protection:

Principles of overcurrent, differential and distance protection. Concept of solid state relays. Circuit breakers. Computer aided protection: Introduction; line bus, generator, transformer protection; numeric relays and application of DSP to protection.

6. Digital Communication:

Pulse code modulation (PCM), differential pulse code modulation (DPCM), delta modulation (DM), Digital modulation and demodulation schemes: amplitude, phase and frequency keying schemes (ASK, PSK, FSK). Error control coding: error detection and correction, linear block codes, convolution codes. Information measure and source coding. Data networks, 7-layer architecture.

8085 microprocessor questions

2012-05-23T01:19:00.005-07:00

What are the various registers in 8085? - Accumulator register, Temporary register, Instruction register, Stack Pointer, Program Counter are the various registers in 8085 .

In 8085 name the 16 bit registers? - Stack pointer and Program counter all have 16 bits.

What are the various flags used in 8085? - Sign flag, Zero flag, Auxillary flag, Parity flag, Carry flag.

What is Stack Pointer? - Stack pointer is a special purpose 16-bit register in the Microprocessor, which holds the address of the top of the stack.

What is Program counter? - Program counter holds the address of either the first byte of the next instruction to be fetched for execution or the address of the next byte of a multi byte instruction, which has not been completely fetched. In both the cases it gets incremented automatically one by one as the instruction bytes get fetched. Also Program register keeps the address of the next instruction.

Which Stack is used in 8085? - LIFO (Last In First Out) stack is used in 8085.In this type of Stack the last stored information can be retrieved first.

What happens when HLT instruction is executed in processor? - The Micro Processor enters into Halt-State and the buses are tri-stated.

What is meant by a bus? - A bus is a group of conducting lines that carriers data, address, & control signals.

What is Tri-state logic? - Three Logic Levels are used and they are High, Low, High impedance state. The high and low are normal logic levels & high impedance state is electrical open circuit conditions. Tri-state logic has a third line called enable line.

Give an example of one address microprocessor? - 8085 is a one address microprocessor.

In what way interrupts are classified in 8085? - In 8085 the interrupts are classified as Hardware and Software interrupts.

What are Hardware interrupts? - TRAP, RST7.5, RST6.5, RST5.5, INTR.

What are Software interrupts? - RST0, RST1, RST2, RST3, RST4, RST5, RST6, RST7.

Which interrupt has the highest priority? - TRAP has the highest priority.

Name 5 different addressing modes? - Immediate, Direct, Register, Register indirect, Implied addressing modes.

How many interrupts are there in 8085? - There are 12 interrupts in 8085.

What is clock frequency for 8085? - 3 MHz is the maximum clock frequency for 8085.

What is the RST for the TRAP? - RST 4.5 is called as TRAP.

In 8085 which is called as High order / Low order Register? - Flag is called as Low order register & Accumulator is called as High order Register.

What are input & output devices? - Keyboards, Floppy disk are the examples of input devices. Printer, LED / LCD display, CRT Monitor are the examples of output devices.

Can an RC circuit be used as clock source for 8085? - Yes, it can be used, if an accurate clock frequency is not required. Also, the component cost is low compared to LC or Crystal.

Why crystal is a preferred clock source? - Because of high stability, large Q (Quality Factor) & the frequency that doesn’t drift with aging. Crystal is used as a clock source most of the times.

Which interrupt is not level-sensitive in 8085? - RST 7.5 is a raising edge-triggering interrupt.

What does Quality factor mean? - The Quality factor is also defined, as Q. So it is a number, which reflects the lossness of a circuit. Higher the Q, the lower are the losses.

What are level-triggering interrupt? - RST 6.5 & RST 5.5 are level-triggering interrupts.

Microprossor and microcontroler question bank

2012-05-23T01:19:00.003-07:00

PART - A

1. Differentiate between memory mapped I/O and I/O mapped I/O.

2. Classify the different groups of 8085 instruction set with example.

3. Differentiate between unidirectional buffer and bi-directional buffer.

4. What is the need for ALE signal in 8085 microprocessor?

5. Give the operation of the foll instructions:(a) DAA (b) DEC.

6. State the functions for ALE and TRAP pins in 8085.

7. If the frequency of the crystal connected to 8085 is 6MHz, calculate the time to fetch and executed NOP instruction.

8. What is a MPU?

9. What do you mean by multiplexing the bus?

10. List out the two parts of an instruction.

11. What is a program counter?

12. What is an instruction?

13. What is PSW?

14. Define - Interrupt.

15. What are the addressing modes for 8085 microprocessor?

16. Where the READY signal used?

17. Define stack.

18. Specify how a program counter is useful in program execution.

19. How the data and address lines are demultiplexed?

20. Show the bit positions of various flags in 8085 flag register?

21. List the various machine cycles of 8085.

22. What is the instruction format of 8085.

23. What are the similarity and difference between subtract and compare instructions?

24. List the type of signals that have to be applied to initiate hardware interrupts in 8085.

25. Write a subroutine to clear the flag register and accumulator?

26. Draw a simple circuit to decode three controls signals RD, WR, IO/M and to produce separate read/write control signal for memory and I/O device?

27. List out the similarities between CALL_RET and PUSH_POP instructions.

28. List four interrupts of 8085.

29. Give the clock out frequency and state time T of 8085 when the crystal frequencies are:

(a) 5 MHz (b) 6.144 MHz

30. How many times the given loop will be executed? What will be the contents of HL pair when the program control reaches to HLT instruction?

MVI A, 00h

LX1H, 5003H

Loop: DCX H

DCR A

JNZ loop

HLT .

31. Define: (a) Instruction Cycle (b) M/c cycle (c) T-state.

32. Explain the execution of the instruction CMA M in 8085.

34. If the program counter is always one count ahead of the memory locations from which the machine code is being fetched, how does the microprocessor change the sequence of program execution with a "Jump" execution?

35. Differentiate between hardware interrupts and software interrupts of 8085.

36. What is DAD and what are the flags, affected by this instructions?

37. What is the function performed by SIM Instruction?

38. What is meant by processor cycle?

39. What are the different memory mapping schemes? Give any one advantage and disadvantage for each

40. Write an 8085 assembly language program, which checks to see if the number is even or odd returns a '0' in B register else returns a '1'.

PART - B

1. (i) Draw the pin configuration of 8085 and explain the functional usage of each pin in details.

(ii) Write a 8085 program to generate a delay of 0.6 sec for the given crystal frequency of 5 MHz.

2. (i) Explain hardware interrupts in 8085.

(ii) Draw the timing diagram for MVI A, 30H instruction.

(iii) What do you mean by polling in 8085.

3. Write a 8085 assembly language program to generate a delay of 0.1 sec for the given crystal frequency of 2 MHz.

4. (i) With suitable examples, explain the addressing modes of 8085.

5. (i) Draw the timing diagram of I/O read cycle in 8085 and explain it.

(ii) Interface a 8-bit DIP switch with 8085 such that the address assigned to it is FFH.

6. Explain the 8085 architecture.

7. Write a 8085 program to convert a binary number to decimal.

8. (i) Write a 8085 program for multiplying two 8 bit numbers.

(ii) Write an assembly language program to evaluate the expression (A+(B*C))/D, where A, B, C and D are single byte integer.

9. (i) Draw the timing diagram of opcode and memory write machine cycles of 8085 for following instructions: MOV V, M; MVI D, data; IN OL; OUT 01; LDA 8000; RST7

(ii) What is the data transfer instruction? Give example.

10. Write an assembly language program based on 8085 microprocessor to implement a look-up table translation to generate the codes for seven-segment display with our digits. (Assume INPUT PORT O D 6 H, and OUTPUT PORT OD 4H)

11. (i) Write an 8085 assembly language program to perform 32 bit binary addition.

(ii) What will be the value in ACC, for the given 8085 program below:

MVI C, 7F

MVI B, 3E

MOV A,B

RLC

ANI 7F

HLT.

12. (i) Write an 8085 assembly language program to fill a block of 1000_H bytes starting at address 9000_H with characters 2B_H.

(ii) Indicate the logic levels on each control or status pin as logic '0' or logic '1' for 8085 microprocessor with the given data below;

Machine cycle	RD	WR	IO/M	S₀	S₁
Memory write Memory read I/O read I/O write O/P code fetch

14. With example explain different groups of instruction sets.

15. (i) Analysis the program and find the content of A register after execution.

MVI A, 07

RLC

MOV B,A

RLC

ORA B

(ii) Explain 8085 interrupts in detail.

16. (i) Draw and explain the timing diagram for STA 4500 instruction.

(ii) Write as assembly language program to find the average of N numbers.

17. Interface 3 numbers of 8KB EPROM and 5 numbers of 8KB RAM to microprocessor 8085 to have a total memory capacity of 64 KB.

18. (i) Write an assemble language program to add two 2-digit BCD numbers.

19. Write notes on status flag.

20. Write an assembly language program to find the biggest and smallest in an array of given numbers.

21. Write a program to count continuously in hexadecimal from FFB to 00H in a system with a 0.5 micro sec clock period. Use register C to set up a one milli second delay between each count and display the number at one of the output ports.

22. (i) Draw a flowchart and 8085 assembly language program for adding the two hexadecimal numbers 9BH and A7H in register D and E respectively,. If the sum is greater than FFH, display 01H at output PORT0: otherwise, display the sum.

(ii) Draw the timing diagram for IN and OUT instructions.

23. Explain with the help of suitable diagram how the INTR pin can be used to interrupt the 8085 and how it responds to the signal.

24. (i) Explain the logic instructions of 8085 microprocessor with examples.

(ii) Write and ALP using 8085 instruction set to add two n-byte numbers stored at memory locations starting at 'X' and 'Y' respectively. Store the result and memory location starting from 'Z'. Draw the flow chart.

25. (i) List all the control signals of the Timing and Control Unit. Explain the sue of each of these signals.

(ii) Write an ALP to evaluate the expression C = A2 + B2

26. (i) What are the features of FIFO and LIFO memory structures?

27. Draw and explain the timing diagram for the execution of the instruction LDA 2080H.

28. (i) How do you classify the 8085 interrupts what are they? How is the interrupt branch address obtain in each case?

(ii) Draw the timing diagram of DCX instruction.

Microprossor and Microcontroler viva question

2012-05-23T01:17:00.002-07:00

1. What are the various registers in 8085? - Accumulator register, Temporary register, Instruction register, Stack Pointer, Program Counter are the various registers in 8085 .

2. In 8085 name the 16 bit registers? - Stack pointer and Program counter all have 16 bits.

3. What are the various flags used in 8085? - Sign flag, Zero flag, Auxillary flag, Parity flag, Carry flag.

4. What is Stack Pointer? - Stack pointer is a special purpose 16-bit register in the Microprocessor, which holds the address of the top of the stack.

5. What is Program counter? - Program counter holds the address of either the first byte of the next instruction to be fetched for execution or the address of the next byte of a multi byte instruction, which has not been completely fetched. In both the cases it gets incremented automatically one by one as the instruction bytes get fetched. Also Program register keeps the address of the next instruction.

6. Which Stack is used in 8085? - LIFO (Last In First Out) stack is used in 8085.In this type of Stack the last stored information can be retrieved first.

7. What happens when HLT instruction is executed in processor? - The Micro Processor enters into Halt-State and the buses are tri-stated.

8. What is meant by a bus? - A bus is a group of conducting lines that carriers data, address, & control signals.

9. What is Tri-state logic? - Three Logic Levels are used and they are High, Low, High impedance state. The high and low are normal logic levels & high impedance state is electrical open circuit conditions. Tri-state logic has a third line called enable line.

10. Give an example of one address microprocessor? - 8085 is a one address microprocessor.

11. In what way interrupts are classified in 8085? - In 8085 the interrupts are classified as Hardware and Software interrupts.

12. What are Hardware interrupts? - TRAP, RST7.5, RST6.5, RST5.5, INTR.

13. What are Software interrupts? - RST0, RST1, RST2, RST3, RST4, RST5, RST6, RST7.

14. Which interrupt has the highest priority? - TRAP has the highest priority.

15. Name 5 different addressing modes? - Immediate, Direct, Register, Register indirect, Implied addressing modes.

16. How many interrupts are there in 8085? - There are 12 interrupts in 8085.

17. What is clock frequency for 8085? - 3 MHz is the maximum clock frequency for 8085.

18. What is the RST for the TRAP? - RST 4.5 is called as TRAP.

19. In 8085 which is called as High order / Low order Register? - Flag is called as Low order register & Accumulator is called as High order Register.

20. What are input & output devices? - Keyboards, Floppy disk are the examples of input devices. Printer, LED / LCD display, CRT Monitor are the examples of output devices.

21. Can an RC circuit be used as clock source for 8085? - Yes, it can be used, if an accurate clock frequency is not required. Also, the component cost is low compared to LC or Crystal.

22. Why crystal is a preferred clock source? - Because of high stability, large Q (Quality Factor) & the frequency that doesn’t drift with aging. Crystal is used as a clock source most of the times.

23. Which interrupt is not level-sensitive in 8085? - RST 7.5 is a raising edge-triggering interrupt.

24. What does Quality factor mean? - The Quality factor is also defined, as Q. So it is a number, which reflects the lossness of a circuit. Higher the Q, the lower are the losses.

25. What are level-triggering interrupt? - RST 6.5 & RST 5.5 are level-triggering interrupts.

9v supply

2012-05-23T01:00:00.000-07:00

First the basic things should be understood

1. We should not give 230v ac supply directly to the circuit, because all electronics items are designed up-to 9v-15v.

2. 230V can be step-downed to 12V through step-down transformer.

There is little to be said about this circuit. All the work is done by the regulator. The 78S09 can deliver up to 2 amps continuous output whilst maintaining a low noise and very well regulated supply.

The circuit will work without the extra components, but for reverse polarity protection a 1N5400 diode is provided at the input, extra smoothing being provided by C1. The output stage includes C2 for extra filtering, if powering a logic circuit than a 100nF capacitor is also desirable to remove any high frequency switching noise.

MCA 4th SEMESTER

2012-05-23T00:41:00.000-07:00

MCS-041, MCS-042, MCS-043, MCS-044, MCSL-045

Question 1:

State the Readers and Writers problem and write its semaphore based solution. Also describe the algorithm. Can the producer consumer problem be considered as a special case of Reader/Writer problem with a single Writer (the producer) and a single Reader (consumer)?. Explain.

(20 Marks)

Answer:
The readers/writers problem is one of the classic synchronization problems. It is often used to
compare and contrast synchronization mechanisms. It is also an eminently used practical
problem. A common paradigm in concurrent applications is isolation of shared data such as a
variable, buffer, or document and the control of access to that data.
This problem has two types of clients accessing the shared data. The first type, referred to as
readers, only wants to read the shared data. The second type, referred to as writers, may want to
modify the shared data.
There is also a designated central data server or controller. It enforces exclusive write semantics;
if a writer is active then no other writer or reader can be active. The server can support clients that
wish to both read and write. The readers and writers problem is useful for modelling processes
which are competing for a limited shared resource.
Semaphores can be used to restrict access to the database under certain conditions. In this
example, semaphores are used to prevent any writing processes from changing information in the
database while other processes are reading from the database.
semaphore mutex = 1; //Controls access to the reader count
semaphore db = 1; //Controls access to the database
int reader_count; //The number of reading processes accessing the data
Reader()
{
while (TRUE) { // loop forever
down(&mutex); //gain access to reader_count
reader_count = reader_count + 1; //increment the reader_count
if (reader_count == 1)
down(&db); //If this is the first process to read the database,
// d down on db is executed to prevent access to the
// database by a writing process
up(&mutex); //allow other process to access reader_count
read_db(); //read the database
down(&mutex); // gain access to reader_count
reader_count = reader_count – 1; //decrement reader_count
if(reader_count == 0)
up(&db); //if there are no more processes reading from the
//database, allow writing process to access the data
up(&mutex); //allow other processes to access
reader_countuse_data(); //use the data read from the database (non-critical)
}
Writer()
{

while(TRUE) { // loop forever
create_data(); // create data to enter into database (non-critical)
down(&db); // gain access to the database
write_db(); // write information to the database
up(&db); // release exclusive access to the database
}

Question 2:

Describe different schemes for deadlock prevention, avoidance and detection with major advantages and disadvantages of each scheme.

(10 Marks)

Deadlock Prevention:
As per Havender’s algorithm, since all four of the conditions are necessary for deadlock to occur, it follows that deadlock might be prevented by denying any one of the conditions.

Havender’s Algorithm

Elimination of “Mutual Exclusion” Condition

The mutual exclusion condition must hold for non-shareable resources. That is several processes cannot simultaneously share a single resource. This condition is difficult to eliminate because some resources, such as the tap drive and printed, are inherently non-shareable. Note that shareable resources like read-only-file do not require mutually exclusive access and thus cannot be involved in deadlock.

Elimination of “Hold and Wait” Condition

There are two possibilities for the elimination of the second condition. The first alternative is that a process request be granted all the resources it needs at once, prior to execution. The second alternative is to disallow a process from requesting resources whenever it has previously allocated resources. This strategy requires that all the resources a process will need must be requested at once. The system must grant resources on “all or none” basis. If the complete set of resources needed by a process is not currently available. While the process waits, however, it may not hold any resources. Thus the “wait for” condition is denied and deadlocks simply cannot occur. This strategy can lead to serious waste of resources.

For example, a program requiring ten tape drives must request and receive all ten drives before it begins executing. If the program needs only one tape drive to begin execution and then does not need the remaining tape drives for several hours then substantial computer resources (9 tape drivers) will sit idle for several hours. This strategy can cause indefinite postponement (starvation), since not all the required resources may become available at once.

Elimination of “No-pre-emption” Condition

The non-pre-emption condition can be alleviated by forcing a process waiting for a resource that cannot immediately be allocated, to relinquish all of its currently held resources, so that other processes may use them to finish their needs. Suppose a system does allow processes to hold resources while requesting additional resources. Consider what happens when a request cannot be satisfied. A process holds resources a second process may need in order to proceed, while the second process may hold the resources needed by the first process. This is a deadlock. This strategy requires that when a process that is holding some resources is denied a request for additional resources, the process must release its held resources and, if necessary, request them again together with additional resources. Implementation of this strategy denies the no-preemptive” condition effectively.

High Cost
When a process releases resources, the process may lose all its work to that point. One serious consequence of this strategy is the possibility of indefinite postponement (starvation). A process might be held off indefinitely as it repeatedly requests and releases the same resources.

Elimination of “Circular Wait” Condition
The last condition, the circular wait, can be denied by imposing a total ordering on all of the resource types and than forcing all processes to request the resources in order (increasing or decreasing). This strategy imposes a total ordering of all resource types, and requires that each process requests resources in a numerical order of enumeration. With this rule, the resource allocation graph can never have a cycle.
This strategy, if adopted, may result in low resource utilisation and in some cases starvation is possible too.

Deadlock Avoidance:
This approach to the deadlock problem anticipates a deadlock before it actually occurs. This approach employs an algorithm to access the possibility that deadlock could occur and act accordingly. This method differs from deadlock prevention, which guarantees that deadlock cannot occur by denying one of the necessary conditions of deadlock. The most famous deadlock avoidance algorithm, from Dijkstra [1965], is the Banker’s algorithm. It is named as Banker’s algorithm because the process is analogous to that used by a banker in deciding if a loan can be safely made or not.

The Banker’s Algorithm is based on the banking system, which never allocates its vailable cash in such a manner that it can no longer satisfy the needs of all its customers. Here we must have the advance knowledge of the maximum possible claims for each process, which is limited by the resource availability. During the run of the system we should keep monitoring the resource allocation status to ensure that no circular wait condition can exist.

If the necessary conditions for a deadlock are in place, it is still possible to avoid deadlock by being careful when resources are allocated. The following are the features that are to be considered for avoidance of the deadlock as per the Banker’s Algorithms.
• Each process declares maximum number of resources of each type that it may need.
• Keep the system in a safe state in which we can allocate resources to each process in
some order and avoid deadlock.
• Check for the safe state by finding a safe sequence: < P1, P2, …, Pn > where resources
that Pi needs can be satisfied by available resources plus resources held by Pj where j < i.
• Resource allocation graph algorithm uses claim edges to check for a safe state. The resource allocation state is now defined by the number of available and allocated resources, and the maximum demands of the processes. Subsequently the system can be in either of the following states:
• Safe State: Such a state occur when the system can allocate resources to each process (up to its maximum) in some order and avoid a deadlock. This state will be characterised by a safe sequence. It must be mentioned here that we should not falsely conclude that all unsafe states are deadlocked although it may eventually lead to a deadlock.
• Unsafe State: If the system did not follow the safe sequence of resource allocation from the beginning and it is now in a situation, which may lead to a deadlock, then it is in an unsafe state.
• Deadlock State: If the system has some circular wait condition existing for some
processes, then it is in deadlock state.

It is important to note that an unsafe state does not imply the existence or even the eventual existence of a deadlock. What an unsafe state does imply is simply that some unfortunate sequence of events might lead to a deadlock.

The Banker’s algorithm is thus used to consider each request as it occurs, and see if granting it leads to a safe state. If it does, the request is grated, otherwise, it is postponed until later.

Limitations of the Banker’s Algorithm:
• It is time consuming to execute on the operation of every resource.
• If the claim information is not accurate, system resources may be underutilised.
• Another difficulty can occur when a system is heavily loaded. Lauesen states that in this situation “so many resources are granted away that very few safe sequences remain, and as a consequence, the jobs will be executed sequentially”. Therefore, the Banker’s
algorithm is referred to as the “Most Liberal” granting policy; that is, it gives away
everything that it can without regard to the consequences.
• New processes arriving may cause a problem.
o The process’s claim must be less than the total number of units of the resource in the system. If not, the process is not accepted by the manager.
o Since the state without the new process is safe, so is the state with the new process. Just use the order you had originally and put the new process at the end.
o Ensuring fairness (starvation freedom) needs a little more work, but isn’t too hard
either (once every hour stop taking new processes until all current processes finish).
• A resource becoming unavailable (e.g., a tape drive breaking), can result in an unsafe
state.

Deadlock Detection:
Detection of deadlocks is the most practical policy, which being both liberal and cost efficient, most operating systems deploy. To detect a deadlock, we must go about in a recursive manner and simulate the most favoured execution of each unblocked process.
• An unblocked process may acquire all the needed resources and will execute.
• It will then release all the acquired resources and remain dormant thereafter.
• The now released resources may wake up some previously blocked process.
• Continue the above steps as long as possible.
• If any blocked processes remain, they are deadlocked.

Question 3:

What is thrashing? How does it happen? When are the two mechanisms to prevent thrashing? Describe them.

(10 Marks)

Answer :
Thrashing occurs when a system spends more time processing page faults than executing
transactions. While processing page faults it is necessary to be in order to appreciate the benefits of virtual memory, thrashing has a negative effect on the system.

As the page fault rate increases, more transactions need processing from the paging device. The queue at the paging device increases, resulting in increased service time for a page fault. While the transactions in the system are waiting for the paging device, CPU utilisation, system throughput and system response time decrease, resulting in below optimal performance of a system.

Thrashing becomes a greater threat as the degree of multiprogramming of the system increases.

The two techniques for prevent thrashing are Working-Set Model and Page-Fault Rate.

Working-Set Model:

Principle of Locality
Pages are not accessed randomly. At each instant of execution a program tends to use only a small set of pages. As the pages in the set change, the program is said to move from one phase to another. The principle of locality states that most references will be to the current small set of pages in use.
Examples:

1) Instructions are fetched sequentially (except for branches) from the same page.

2) Array processing usually proceeds sequentially through the array functions repeatedly, access variables in the top stack frame.

Ramification
If we have locality, we are unlikely to continually suffer page-faults. If a page consists of 1000 instructions in self-contained loop, we will only fault once (at most) to fetch all 1000 instructions.

Working Set Definition
The working set model is based on the assumption of locality. The idea is to examine the most recent page references in the working set. If a page is in active use, it will be in the Working-set.

If it is no longer being used, it will drop from the working set.

The set of pages currently needed by a process is its working set.
WS(k) for a process P is the number of pages needed to satisfy the last k page references for process P.

WS(t) is the number of pages needed to satisfy a process’s page references for the last t units of time.
Either can be used to capture the notion of locality.

Working Set Policy
Restrict the number of processes on the ready queue so that physical memory can accommodate the working sets of all ready processes. Monitor the working sets of ready processes and, when necessary, reduce multiprogramming (i.e. swap) to avoid thrashing.

Exact computation of the working set of each process is difficult, but it can be estimated, by using the reference bits maintained by the hardware to implement an aging algorithm for pages.

When loading a process for execution, pre-load certain pages. This prevents a process from having to “fault into” its working set. May be only a rough guess at start-up, but can be quite accurate on swap-in.

Page-Fault Rate
The working-set model is successful, and knowledge of the working set can be useful for prepaging, but it is a scattered way to control thrashing. A page-fault frequency (page-fault rate) takes a more direct approach. In this we establish upper and lower bound on the desired pagefault rate. If the actual page fault rate exceeds the upper limit, we allocate the process another frame. If the page fault rate falls below the lower limit, we remove a Frame from the process. Thus, we can directly measure and control the page fault rate to prevent thrashing.

Establish “acceptable” page-fault rate.
• If actual rate too low, process loses frame.
• If actual rate too hign, process gains frame.

Question 4:

What are the factors important for selection of a file organisation? Discuss three important file organisations mechanisms and their relative performance.

(10 Marks)

Answer :
The operating system abstracts (maps) from the physical properties of its storage devices to define a logical storage unit i.e., the file. The operating system provides various system calls for file management like creating, deleting files, read and write, truncate operations etc. All operating systems focus on achieving device-independence by making the access easy regardless of the place of storage (file or device). The files are mapped by the operating system onto physical devices. Many factors are considered for file management by the operating system like directory structure, disk scheduling and management, file related system services, input/output etc. Most
operating systems take a different approach to storing information.

Three common file organisations are byte sequence, record sequence and tree of disk blocks. Unix files are structured in simple byte sequence form. In record sequence, arbitrary records can be read or written, but a record cannot be inserted or deleted in the middle of a file. CP/M works according to this scheme. In tree organisation each block hold n keyed records and a new record can be inserted anywhere in the tree. The mainframes use this approach. The OS is responsible for the following activities with regard to the file system:

• The creation and deletion of files
• The creation and deletion of directory
• The support of system calls for files and directories manipulation
• The mapping of files onto disk
• Backup of files on stable storage media (non-volatile).

A file directory is a group of files organised together. An entry within a directory refers to the file or another directory. Hence, a tree structure/hierarchy can be formed. The directories are used to group files belonging to different application/users.

The most common schemes for describing logical directory structure are:
Single-level directory
Two-level directory
Tree-structured directory
Acyclic-graph directory
General graph directory

Disk space management: The direct-access of disks and keeping files in adjacent areas of the disk is highly desirable. But the problem is how to allocate space to files for effective disk space utilisation and quick access. Also, as files are allocated and freed, the space on a disk become fragmented. The major methods of allocating disk space are:

Continuous
Non continuous (Indexing and Chaining)

The operating system abstracts (maps) from the physical properties of its storage devices to def define a logical storage unit i.e., the file. The operating system provides various system calls

Question 5:

How do you differentiate between pre-emptive and non pre-emptive scheduling? Briefly describe round robin and shortest process next scheduling with examples for each.

(10 Marks)

Answer :
CPU scheduling deals with the problem of deciding which of the processes in the ready queue is to be allocated to the CPU. A major division among scheduling algorithms is that whether they support pre-emptive or non-pre-emptive scheduling discipline.

Pre-emptive scheduling: Pre-emption means the operating system moves a process from running to ready without the process requesting it. An OS implementing these algorithms switches to the processing of a new request before completing the processing of the current request. The preempted request is put back into the list of the pending requests. Its servicing would be resumed sometime in the future when it is scheduled again. Pre-emptive scheduling is more useful in high priority process which requires immediate response. For example, in Real time system the consequence of missing one interrupt could be dangerous.

Round Robin scheduling, priority based scheduling or event driven scheduling and SRTN are considered to be the pre-emptive scheduling algorithms.

Non-Pre-emptive scheduling: A scheduling discipline is non-pre-emptive if once a process has been allotted to the CPU, the CPU cannot be taken away from the process. A non-pre-emptive discipline always processes a scheduled request to its completion. In non-pre-emptive systems, jobs are made to wait by longer jobs, but the treatment of all processes is fairer.

First come First Served (FCFS) and Shortest Job First (SJF), are considered to be the non-preemptive scheduling algorithms.

Round Robin (RR)
Round Robin (RR) scheduling is a pre-emptive algorithm that relates the process that has been waiting the longest. This is one of the oldest, simplest and widely used algorithms. The round robin scheduling algorithm is primarily used in time-sharing and a multi-user system environment where the primary requirement is to provide reasonably good response times and in general to share the system fairly among all system users. Basically the CPU time is divided into time slices.

Each process is allocated a small time-slice called quantum. No process can run for more than one quantum while others are waiting in the ready queue. If a process needs more CPU time to complete after exhausting one quantum, it goes to the end of ready queue to await the next allocation. To implement the RR scheduling, Queue data structure is used to maintain the Queue of Ready processes. A new process is added at the tail of that Queue. The CPU scheduler picks the first process from the ready Queue, Allocate processor for a specified time Quantum. After that time the CPU scheduler will select the next process is the ready Queue.

Consider the following set of process with the processing time given in milliseconds:

Process Processing Time
P1 24
P2 03
P3 03

If we use a time Quantum of 4 milliseconds then process P1 gets the first 4 milliseconds. Since it requires another 20 milliseconds, it is pre-empted after the first time Quantum, and the CPU is given to the next process in the Queue, Process P2. Since process P2 does not need 4 milliseconds, it quits before its time Quantum expires. The CPU is then given to the next process, Process P3 one each process has received 1 time Quantum, the CPU is returned to process P1 for an additional time quantum. The Gantt chart will be:

P1 P2 P3 P1 P1 P1 P1 P1
0 4 7 10 14 18 22 26 30

Process Processing Time Turn around time=t(Process Completed)- t(Process Submitted) Waiting Time=Turn around time – Processing time

P1 24 30 – 0 = 30 30 – 24 = 6
P2 03 7 – 0 = 7 7 – 3 = 4
P3 03 10 – 0 = 10 10 – 3 = 7

Average turn around time = (30+7+10)/3 = 47/3 = 15.66
Average waiting time = (6+4+7)/3 = 17/3 = 5.66
Throughput = 3/30 = 0.1
Processor utilization = (30/30)*100 = 100%

Shortest Remaining Time Next (SRTN): (Shortest Process Next)
This is the pre-emptive version of shortest job first. This permits a process that enters the ready list to pre-empt the running process if the time for the new process (or for its next burst) is less than the remaining time for the running process (or for its current burst). Example:

Consider the set of four processes arrived as per timings described in the table:

Process Arrival Time Processing Time
P1 0 5
P2 1 2
P3 2 5
P4 3 3

At time 0, only process P1 has entered the system, so it is the process that executes. At time 1, process P2 arrives. At that time, process P1 has 4 time units left to execute. At this juncture process 2’s processing time is less compared to the P1 left out time (4 units). So P2 starts executing at time 1. At time 2, process P3 enters the system with the processing time 5 units.Process P2 continues executing as it has the minimum number of time units when compared with P1 and P3. At time 3, process P2 terminates and process P4 enters the system. Of the processes P1, P3 and P4, P4 has the smallest remaining execution time so it starts executing. When process P1 terminates at time 10, process P3 executes. The Gantt chart is shown below:

P1 P2 P4 P1 P3
0 1 3 6 10 15

Turnaround time for each process can be computed by subtracting the time it terminated from the arrival time.

Turn around Time = t(Process Completed) – t(Process Submitted)
The turnaround time for each of the processes is:
P1: 10 – 0 = 10
P2: 3 – 1 = 2
P3: 15 – 2 = 13
P4: 6 – 3 = 3
The average turnaround time is (10+2+13+3) / 4 = 7
The waiting time can be computed by subtracting processing time from turnaround time, yielding the following 4 results for the processes as
P1: 10 – 5 = 5
P2: 2 – 2 = 0
P3: 13 – 5 = 8
P4: 3 – 3 = 0
The average waiting time = (5+0+8+0) /4 = 3.25 milliseconds.
Four jobs executed in 15 time units, so throughput is 15/4 = 3.75 time units/job.

Question 6:

i) What are the main differences between capabilities lists and access lists? Explain through examples.

(10 Marks)

Answer :
The access matrix model for computer protection is based on abstraction of operating system structures. Because of its simplicity and generality, it allows a variety of implementation techniques, as has been widely used.

There are three principal components in the access matrix model:
• A set of passive objects,
• A set of active subjects, which may manipulate the objects,
• A set of rules governing the manipulation of objects by subjects.

Objects are typically files, terminals, devices, and other entities implemented by an operating system. A subject is a process and a domain (a set of constraints within which the process may access certain objects). It is important to note that every subject is also an object; thus it may be read or otherwise manipulated by another subject. The access matrix is a rectangular array with one row per subject and one column per object. The entry for a particular row and column reflects the mode of access between the corresponding subject and object. The mode of access allowed depends on the type of the object and on the functionality of the system; typical modes are read, write, append, and execute.

All accesses to objects by subjects are subject to some conditions laid down by an enforcement mechanism that refers to the data in the access matrix. This mechanism, called a reference monitor, rejects any accesses (including improper attempts to alter the access matrix data) that are not allowed by the current protection state and rules. References to objects of a given type must be validated by the monitor for that type. While implementing the access matrix, it has been observed that the access matrix tends to be very sparse if it is implemented as a two-dimensional array.

Consequently, implementations that maintain protection of data tend to store them either row wise, keeping with each subject a list of objects and access modes allowed on it; or column wise, storing with each object a list of those subjects that may access it and the access modes allowed on each. The former approach is called the capability list approach and the latter is called the access control list approach.

In general, access control governs each user’s ability to read, execute, change, or delete information associated with a particular computer resource. In effect, access control works at two levels: first, to grant or deny the ability to interact with a resource, and second, to control what kinds of operations or activities may be performed on that resource. Such controls are managed by an access control system.

ii) What is the Kernel of an operating system? What functions are normally performed by the Kernel? Gives several reasons why it is effective to design micro Kernel.

(10 Marks)

Answer :
The operating system, referred to in UNIX as the kernel, interacts directly with the hardware and provides the services to the user programs. These user programs don’t need to know anything about the hardware. They just need to know how to interact with the kernel and it’s up to the kernel to provide the desired service. One of the big appeals of UNIX to programmers has been that most well written user programs are independent of the underlying hardware, making them readily portable to new systems.

User programs interact with the kernel through a set of standard system calls. These system calls request services to be provided by the kernel. Such services would include accessing a file: open close, read, write, link, or execute a file; starting or updating accounting records; changing ownership of a file or directory; changing to a new directory; creating, suspending, or killing a process; enabling access to hardware devices; and setting limits on system resources.

UNIX is a multi-user, multi-tasking operating system. You can have many users logged into a system simultaneously, each running many programs. It is the kernel’s job to keep each process and user separate and to regulate access to system hardware, including CPU, memory, disk and other I/O devices.

Operating systems can be either monolithic (e.g., UNIX and Windows) or modular (e.g., Mach and Windows NT). A modular operating system is called a micro kernel. A micro-kernel OS has a small minimalist kernel that includes as little functionality as possible.

------------------------------------------

Course Code : MCS-042

Course Title : Data Communication and Computer Networks

Assignment Number : MCA(4)/042/Assign/09

Maximum Marks : 100

Weightage : 25%

Last Date of Submission : 15^th October, 2009 (for July,2009 session)

15^th April, 2010 (for January, 2010 session)

This assignment has five questions, which carries 80 marks. Answer all questions. Rest 20 marks are for viva voce. You may use illustrations and diagrams to enhance the explanations. Please go through the guidelines regarding assignments given in the Programme Guide for the format of presentation. Answer to each part of the question should be confined to about 300 words.

Question 1:

i) What are the Nyquist and the Shannon limits on the channel capacity? Elaborate through examples.

(8 Marks)

In information theory, the Shannon–Hartley theorem is an application of the noisy channel coding theorem to the archetypal case of a continuous-time analog communications channel subject to Gaussian noise. The theorem establishes Shannon's channel capacity for such a communication link, a bound on the maximum amount of error-free digital data (that is, information) that can be transmitted with a specified
bandwidth in the presence of the noise interference, under the assumption that the signal power is bounded and the Gaussian noise process is characterized by a known power or power spectral density. The law is named after Claude Shannon and Ralph Hartley

Statement of the theorem
Considering all possible multi-level and multi-phase encoding techniques, the Shannon–Hartley theorem states that the channel capacity C, meaning the theoretical tightest upper bound on the information rate (excluding error correcting codes) of clean (or arbitrarily low bit error rate) data that can be sent with a given average signal power S through an analog communication channel subject to additive white Gaussian noise of power N, is:
C = B log2(1 + S/N)

where
C is the channel capacity in bits per second;
B is the bandwidth of the channel in hertz (passband bandwidth in case of a modulated signal);
S is the total received signal power over the bandwidth (in case of a modulated signal, often denoted C, i.e. modulated carrier), measured in watt or volt2;
N is the total noise or interference power over the bandwidth, measured in watt or volt2; and
S/N is the signal-to-noise ratio (SNR) or the carrier-to-noise ratio (CNR) of the communication signal to the Gaussian noise interference expressed as a linear power ratio (not as logarithmic decibels).

Historical development
During the late 1920s, Harry Nyquist and Ralph Hartley developed a handful of fundamental ideas related to the transmission of information, particularly in the context of the telegraph as a communications system. At the time, these concepts were powerful breakthroughs individually, but they were not part of a comprehensive theory. In the 1940s, Claude Shannon developed the concept of channel capacity, based in part on the ideas of Nyquist and Hartley, and then formulated a complete theory of information and its transmission.

Nyquist rate
In 1927, Nyquist determined that the number of independent pulses that could be put through a telegraph channel per unit time is limited to twice the bandwidth of the channel. In symbols, where fp is the pulse frequency (in pulses per second) and B i s the bandwidth (in hertz). The quantity 2B later came to be called the Nyquist rate, and transmitting at the limiting pulse rate of 2B pulses per second as signalling at the Nyquist rate. Nyquist published his results in 1928 as part of his paper "Certain topics in Telegraph Transmission Theory."

ii) Differentiate between the followings:

a) FDM and TDM

b) Circuit switching and packet switching

c) Virtual circuit and diagram

d) Stop and wait protocol and sliding window protocol

(12 Marks)

a) FDM and TDM
The resource allocation method is the most important factor for the efficient design of SubMAP. Particularly, the multiplexing between data regions and control regions is a key hardware out there to support. Second, and perhaps more or at least very important, it could well turn up on the test. If one question stands between you and passing, don’t make this the one you miss. In principle, circuit switching and packet switching both are used in high-capacity networks. In circuit-switched networks, network resources are static, set in “copper” if you will, from the sender to receiver before the start of the transfer, thus creating a “circuit”. The resources remain dedicated to the circuit during the entire transfer and the entire message follows the same path. In
packet-switched networks, the message is broken into packets, each of which can take a different route to the destination where the packets are recompiled into the original message. All the above can be handled by a router or a switch but much of IT today is going toward flat switched networks. So when we’re talking about circuit switching or packet switching, we are more and more talking about doing it on a switch.

Switched Networks
First, let’s be sure we understand what we mean by a switched network. A switched network goes through a switch instead of a router. This actually is the way most networks are headed, toward flat switches on VLANs instead of routers. Still, it’s not always easy to tell a router from a switch. It’s commonly believed that the difference between a switched network and a routed network is simple binary opposition. T’ain’t so. A router operates at Layer 3 of the OSI Model and can create and connect several logical networks, including those of different network topologies, such as Ethernet and Token Ring. A router will provide multiple paths (compared to only one on a bridge) between segments and will map nodes on a segment and the connecting paths with a routing protocol and internal routing tables. Being a Layer 3 device, the router uses the destination IP address to decide where a frame should go. If the destination IP address is on a segment directly connected to the router, then the router will forward the frame out the appropriate port to that segment. If not, the router will search its routing table for the correct destination, again, using that IP address.

Having talked about a router as being a Layer 3 device, think about what I’m about to say next as a general statement. I know there are exceptions, namely the Layer 3 switch. We’re not going to get into that, not in this article.

A switch is very like a bridge in that is usually a layer 2 device that looks to MAC addresses to determine where data should be directed. A switch has other applications in common with a bridge. Like a bridge, a switch will use transparent and source-route methods to move data and Spanning Tree Protocol ( STP) to avoid loops. However, switches are superior to bridges because they provide greater port density and they
can be configured to make more intelligent decisions about where data goes.

The three most common switch methods are:

1. Cut-through - Streams data so that the first part of a packet exits the switch before the rest of the packet has finished entering the switch, typically within the first 12 bytes of an Ethernet frame.

2. Store-and-Forward - The entire frame is copied into the switch's memory buffer and it stays there while the switch processes the Cyclical Redundancy Check CRC) to look for errors in the frame. If the frame contains no errors, it will be forwarded. If a frame contains an error, it will be dropped. Obviously, this method has higher latency than cut-through but there will be no fragments or bad frames taking up bandwidth.

3. Fragment-free Switching - Think of this as a hybrid of cut-through and store-and-forward. The switch reads only the first 64 bytes of the frame into buffer

c) Virtual Circuit and Diagram
Differences between datagram and virtual circuit networks
There are a number of important differences between virtual circuit and datagram networks. The choice strongly impacts complexity of the different types of node. Use of datagram’s between intermediate nodes allows relatively simple protocols at this level, but at the expense of making the end (user) nodes more complex when end-to-end virtual circuit service is desired.

The Internet transmits data grams between intermediate nodes using IP. Most Internet users need additional functions such as end-to-end error and sequence control to give a reliable service (equivalent to that provided by virtual circuits). This reliability may be provided by the Transmission Control Protocol (TCP) which is used end-to-end across the Internet, or by applications such as the trivial file transfer protocol (tftp) running on top of the User Datagram Protocol (UDP).

d) Stop and Wait Protocol and Sliding Window Protocol
This experiment will bring out the correct choice of the packet sizes for transmission in noisy channels.Open two sliding window (S/W) applications, each in one computer. Assign Node Id 1 as receiver and Node Id 0 as sender. Conduct the experiment for 200 secs. Set the link rate to be 8kbps. Set the protocol to CSMA/CD.Set the No. of Packets (Window size) to 1 in both nodes (because Stop and Wait protocol is a window size-1 algorithm). Make sure the No. of Nodes is set to 2 and the Inter Packet delay (IPD) in both the nodes is set to 0. This makes sure no delay is introduced in the network other than the transmission delay. Set the Tx/Rx Mode to be Promiscous mode and the direction as sender or Receiver accordingly. Set BER to 0 and run the experiment. Find out the size of the transmitted packets and the acknowledgement packets received. Calculate the overhead involved in the transmitted packets for different packet sizes. Choose packet sizes 10 ..100 bytes in multiples of 10. Now set BER to 10-3 and perform the experiment. Give timeout as 1000ms. Calculate the throughputs. Perform the previous steps now for a BER of 10-4 for packet sizes (100..900) bytes in steps of 100 and calculate the throughputs. Packet sizes are chosen longer, as the BER is less. Give larger timeout as packets are longer(say, 2000ms). Plot throughput vs packet size curves and find out the optimum packet size for the different BERs .

Sliding Window Protocol
This experiment will bring out the necessity of increasing the transmitter and receiver window sizes and the correct choice of the window size in a delay network.

1. Set up the same configuration as for the previous experiment.

2. Set BER to 0 and fix the packet size at 100 bytes.

3. Set IPD at the sender constantly at 20 ms and the IPD at the receiver to vary between 40 to 190 ms (in steps of 50). This setting simulates various round-trip delays in the network.

4. Change the Window sizes from 1 to 5 in both the nodes together. Give large timeout, 10000ms, as this will make sure that there are very few re-transmissions. Now perform the experiment.

5. Plot the throughput vs Window Sizes for different IPDs and find out the optimum window size for different delays.

Question 2:

i) Compare the features of different 10 Mbps, 100 Mbps and 1000 Mbps Ethernet technologies.

(5 Marks)

----->

10-Mbps Ethernet—10Base-T

10Base-T provides Manchester-encoded 10-Mbps bit-serial communication over two unshielded twisted-pair cables. Although the standard was designed to support transmission over common telephone cable, the more typical link configuration is to use two pair of a four-pair Category 3 or 5 cable, terminated at each NIC with an 8-pin RJ-45 connector (the MDI), as shown in Figure 7-15. Because each active pair is configured as a simplex link where transmission is in one direction only, the 10Base-T physical layers can support either half-duplex or full-duplex operation.

Figure 7-15 The Typical 10Base-T Link Is a Four-Pair UTP Cable in Which Two Pairs Are Not Used

Although 10Base-T may be considered essentially obsolete in some circles, it is included here because there are still many 10Base-T Ethernet networks, and because full-duplex operation has given 10BaseT an extended life.

10Base-T was also the first Ethernet version to include a link integrity test to determine the health of the link. Immediately after powerup, the PMA transmits a normal link pulse (NLP) to tell the NIC at the other end of the link that this NIC wants to establish an active link connection:

•If the NIC at the other end of the link is also powered up, it responds with its own NLP.

•If the NIC at the other end of the link is not powered up, this NIC continues sending an NLP about once every 16 ms until it receives a response.

The link is activated only after both NICs are capable of exchanging valid NLPs.

100 Mbps—Fast Ethernet

Increasing the Ethernet transmission rate by a factor of ten over 10Base-T was not a simple task, and the effort resulted in the development of three separate physical layer standards for 100 Mbps over UTP cable: 100Base-TX and 100Base-T4 in 1995, and 100Base-T2 in 1997. Each was defined with different encoding requirements and a different set of media-dependent sublayers, even though there is some overlap in the link cabling. Table 7-2 compares the physical layer characteristics of 10Base-T to the various 100Base versions.

Table 7-2 Summary of 100Base-T Physical Layer Characteristics
Ethernet Version	Transmit Symbol Rate¹	Encoding	Cabling	Full-Duplex Operation
10Base-T	10 MBd	Manchester	Two pairs of UTP Category -3 or better	Supported
100Base-TX	125 MBd	4B/5B	Two pairs of UTP Category -5 or Type 1 STP	Supported
100Base-T4	33 MBd	8B/6T	Four pairs of UTP Category -3 or better	Not supported
100Base-T2	25 MBd	PAM5x5	Two pairs of UTP Category -3 or better	Supported

¹ One baud = one transmitted symbol per second, where the transmitted symbol may contain the equivalent value of 1 or more binary bits.

Although not all three 100-Mbps versions were successful in the marketplace, all three have been discussed in the literature, and all three did impact future designs. As such, all three are important to consider here.

100Base-X

100Base-X was designed to support transmission over either two pairs of Category 5 UTP copper wire or two strands of optical fiber. Although the encoding, decoding, and clock recovery procedures are the same for both media, the signal transmission is different—electrical pulses in copper and light pulses in optical fiber. The signal transceivers that were included as part of the PMA function in the generic logical model of Figure 7-14 were redefined as the separate physical media-dependent (PMD) sublayers shown in Figure 7-16.

Figure 7-16 The 100Base-X Logical Model

The 100Base-X encoding procedure is based on the earlier FDDI optical fiber physical media-dependent and FDDI/CDDI copper twisted-pair physical media-dependent signaling standards developed by ISO and ANSI. The 100Base-TX physical media-dependent sublayer (TP-PMD) was implemented with CDDI semiconductor transceivers and RJ-45 connectors; the fiber PMD was implemented with FDDI optical transceivers and the Low Cost Fibre Interface Connector (commonly called the duplex SC connector).

The 4B/5B encoding procedure is the same as the encoding procedure used by FDDI, with only minor adaptations to accommodate Ethernet frame control. Each 4-bit data nibble (representing half of a data byte) is mapped into a 5-bit binary code-group that is transmitted bit-serial over the link. The expanded code space provided by the 32 5-bit
code-groups allow separate assignment for the following:

•The 16 possible values in a 4-bit data nibble (16 code-groups).

•Four control code-groups that are transmitted as code-group pairs to indicate the start-of-stream delimiter (SSD) and the end-of-stream delimiter (ESD). Each MAC frame is "encapsulated" to mark both the beginning and end of the frame. The first byte of preamble is replaced with SSD code-group pair that precisely identifies the frame's code-group boundaries. The ESD code-group pair is appended after the frame's FCS field.

•A special IDLE code-group that is continuously sent during interframe gaps to maintain continuous synchronization between the NICs at each end of the link. The receipt of IDLE is interpreted to mean that the link is quiet.

•Eleven invalid code-groups that are not intentionally transmitted by a NIC (although one is used by a repeater to propagate receive errors). Receipt of any invalid code-group will cause the incoming frame to be treated as an invalid frame.

Figure 7-17 shows how a MAC frame is encapsulated before being transmitted as a 100Base-X code-group stream.

----->

ii) Explain the basic operation of collision detection in Ethernet.

(5 Marks)

CSMA/CD is a modification of pure Carrier Sense Multiple Access (CSMA).

Collision detection is used to improve CSMA performance by terminating transmission as soon as a collision is detected, and reducing the probability of a second collision on retry.

Methods for collision detection are media dependent, but on an electrical bus such as Ethernet, collisions can be detected by comparing transmitted data with received data. If they differ, another transmitter is overlaying the first transmitter's signal (a collision), and transmission terminates immediately. A jam signal is sent which will cause all transmitters to back off by random intervals, reducing the probability of a collision when the first retry is attempted.

In our conversation, we can handle this situation gracefully. We both hear the other speak at the same time we are speaking, so we can stop to give the other person a chance to go on. Ethernet nodes also listen to the medium while they transmit to ensure that they are the only station transmitting at that time. If the stations hear their own transmission returning in a garbled form, as would happen if some other station had begun to transmit its own message at the same time, then they know that a collision occurred. A single Ethernet segment is sometimes called a collision domain because no two stations on the segment can transmit at the same time without causing a collision. When stations detect a collision, they cease transmission, wait a random amount of time, and attempt to transmit when they again detect silence on the medium.

The random pause and retry is an important part of the protocol. If two stations collide when transmitting once, then both will need to transmit again. At the next appropriate chance to transmit, both stations involved with the previous collision will have data ready to transmit. If they transmitted again at the first opportunity, they would most likely collide again and again indefinitely. Instead, the random delay makes it unlikely that any two stations will collide more than a few times in a row.

iii) Compare the advantages of fibre optics over copper wire and coaxial cable.

(5 Marks)

Fiber Optic Benefits and Fiber Optic Advantages

Fiber-optic systems use pulses of light traveling through an optical fiber to transmit data. This method offers many advantages over copper wire, some of which are not available with other technology:

§ Complete input/output electrical isolation

§ No electromagnetic interference (EMI) susceptibility or radiation along the transmission media

§ Broad bandwidth over a long distance

§ Light-weight, small-diameter cables

§ Equal to the cost of copper wire and connectors (except when copper wire is already installed)

So let’s explain the fiber optic benefits and advantages in detail below:

1. Electromagnetic Interference (EMI)

Because optical fiber transmits light rather than electrons, it neither radiates EM (electromagnetic) fields nor is it susceptible to any EM fields surrounding it. This is important in a number of applications:

§ Industrial control, where cables run along factory floors in proximity to electrically noisy machinery. The optical medium permits the control signals to be carried error-free through the electrically noisy environment.

§ Telecommunications equipment manufacturers use optical fiber because it eliminates cross talk between the telecommunication lines.

§ Financial institutions and gaming equipment manufacturers require data security. Tapping into a fiber cable without being detected is extremely difficult.

2. High Bandwidth

Optical fiber has a relatively high bandwidth in comparison to other transmission media. This permits much longer transmission distances and much higher signal rates than most media. For example, all undersea long-haul telecommunications cable is fiber-optic.

This technology is allowing worldwide communications (voice, video and data) to be available mainstream. With new technologies, such as VCSEL transmitters, parallel optics and wavelength division multiplexing (WDM), services such as video-on-demand and video conferencing will be available to most homes in the near future.

3. Voltage Isolation and Voltage Insulation

Fiber isolates two different voltage potentials. and insulates in high-voltage areas. For example, it will eliminate errors due to ground-loop potential differences and is ideal for data transmission in areas subject to frequent electrical storms, and presents no hazard to the field installer.

4. Weight and Diameter

A 100 meter coaxial cable transmitting 500 megabits of data per unit time is about 800 percent heavier than a plastic fiber cable and about 700 percent heavier than a hard-clad silica cable, all of equal length and transmitting at the same data rate.

The relative diameters of various types of fiber cable and coaxial copper cable for the same distance and data rate are shown in the illustration below.

BRIEF OVER VIEW OF FIBER OPTIC CABLE ADVANTAGES OVER COPPER:

• SPEED: Fiber optic networks operate at high speeds - up into the gigabits
• BANDWIDTH: large carrying capacity
• DISTANCE: Signals can be transmitted further without needing to be "refreshed" or strengthened.
• RESISTANCE: Greater resistance to electromagnetic noise such as radios, motors or other nearby cables.
• MAINTENANCE: Fiber optic cables costs much less to maintain.

MICROPROCESSORS & APPLICATIONS LAB MANUAL(Last content)

2012-05-21T07:23:00.000-07:00

2.8086 STRING MANIPULATION –FIND AND REPLACE A WORD

AIM:

To find and replace a word from a string.

ALGORITHM:

1. Load the source and destination index register with starting and the ending address respectively.

2. Initialize the counter with the total number of words to be copied.

3. Clear the direction flag for auto incrementing mode of transfer.

4. Use the string manipulation instruction SCASW with the prefix REP to search a word from string.

5. If a match is found (z=1), replace the old word with the current word in destination address. Otherwise, stop.

RESULT:

A word is found and replaced from a string.

PROGRAM:

ASSUME CS: CODE, DS: DATA

DATA SEGMENT

LIST DW 53H, 15H, 19H, 02H

REPLACE EQU 30H

COUNT EQU 05H

DATA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

MOV AX, 15H

MOV SI, OFFSET LIST

MOV CX, COUNT

MOV AX, 00

CLD

REP SCASW

JNZ LOOP

MOV DI, LABEL LIST

MOV [DI], REPLACE

LOOP MOV AH, 4CH

INT 21H

CODE ENDS

END START

INPUT:

LIST: 53H, 15H, 19H, 02H

OUTPUT:

LIST: 53H, 30H, 19H, 02H

3. 8086 STRING MANIPULATION – COPY A STRING

AIM:

To copy a string of data words from one location to the other.

ALGORITHM:

Load the source and destination index register with starting and the ending address respectively.
Initialize the counter with the total number of words to be copied.
Clear the direction flag for auto incrementing mode of transfer.
Use the string manipulation instruction MOVSW with the prefix REP to copy a string from source to destination.

RESULT:

A string of data words is copied from one location to other.

PROGRAM:

ASSUME CS: CODE, DS: DATA

DATA SEGMENT

SOURCE EQU 2000H

DEST EQU 3000H

COUNT EQU 05H

DATA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

MOV ES, AX

MOV SI, SOURCE

MOV DI, DEST

MOV CX, COUNT

CLD

REP MOVSW

MOV AH, 4CH

INT 21H

CODE ENDS

END START

INPUT: OUTPUT:

2000 48 3000 48

2001 84 3001 84

2002 67 3002 67

2003 90 3003 90

2004 21 3004 21

4.8086 STRING MANIPULATION – SORTING

AIM:

To sort a group of data bytes.

ALGORITHM:

· Place all the elements of an array named list (in the consecutive memory locations).

· Initialize two counters DX & CX with the total number of elements in the array.

· Do the following steps until the counter B reaches 0.

o Load the first element in the accumulator

o Do the following steps until the counter C reaches 0.

1. Compare the accumulator content with the next element present in the next memory location. If the accumulator content is smaller go to next step; otherwise, swap the content of accumulator with the content of memory location.

2. Increment the memory pointer to point to the next element.

3. Decrement the counter C by 1.

· Stop the execution.

RESULT:

A group of data bytes are arranged in ascending order.

PROGRAM:

ASSUME CS: CODE, DS: DATA

DATA SEGMENT

LIST DW 53H, 25H, 19H, 02H

COUNT EQU 04H

DATA ENDS

CODE SEGMENT

START: MOV AX, DATA

MOV DS, AX

MOV DX, COUNT-1

LOOP2: MOV CX, DX

MOV SI, OFFSET LIST

AGAIN: MOV AX, [SI]

CMP AX, [SI+2]

JC LOOP1

XCHG [SI +2], AX

XCHG [SI], AX

LOOP1: ADD SI, 02

LOOP AGAIN

DEC DX

JNZ LOOP2

MOV AH, 4CH

INT 21H

CODE ENDS

END START

INPUT:

LIST: 53H, 25H, 19H, 02H

OUTPUT:

LIST: 02H, 19H, 25H, 53H

4. INTERFACING 8255 WITH 8085

AIM:

To interface programmable peripheral interface 8255 with 8085 and study its characteristics in mode0,mode1 and BSR mode.

APPARATUS REQUIRED:

8085 mp kit, 8255Interface board, DC regulated power supply, VXT parallel bus

I/O MODES:

Control Word:

MODE 0 – SIMPLE I/O MODE:

This mode provides simple I/O operations for each of the three ports and is suitable for synchronous data transfer. In this mode all the ports can be configured either as input or output port.

Let us initialize port A as input port and port B as output port

PROGRAM:

ADDRESS	OPCODES	LABEL	MNEMONICS	OPERAND	COMMENTS
4100		START:	MVI	A, 90	Initialize port A as Input and Port B as output.
4101					Initialize port A as Input and Port B as output.
4102			OUT	C6	Send Mode Control word
4103					Send Mode Control word
4104			IN	C0	Read from Port A
4105					Read from Port A
4106			OUT	C2	Display the data in port B
4107					Display the data in port B
4108			STA	4200	Store the data read from Port A in 4200
4109
410A
410B			HLT		Stop the program.

MODE1 STROBED I/O MODE:

In this mode, port A and port B are used as data ports and port C is used as control signals for strobed I/O data transfer.

Let us initialize port A as input port in mode1

MAIN PROGRAM:

ADDRESS	OPCODES	LABEL	MNEMONICS	OPERAND	COMMENTS
4100		START:	MVI	A, B4	Initialize port A as Input port in mode 1.
4101					Initialize port A as Input port in mode 1.
4102			OUT	C6	Send Mode Control word
4103					Send Mode Control word
4104			MVI	A,09	Set the PC4 bit for INTE A
4105
4106			OUT	C6	Display the data in port B
4107
			EI
4108			MVI	A,08	Enable RST5.5
4109					Enable RST5.5
410A			SIM
			EI
410B			HLT		Stop the program.

ISR (Interrupt Service Routine)

ADDRESS	OPCODES	LABEL	MNEMONICS	OPERAND	COMMENTS
4200		START:	IN	C0	Read from port A
4201					Read from port A
4202			STA	4500	Store in 4500.
4203					Store in 4500.
4204
4205			HLT		Stop the program.

Sub program:

ADDRESS	OPCODES	LABEL	MNEMONICS	OPERAND	COMMENTS
405E			JMP	4200	Go to 4200
405F
4060

BSR MODE (Bit Set Reset mode)

Any lines of port c can be set or reset individually without affecting other lines using this mode. Let us set PC0 and PC3 bits using this mode.

PROGRAM:

ADDRESS	OPCODES	LABEL	MNEMONICS	OPERAND	COMMENTS
4100		START:	MVI	A, 01	Set PC0
4101					Set PC0
4102			OUT	C6	Send Mode Control word
4103					Send Mode Control word
4104			MVI	A,07	Set PC3
4105					Set PC3
4106			OUT	C6	Send Mode Control word
4107					Send Mode Control word
4109			HLT		Stop the program.

RESULT:

Thus 8255 is interfaced and its characteristics in mode0,mode1 and BSR mode is studied.

6. INTERFACING 8253 TIMER WITH 8085

Interfacing 8253 Programmable Interval Timer with 8085 mp

AIM:

To interface 8253 Interface board to 8085 mp and verify the operation of 8253in six different modes.

APPARATUS REQUIRED:

8085 mp kit, 8253 Interface board, DC regulated power supply, VXT parallel bus, CRO.

Mode 0 – Interrupt on terminal count:

The output will be initially low after mode set operations. After loading the counter, the output will be remaining low while counting and on terminal count; the output will become high, until reloaded again.

Let us set the channel 0 in mode 0. Connect the CLK 0 to the debounce circuit by changing the jumper J3 and then execute the following program.

Program:

Address	Opcodes	Label	Mnemonic	Operands	Comments
4100		START:	MVI	A, 30	Channel 0 in mode 0
4102			OUT	CE	Send Mode Control word
4104			MVI	A, 05	LSB of count
4106			OUT	C8	Write count to register
4108			MVI	A, 00	MSB of count
410A			OUT	C8	Write count to register
410C			HLT

It is observed in CRO that the output of Channel 0 is initially LOW. After giving six clock pulses, the output goes HIGH.

Mode 1 – Programmable ONE-SHOT:

After loading the counter, the output will remain low following the rising edge of the gate input. The output will go high on the terminal count. It is retriggerable; hence the output will remain low for the full count, after any rising edge of the gate input.

Example:

The following program initializes channel 0 of 8253 in Mode 1 and also initiates triggering of Gate 0. OUT 0 goes low, as clock pulse after triggering the goes back to high level after 5 clock pulses. Execute the program, give clock pulses through the debounce logic and verify using CRO.

Address	Opcodes	Label	Mnemonic	Operands	Comments
4100		START:	MVI	A, 32	Channel 0 in mode 1
4102			OUT	CE	Send Mode Control word
4104			MVI	A, 05	LSB of count
4106			OUT	C8	Write count to register
4108			MVI	A, 00	MSB of count
410A			OUT	C8	Write count to register
410C			OUT	D0	Trigger Gate0
4100			HLT

Mode 2 – Rate Generator:

It is a simple divide by N counter. The output will be low for one period of the input clock. The period from one output pulse to the next equals the number of input counts in the count register. If the count register is reloaded between output pulses the present period will not be affected but the subsequent period will reflect the new value.

Example:

Using Mode 2, Let us divide the clock present at Channel 1 by 10. Connect the CLK1 to PCLK.

Address	Opcodes	Label	Mnemonic	Operands	Comments
4100	3E 74	START:	MVI	A, 74	Channel 1 in mode 2
4102	D3 CE		OUT	CE	Send Mode Control word
4104	3E 0A		MVI	A, 0A	LSB of count
4106	D3 CA		OUT	CA	Write count to register
4108	3E 00		MVI	A, 00	MSB of count
410A	D3 CA		OUT	CA	Write count to register
410C	76		HLT

In CRO observe simultaneously the input clock to channel 1 and the output at Out1.

Mode 3 Square wave generator:

It is similar to Mode 2 except that the output will remain high until one half of count and go low for the other half for even number count. If the count is odd, the output will be high for (count + 1)/2 counts. This mode is used of generating Baud rate for 8251A (USART).

Example:

We utilize Mode 0 to generate a square wave of frequency 150 KHz at channel 0.

Address	Opcodes	Label	Mnemonic	Operands	Comments
4100	3E 36	START:	MVI	A, 36	Channel 0 in mode 3
4102	D3 CE		OUT	CE	Send Mode Control word
4104	3E 0A		MVI	A, 0A	LSB of count
4106	D3 C8		OUT	C8	Write count to register
4108	3E 00		MVI	A, 00	MSB of count
410A	D3 C8		OUT	C8	Write count to register
410C	76		HLT

Set the jumper, so that the clock 0 of 8253 is given a square wave of frequency 1.5 MHz. This program divides this PCLK by 10 and thus the output at channel 0 is 150 KHz.

Vary the frequency by varying the count. Here the maximum count is FFFF H. So, the square wave will remain high for 7FFF H counts and remain low for 7FFF H counts. Thus with the input clock frequency of 1.5 MHz, which corresponds to a period of 0.067 microseconds, the resulting square wave has an ON time of 0.02184 microseconds and an OFF time of 0.02184 microseconds.

To increase the time period of square wave, set the jumpers such that CLK2 of 8253 is connected to OUT 0. Using the above-mentioned program, output a square wave of frequency 150 KHz at channel 0. Now this is the clock to channel 2.

Mode 4: Software Triggered Strobe:

The output is high after mode is set and also during counting. On terminal count, the output will go low for one clock period and becomes high again. This mode can be used for interrupt generation.

The following program initializes channel 2 of 8253 in mode 4.

Example:

Connect OUT 0 to CLK 2 (jumper J1). Execute the program and observe the output OUT 2. Counter 2 will generate a pulse after 1 second.

Address	Opcodes	Label	Mnemonic	Operands	Comments
4100		START:	MVI	A, 36	Channel 0 in mode 0
4102			OUT	CE	Send Mode Control word
4104			MVI	A, 0A	LSB of count
4106			OUT	C8	Write count to register
4108			MVI	A, 00	MSB of count
410A			OUT	C8	Write count to register
410C			MVI	A, B8	Channel 2 in Mode 4
410E			OUT	CE	Send Mode control Word
4110			MVI	A, 98	LSB of Count
4112			OUT	CC	Write Count to register
4114			MVI	A, 3A	MSB of Count
4116			OUT	CC	Write Count to register
4118			HLT

Mode 5 Hardware triggered strobe:

Counter starts counting after rising edge of trigger input and output goes low for one clock period when terminal count is reached. The counter is retriggerable.

Example:

The program that follows initializes channel 0 in mode 5 and also triggers Gate 0. Connect CLK 0 to debounce circuit.

Execute the program. After giving Six clock pulses, you can see using CRO, the initially HIGH output goes LOW. The output ( OUT 0 pin) goes high on the next clock pulse.

Address	Opcodes	Label	Mnemonic	Operands	Comments
4100		START:	MVI	A, 1A	Channel 0 in mode 5
4102			OUT	CE	Send Mode Control word
4104			MVI	A, 05	LSB of count
4106			OUT	C8	Write count to register
4108			MVI	A, 00	MSB of count
410A			OUT	D0	Trigger Gate 0
410C			HLT

Result:

Thus the 8253 has been interfaced to 8085 mp and six different modes of 8253 have been studied.

7. INTERFACING 8279 WITH 8085

8. INTERFACING 8251 WITH 8085

9. 8051 - SUM OF ELEMENTS IN AN ARRAY

AIM:

To find the sum of elements in an array.

ALGORITHM:

1. Load the array in the consecutive memory location and initialize the memory pointer with the starting address.

2. Load the total number of elements in a separate register as a counter.

3. Clear the accumulator.

4. Load the other register with the value of the memory pointer.

5. Add the register with the accumulator.

6. Check for carry, if exist, increment the carry register by 1. otherwise, continue

7. Decrement the counter and if it reaches 0, stop. Otherwise increment the memory pointer by 1 and go to step 4.

RESULT:

The sum of elements in an array is calculated.

PROGRAM:

MOV DPTR, #4200

MOVX A, @DPTR

MOV R0, A

MOV B, #00

MOV R1, B

INC DPTR

LOOP2: CLR C

MOVX A, @DPTR

ADD A, B

MOV B, A

JNC LOOP

INC R1

LOOP: INC DPTR

DJNZ R0, LOOP2

MOV DPTR, #4500

MOV A, R1

MOVX @DPTR, A

INC DPTR

MOV A, B

MOVX @DPTR, A

HLT: SJMP HLT

INPUT OUTPUT:

4200 04 4500 0F

4201 05 4501 00

4201 06

4202 03

4203 02

10(A).8051 - HEXADECIMAL TO DECIMAL CONVERSION

AIM:

To perform hexadecimal to decimal conversion.

ALGORITHM:

1. Load the number to be converted into the accumulator.

2. If the number is less than 100 (64H), go to next step; otherwise, subtract 100 (64H) repeatedly until the remainder is less than 100 (64H). Have the count(100’s value) in separate register which is the carry.

3. If the number is less than 10 (0AH), go to next step; otherwise, subtract 10 (0AH) repeatedly until the remainder is less than 10 (0AH). Have the count(ten’s value) in separate register.

4. The accumulator now has the units.

5. Multiply the ten’s value by 10 and add it with the units.

6. Store the result and carry in the specified memory location.

RESULT

The given hexadecimal number is converted into decimal number.

PROGRAM:

MOV DPTR, #4500

MOVX A, @DPTR

MOV B, #64

DIV A, B

MOV DPTR, #4501

MOVX @DPTR, A

MOV A, B

MOV B, #0A

DIV A, B

INC DPTR

MOVX @DPTR, A

INC DPTR

MOV A, B

MOVX @DPTR, A

HLT: SJMP HLT

INPUT OUTPUT:

4500 D7 4501 15

4502 02

10(B).8051 - DECIMAL TO HEXADECIMAL CONVERSION

AIM:

To perform decimal to hexadecimal conversion

ALGORITHM:

1. Load the number to be converted in the accumulator.

2. Separate the higher order digit from lower order.

3. Multiply the higher order digit by 10 and add it with the lower order digit.

4. Store the result in the specified memory location.

RESULT:

The given decimal number is converted to hexadecimal number.

PROGRAM:

MOV DPTR, #4500

MOVX A, @DPTR

MOV B, #0A

MUL A, B

MOV B, A

INC DPTR

MOVX A, @DPTR

ADD A, B

INC DPTR

MOVX @DPTR, A

HLT: SJMP HLT

INPUT OUTPUT

4500 23 4501 17

13. STEPPER MOTOR INTERFACING WITH 8051

AIM:

To interface a stepper motor with 8051 microcontroller and operate it.

THEORY:

A motor in which the rotor is able to assume only discrete stationary angular position is a stepper motor. The rotary motion occurs in a step-wise manner from one equilibrium position to the next. Stepper Motors are used very wisely in position control systems like printers, disk drives, process control machine tools, etc.

The basic two-phase stepper motor consists of two pairs of stator poles. Each of the four poles has its own winding. The excitation of any one winding generates a North Pole. A South Pole gets induced at the diametrically opposite side. The rotor magnetic system has two end faces. It is a permanent magnet with one face as South Pole and the other as North Pole.

The Stepper Motor windings A1, A2, B1, B2 are cyclically excited with a DC current to run the motor in clockwise direction. By reversing the phase sequence as A1, B2, A2, B1, anticlockwise stepping can be obtained.

2-PHASE SWITCHING SCHEME:

In this scheme, any two adjacent stator windings are energized. The switching scheme is shown in the table given below. This scheme produces more torque.

ANTICLOCKWISE						CLOCKWISE
STEP	A1	A2	B1	B2	DATA	STEP	A1	A2	B1	B2	DATA
1	1	0	0	1	9h	1	1	0	1	0	Ah
2	0	1	0	1	5h	2	0	1	1	0	6h
3	0	1	1	0	6h	3	0	1	0	1	5h
4	1	0	1	0	Ah	4	1	0	0	1	9h

ADDRESS DECODING LOGIC:

The 74138 chip is used for generating the address decoding logic to generate the device select pulses, CS1 & CS2 for selecting the IC 74175.The 74175 latches the data bus to the stepper motor driving circuitry.

Stepper Motor requires logic signals of relatively high power. Therefore, the interface circuitry that generates the driving pulses use silicon darlington pair transistors. The inputs for the interface circuit are TTL pulses generated under software control using the Microcontroller Kit. The TTL levels of pulse sequence from the data bus is translated to high voltage output pulses using a buffer 7407 with open collector.

PROGRAM :

Address	OPCODES	Label			Comments
			ORG	4100h
4100		START:	MOV	DPTR, #TABLE	Load the start address of switching scheme data TABLE into Data Pointer (DPTR)
4103			MOV	R0, #04	Load the count in R0
4105		LOOP:	MOVX	A, @DPTR	Load the number in TABLE into A
4106			PUSH	DPH	Push DPTR value to Stack
4108			PUSH	DPL	Push DPTR value to Stack
410A			MOV	DPTR, #0FFC0h	Load the Motor port address into DPTR
410D			MOVX	@DPTR, A	Send the value in A to stepper Motor port address
410E			MOV	R4, #0FFh	Delay loop to cause a specific amount of time delay before next data item is sent to the Motor
4110		DELAY:	MOV	R5, #0FFh
4112		DELAY1:	DJNZ	R5, DELAY1
4114			DJNZ	R4, DELAY
4116			POP	DPL	POP back DPTR value from Stack
4118			POP	DPH	POP back DPTR value from Stack
411A			INC	DPTR	Increment DPTR to point to next item in the table
411B			DJNZ	R0, LOOP	Decrement R0, if not zero repeat the loop
411D			SJMP	START	Short jump to Start of the program to make the motor rotate continuously
411F		TABLE:	DB	09 05 06 0Ah	Values as per two-phase switching scheme

PROCEDURE:

Enter the above program starting from location 4100.and execute the same. The stepper motor rotates. Varying the count at R4 and R5 can vary the speed. Entering the data in the look-up TABLE in the reverse order can vary direction of rotation.

RESULT:

Thus a stepper motor was interfaced with 8051 and run in forward and reverse directions at various speeds.

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Interfacing 8253 Programmable Interval Timer with 8085 mp

THEORY:

ANTICLOCKWISE

CLOCKWISE

PROGRAM :