Engineering Conceptzzzzz

EC2252 Communication Theory ANNA UNIVERSITY PREVIOUS YEAR QUESTION PAPER, IMPORTANT QUESTIONS, 2 MARKS AND 16 MARKS QUESTIONS FOR ECE DEPARTMENT

2012-06-08T09:24:00.003+05:30

B.E./B.Tech.Degree Examinations,Apr/May 2010

Regulations 2008

Fourth Semester

Electronics and Communication Engineering

EC2252 Communication Theory

Time: Three Hours Maximum: 100 Marks

Answer ALL Questions

Part A - (10 x 2 = 20 Marks)

1. How many AM broadcast stations can be accommodated in a 100 kHz bandwidth
if the highest frequency modulating a carrier i s 5 kHz?
2. What are the causes of linear distortion?
3. Draw the block diagram of a method for generating a narrowband FM signal.
4. A carrier wave of frequency 100 MHz i s frequency modulated by a signal
20 sin(200¼ £ 103t):
What is bandwidth of FM signal if the frequency sensitivity of the modulation i s
25kHz=V .
5. When i s a random process called deterministic?
6. A receiver connected to an antenna of resistance of 50 has an equivalent noise
resistance of 30. Find the receiver noise ¯gure.
7. What are the characteristics of superheterodyne receivers?
8. What are the methods to improve FM threshold reduction?
9. De¯ne entropy function.
10. De¯ne Rate Bandwidth and Bandwidth e±ciency.

Part B - (5 x 16 = 80 Marks)

11. (a) (i) Draw an envelope detector circuit used for demodulation of AM and ex-
plain its operation. (10)
(ii) How SSB can be generated using Weaver's method? Illustrate with a neat
block diagram. (6)
OR
11. (b) (i) Discuss in detail about frequency translation and frequency division mul-
tiplexing technique with diagrams. (10)
(ii) Compare Amplitude Modulation and Frequency Modulation.
(6)
12. (a) (i) Using suitable Mathematical analysis show that FM modulation produces
in¯nite sideband. Also deduce an expression for the frequency modulated
output and its frequency spectrum. (10)
(ii) How can you generate an FM from PM and PM from FM?
(6)
OR
12. (b) (i) A 20 MHz i s frequency modulated by a sinusoidal signal such that the
maximum frequency deviation is 100 kHz. Determine the modulation index
and approximate bandwidth of the FM signal for the following modulating
signal frequencies,
(1) 1 kHz (2) 100 kHz and (3) 500 kHz. (8)
(ii) Derive the time domain expressions of FM and PM signals.
(8)
13. (a) (i) Give a random process, X(t) = Acos(!t+µ), where A and ! are constants
and µ is a uniform random variable. Show that X(t) is ergodic in both
mean and autocorrelation. (8)
(ii) Write a short note on shot noise and also explain about power spectral
density of shot noise. (8)
OR
13. (b) Write the details about narrow band noise and the properties of quadrature
components of narrowband noise. (16)
14. (a) Derive an expression for SNR at input (SNRc) and output of (SNRo) of a
coherent detector. (16)
OR
14. (b) (i) Explain pre-emphasis and De-emphasis in detail. (10)
(ii) Compare the performances of AM and FM systems. (6)
15. (a) (i) Find the code words for ¯ve symbols of the alphabet of a discrete memory-
less source with probability f0.4, 0.2, 0.2, 0.1, 0.1g, using Hu®man coding
and determine the source entropy and average code word length. (10)
(ii) Discuss the source coding theorem. (6)
OR
15. (b) (i) Derive the channel capacity of a continuous band limited white Gaussian
noise channel. (10)
(ii) Discuss about rate distortion theory. (6)

EC2252 Communication Theory nov/dec 2010 ANNA UNIVERSITY PREVIOUS YEAR QUESTION PAPER, IMPORTANT QUESTIONS, 2 MARKS AND 16 MARKS QUESTIONS FOR ECE DEPARTMENT

2012-06-08T09:23:00.001+05:30

B.E./B.Tech.Degree Examinations, November/December 2010

Regulations 2008

Fourth Semester

Electronics and Communication Engineering (ECE)

EC2252 Communication Theory

( Common to PTEC 2252 Communication Theory for B.E.(Part -Time)

Third Semester ECE - Regulations 2009)

Time: Three Hours Maximum: 100 Marks

Answer ALL Questions

Part A - (10 x 2 = 20 Marks)

1. How many AM broadcast stations can be accommodated in a 100 kHz bandwidth
if the highest frequency modulating a carrier i s 5 kHz?
2. State the applications of FDM.
3. Illustrate the relationship between FM and PM, with block diagrams.
4. Compare the transmission bandwidth required for Narrowband FM and Wide band
FM.
5. De¯ne a random variable. Specify the sample space and the random variable for a
coin tossing experiment.
6. What i s white noise? Give its characteristics.
7. De¯ne threshold e®ect in AM receiver.
8. De¯ne pre-emphasis and de-emphasis.
9. A source generates 3 messages with probability 0.5, 0.25, 0.25. Calculate source
entropy.
10. De¯ne Rate Bandwidth and Bandwidth effciency.

Part B - (5 x 16 = 80 Marks)

11. (a) (i) With the help of a neat diagram, explain the generation of DSB-SC using

Balanced modulator. (8)
(ii) Write about the coherent detection method in detail for DSB-SC and SSB-
SC. What happens when there i s phase mismatch? (8)
OR
11. (b) (i) Explain the concept of Frequency Translation. (4)
(ii) With aid of block diagram explain the principle of FDM. (8)
(iii) Illustrate the formation of Basic group and super group. (4)
12. (a) (i) De¯ne frequency modulation. Draw the FM waveform. Derive an expres-
sion for single tone frequency modulation.
(2 + 2 + 6)
(ii) Compare Narrowband and Wideband FM. (6)
OR
12. (b) (i) A 20 MHz i s frequency modulated by a sinusoidal signal such that the max-
imum frequency deviation i s 100 kHz. Determine the modulation index
and approximate bandwidth of the FM signal for the following modulating
signal frequencies,
(1) 1 kHz (2) 100 kHz and (3) 500 kHz. (8)
(ii) Derive the time domain expressions of FM and PM signals.
(8)
13. (a) (i) List the di®erent types of random process and give the de¯nitions. (10)
(ii) Write short notes on shot noise. (6)
OR
13. (b) (i) A mixer stage has a noise ¯gure of 20 dB and this i s preceded by an
ampli¯er that has a noise ¯gure of 9 dB and an available power gain of 15
dB. Calculate the overall noise ¯gure referred to the input. (8)
(ii) A receiver has a noise ¯gure of 12 dB and it is fed by a low noise ampli¯er
that has a gain of 50 dB and a noise temperature of 90 K. Calculate the
noise temperature of the receiver and the overall noise temperature of the
receiving system. Take room temperature as 290 K. (8)
14. (a) Derive the expression for ¯gure of merit of a AM receiver using envelope de-
tection. What do you infer from the expression? (16)
OR
14. (b) De¯ne and explain FM Threshold e®ect. With suitable diagram, explain
threshold reduction by FMFB demodulator. (16)
15. (a) (i) An Analog signal i s band limited to `B' Hz and sampled at Nyquist rate.
The sampled signals are quantized into 4 levels. Each level represents
one message. The probability of occurrence of the four messages are
p1=p3=1/8; p2=p4=3/8. Find out information rate of the source. (6)
(ii) Five source messages are probable to appear as m1 = 0:4, m2 = 0:15,
m3 = 0:15, m4 = 0:15, m5 = 0:15. Find coding e±ciency for (1) Shanon-
Fano coding, (2) Hu®man coding.
(10)
OR
15. (b) (i) Derive the channel capacity for Binary Symmetric channel.
(6)
(ii) Derive the channel capacity for band limited, power limited Gaussian
Channel. (10)

EC2251 ELECTRONIC CIRCUITS – II ANNA UNIVERSITY PREVIOUS YEAR QUESTION PAPER, IMPORTANT QUESTIONS, 2 MARKS AND 16 MARKS QUESTIONS FOR ECE DEPARTMENT

2012-06-08T09:20:00.000+05:30

B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2010

Fourth Semester

Electronics and Communication Engineering

EC2251 — ELECTRONIC CIRCUITS – II

(Regulation 2008)

Time: Three hours Maximum: 100 Marks

Answer ALL Questions

PART A — (10 × 2 = 20 Marks)

1. What is the impact of negative feedback on noise in circuits?
2. Define sensitivity and desensitivity of gain in feedback amplifiers.
3. Mention two essential conditions for a circuit to maintain oscillations.
4. In a RC phase shift oscillator, if = = = K R R R 200 3 2 1 and
pF C C C 100 3 2 1 = = = , find the frequency of the oscillator.
5. Define tuned amplifier.
6. Define the term unloaded Q factor.
7. Give two applications of bistable multivibrator.
8. A 20 KHz, 75% duty cycle square wave is used to trigger continuously, a
monostable multivibrator with a triggered pulse duration of s µ 5 . What will be
the duty cycle of the waveform at the output of the monostable multivibrator?
9. Mention any two applications of blocking oscillator.
10. What is the function of time base circuit?

PART B — (5 × 16 = 80 Marks)

11. (a) (i) Explain how negative feedback acts on bandwidth, distortion, Input
Impedance and Output Impedance of a circuit. (8)
(ii) An amplifier has a mid-frequency gain of 100 and a bandwidth
of 200 KHz.
(1) What will be the new bandwidth and gain, if 5% negative
feedback is introduced?
(2) What should be the amount of feedback, if the bandwidth is to
be restricted to 1 MHz? (8)
Or
(b) (i) Explain voltage series and voltage shunt feedback connections. (8)
(ii) Explain Nyquist criterion to analyse the stability of feedback
amplifiers. (8)
12. (a) (i) Explain Armstrong oscillator and derive its frequency of oscillation.
(8)
(ii) A Colpitts oscillator is designed with pF C 100 1 = and
pF C 7500 2 = . The inductance is variable. Determine the range of
inductance values, if the frequency of oscillation is to vary between
950 KHz and 2050 KHz. (8)
Or
(b) (i) Explain Wien bridge oscillator and derive its frequency of
oscillation. (10)
(ii) Write a note on frequency stability of oscillators. (6)
13. (a) (i) Discuss about double tuned voltage amplifier. (8)
(ii) Discuss the effect of bandwidth on cascading single tuned
amplifiers. (8)
Or
(b) (i) Explain class ‘C’ tuned amplifier and derive its efficiency. (10)
(ii) Explain Hazeltine Neutralization Method. (6)
14. (a) (i) Sketch and define transistor switching times. (8)
(ii) What is a clipper? Explain the operation of positive and negative
diode clippers with waveforms. (8)
Or
(b) (i) Explain astable multivibrator with neat sketch of waveforms at
collector and base of transistors used in the circuit. (10)
(ii) Determine the value of capacitors to be used in an astable
multivibrator to provide a train of pulse s µ 2 wide at a repetition
rate of 100 KHz if = = k R R 20 2 1 . (6)
15. (a) (i) Explain about astable blocking oscillator with base timing. (10)
(ii) The diode controlled astable blocking oscillator has the parameters
10 = CC V V, V VB 5 . 0 = , 2 = n , = K R 5 . 1 , =10 f R , V Vr 9 = ,
mH L 3 = and pF C 100 = . Calculate the frequency of oscillation and
duty cycle. (6)
Or
(b) Write about Miller Integrator and Current-Time Base Circuit with
waveform. (16)

ADVANCED COMPUTER ARCHITECTURE CS2354 NOVEMBER/DECEMBER 2011 ANNA UNIVERSITY QUESTION PAPER | CS2354 ACA PREVIOUS YEAR QUESTION PAPER

2012-06-08T09:07:00.003+05:30

B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2011.

Sixth Semester

Computer Science and Engineering

CS 2354 — ADVANCED COMPUTER ARCHITECTURE

(Regulation 2008)

Time : Three hours Maximum : 100 marks

Answer ALL questions.

PART A — (10 × 2 = 20 marks)

1. What is instruction level parallelism?
2. What are the advantages of loop unrolling?
3. What are the limitations of VLIW?
4. What is the use of branch-target buffer?
5. Distinguish between shared memory multiprocessor and message-passing multiprocessor.
6. Differentiate multithreading computers from multiprocessor systems
7. Define the terms cache miss and cache hit.
8. What is RAID?
9. What is a multi-core processor?
10. What is a cell processor?

PART B — (5 × 16 = 80 marks)

11. (a) (i) Explain the data and name dependencies with suitable example. (10)
(ii) Discuss about the benefits and limitations of static branch prediction and dynamic branch prediction (6)

(b) Briefly explain how to overcome data hazards with dynamic scheduling using Tomasula’s approach. (16)
12. (a) (i) Describe the architecture of Itanium processor with the help of a block diagram. (8)
(ii) Explain how ILP is achieved in EPIC processors (8)

(b) (i) Describe the architectural features of IA64 processor in detail.(8)
(ii) What are the advantages and disadvantages of software-based and hardware-based speculation mechanism? (8)
13. (a) (i) Briefly compare instruction level parallelism with thread-level parallelism. (8)
(ii) Explain the basic architecture of a distributed memory multiprocessor system. (8)
Or
(b) (i) Explain various memory consistency models in detail. (10)
(ii) What is multithreading and what are the advantages of multithreading? (6)
14. (a) What is meant by cache coherence problem? Describe various protocols for cache coherence. (16)

(b) Briefly explain various I/O performance measures. (16)
15. (a) (i) Describe the architecture of typical CMT processor. (8)
(ii) Discuss the design issues for simultaneous multithreading. (8)

(b) (i) Explain the architectural features of IBM cell processor in detail. (10)
(ii) Briefly compare SMT and CMP architectures. (6)

CS2354 ADVANCED COMPUTER ARCHITECTURE APRIL/MAY 2011 ANNA UNIVERSITY QUESTION PAPER QUESTION BANK IMPORTANT QUESTIONS 2 MARKS AND 16 MARKS

2012-06-08T09:06:00.001+05:30

B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2011

Sixth Semester

Computer Science and Engineering

CS 2354 — ADVANCED COMPUTER ARCHITECTURE

(Regulation 2008)

Time : Three hours Maximum : 100 marks

Answer ALL questions

PART A — (10 × 2 = 20 marks)

1. What is loop unrolling? and what are its advantages?
2. Differentiate between static and dynamic branch prediction approaches.
3. What is fine-grained multithreading and what is the advantage and
disadvantages of fine-grained multithreading?
4. What a VLIW processor?
5. What is sequential consistency?
6. State the advantages of threading.
7. Differentiate between write-through cache and snoopy cache.
8. Compare SDRAM with DRAM.
9. What is multi–core processor and what are the application areas of multi-core
processors?
10. What is a Cell Processor?
PART B — (5 × 16 = 80 marks)
11. (a) Briefly describe any techniques to reduce the control hazard stalls. (16)
Or
(b) (i) Discuss about any two compiler techniques for exposing ILP in
detail. (8)
(ii) Explain how ILP is achieved using dynamic scheduling. (8)
12. (a) (i) Describe the architectural features of IA 64 Processors in detail. (10)
(ii) Explain the architecture of a typical VLIW processor in detail. (6)
Or
(b) (i) Describe the architectural features of Itanium Processor. (10)
(ii) Explain how instruction level parallelism is achieved in EPIC
processor. (6)
13. (a) (i) Describe the basic structure of a centralized shared-memory
multiprocessor in detail. (6)
(ii) Describe the implementation of directory-based cache coherence
protocol. (10)
Or
(b) (i) What are the advantages and disadvantages of distributed-memory
Multiprocessors? Describe the basic structure of a distributedmemory
multiprocessor in detail. (8)
(ii) Describe sequential and relaxed consistency model. (8)
14. (a) (i) With suitable diagram, explain how virtual address is mapped to L2
cache address. (10)
(ii) Discuss about the steps to be followed in designing I/O system. (6)
Or
(b) Describe the optimizations techniques used in compilers to reduce cache
miss rate. (16)
15. (a) (i) Describe the features of SUN CMP architecture in detail. (6)
(ii) What are Multi Core processors? Explain how a multi core
processors works. (10)
Or
(b) (i) Discuss about the SMT kernel structure in detail. (8)
(ii) Describe the architecture of the IBM Cell Processor in detail. (8)

CS2354 Advanced Computer Architecture Anna university Question paper for ME(Master of engineering)

2012-06-08T09:05:00.000+05:30

M.E/M.Tech DEGREE EXAMINATION, JUNE 2010

First Semester

Computer Science and Engineering

CS9211 – COMPUTER ARCHITECTURE

(Common to M.Tech - Information Technology)

(Regulation 2009)

Time: Three hours Maximum: 100 Marks

Answer all the questions

Part A – (10*2=20 Marks)

1. State the principle of locality and its types.

2. What are the choices for encoding instruction set.

3. What is speculation? Give an example.

4. Mention the effects of imperfect alias analysis.

5. What is loop unrolling?

6. Give the uses of sentinel.

7. Define multiprocessor cache coherence.

8. What are the approaches used for multithreading?

9. Which block should be replaced on a cache Miss?

10. How is cache performance improved?

Part B – (5*16=80 Marks)

11. (a)(i)Explain the operations designed for media and signal processing. (10)

(ii)Explain the ways in which a computer architect can help the compiler writer. (6)

(Or)

(b)(i)Discuss the addressing modes used for signal processing instructions. (7)

(ii)Describe the addressing modes and instructions designed for control flow. (9)

12. (a)Explain the techniques to overcome data hazards with dynamic scheduling. (16)

(Or)

(b)Describe the limitations of Instruction level Parallelism. (16)

13. (a)(i)Explain the basic VLIW approach used for static multiple issues. (8)

(ii)Enumerate the crosscutting issues in hardware and s/w speculation mechanisms. (8)

(Or)

(b)(i)Explain the hardware support for exposing more parallelism at compile time. (8)

(ii)Describe the basic compiler techniques for exposing ILP. (8)

14. (a)(i)Describe the design challenges in SMT processors. (8)

(ii)Discuss the performance of shared memory multiprocessors. (8)

(Or)

(b)(i)Explain synchronization mechanisms designed for large scale multiprocessors. (9)

(ii)Discuss the details of memory consistency models. (7)

15. (a)(i)Explain the concept of miss penalty and out of order execution in processors. (6)

(ii)Discuss the methods of interface between CPU and memory. (10)

(Or)

(b)Discuss in detail the different levels of RAID. (16)

CS2354 Advanced Computer Architecture Anna university Model Question Paper

2012-06-08T09:04:00.001+05:30

M.E/M.Tech DEGREE EXAMINATION, JANUARY 2010

First Semester

Computer Science and Engineering

CS9211 – COMPUTER ARCHITECTURE

(Common to M.Tech - Information Technology)

(Regulation 2009)

Time: Three hours Maximum: 100 Marks

Answer all the questions

Part A – (10*2=20 Marks)

1. What is hazard? State its types.

2. Mention the techniques available to measure the performance.

3. What is dynamic scheduling?

4. Give the limitation of ILP.

5. Distinguish between hardware and software speculation mechanisms.

6. What is static branch prediction?

7. What are the synchronization issues?

8. What is multithreading?

9. Define cache miss penalty?

10. What is RAID?

Part B – (5*16 = 80 Marks)

11. (a)How does one classify ISA? Discuss their design issues. (16)

(Or)

(b)What is pipelining? Explain various hazards involved in implementing pipelining. (16)

12. (a)Explain the instruction level parallelism with dynamic approaches. (16)

(Or)

(b)What is dynamic hardware prediction? Explain it in detail. (16)

13. (a)Explain the different hardware support for exposing ILP. (16)

(Or)

(b)Explain the different hardware support for more parallelism. (16)

14. (a)Explain distributed shared memory architecture with necessary life cycle diagram. (16)

(Or)

(b)(i)Differentiate software and hardware multithreading approaches. (8)

(ii)Explain the models of memory consistency. (8)

15. (a)How does one reduce cache miss penalty and miss rate? Explain. (16)

(Or)

(b)What are the ways available to measure the I/O performance? Explain each of them in detail. (16)

CS2353 OBJECT ORIENTED ANALYSIS AND DESIGN APRIL/MAY 2011 ANNA UNIVERSITY QUESTION PAPER QUESTION BANK IMPORTANT QUESTIONS 2 MARKS AND 16 MARKS

2012-06-08T09:01:00.003+05:30

B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2011

Sixth Semester

Computer Science and Engineering

CS 2353 — OBJECT ORIENTED ANALYSIS AND DESIGN

(Common to Information Technology)

(Regulation 2008)

Time : Three hours Maximum : 100 marks

Answer ALL questions

PART A — (10 × 2 = 20 marks)

1. What is Object Oriented Analysis and Design?
2. Define the inception step.
3. What is a Domain Model?
4. Define Aggregation and Composition.
5. What is the use of System sequence diagram?
6. List the relationships used in class diagram.
7. What is Design Pattern?
8. Define Coupling.
9. What is the use of operation contracts?
10. Give the meaning of Event, State and transition.

PART B — (5 × 16 = 80 marks)

11. (a) Briefly explain the different phases of Unified Process.
Or
(b) Explain with an example, how usecase modeling is used to describe
functional requirements. Identify the actors, scenario and use cases for
the example.
12. (a) Describe the strategies used to identify conceptual classes. Describe the
steps to create a domain model used for representing conceptual classes.
Or
(b) Explain about activity diagram with an example.
13. (a) Illustrate with an example, the relationship between sequence diagram
and use cases.
Or
(b) Explain with an example Interaction diagram.
14. (a) Explain about GRASP Patterns.
Or
(b) Write short notes on adapter, singleton, factory and observer patterns.
15. (a) Explain about implementation model (mapping design to code).
Or
(b) Discuss about UML deployment and component diagrams. Draw the
diagrams for a banking application.

OBJECT ORIENTED ANALYSIS AND DESIGN CS2353 ANNA UNIVERSITY NOVEMBER/DECEMBER 2011 QUESTION PAPER | OOAD CS 2353 PREVIOUS YEAR MODEL QUESTION PAPER

2012-06-08T08:59:00.003+05:30

B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2011.

Sixth Semester

Computer Science and Engineering

CS 2353 — OBJECT ORIENTED ANALYSIS AND DESIGN

(Common to Information Technology)

(Regulation 2008)

Time : Three hours Maximum : 100 marks

Answer ALL questions.

PART A — (10 × 2 = 20 marks)

1. List out any four reasons for the complexity of software.
2. What do you mean by use cases and actors?
3. Give the hint to identify the attributes of a class.
4. Define swim lane.
5. What do you mean by sequence diagram? Mention its use.
6. What do you mean by sequence number in UML? Where and for what it is
used?
7. Distinguish between coupling and cohesion.
8. Write a note on Patterns.
9. Define component with an example.
10. How will you reflect the version control information in UML diagram?

PART B — (5 × 16 = 80 marks)

11. (a) What do you mean by Unified Process in OOAD? Explain the phases with suitable diagrams. (16)

(b) By considering the Library Management system, perform the Object Oriented System Development and give the use case model for the same (use include, extend and generalization). (16)
12. (a) Explain the relationships that are possible among the classes in the UML representation with your own example. (16)

(b) Explain the following with an example :
(i) Conceptual class diagram
(ii) Activity Diagram. (8 + 8)
13. (a) With a suitable example explain how to design a class. Give all possible representation in a class (name, attribute, visibility, methods, responsibilities). (16)

(b) What do you mean by interaction diagrams? Explain them with a suitable example. (16)
14. (a) What is GRASP? Explain the design patterns and the principles used in it. (16)
Or
(b) What is design pattern? Explain the GoF design patterns. (16)
15. (a) Explain the state chart diagram with a suitable example. Also define its components and use. (16)

(b) Consider the Hospital Management System application with the following requirements
(i) System should handle the in-patient, out-patient information through receptionist.
(ii) Doctors are allowed to view the patient history and give their prescription.
(iii) There should be a information system to provide the required information.
Give the state chart, component and deployment diagrams.(6 + 6 + 4)

CS-2352 PRINCIPLES OF COMPILER DESIGN APRIL/MAY 2011 ANNA UNIVERSITY QUESTION PAPER QUESTION BANK IMPORTANT QUESTIONS 2 MARKS AND 16 MARKS

2012-06-05T09:36:00.003+05:30

B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2011

Sixth Semester

Computer Science and Engineering

CS 2352 — PRINCIPLES OF COMPILER DESIGN

(Regulation 2008)

Time : Three hours Maximum : 100 marks

Answer ALL questions

PART A — (10 × 2 = 20 marks)

1. What is an interpreter?

2. Define token and lexeme.
3. What is handle pruning?
4. What are the limitations of static allocation?
5. List out the benefits of using machine-independent intermediate forms.
6. What is a syntax tree? Draw the syntax tree for the following statement:
. : c b c b a − ∗ + − ∗ =
7. List out the primary structure preserving transformations on basic block.
8. What is the purpose of next-use information?
9. Define dead-code elimination.
10. What is loop optimization?

PART B — (5 × 16 = 80 marks)

11. (a) (i) Describe the various phases of complier and trace the program
segment 4 : ∗ + = c b a for all phases. (10)
(ii) Explain in detail about compiler construction tools. (6)
Or
(b) (i) Discuss the role of lexical analyzer in detail. (8)
(ii) Draw the transition diagram for relational operators and unsigned
numbers in Pascal. (8)
12. (a) (i) Explain the error recovery strategies in syntax analysis. (6)
(ii) Construct a SLR construction table for the following grammar.
T E E + →
T E →
F T T ∗ →
F T →
( ) E F →
id F → (10)
Or
(b) (i) Distinguish between the source text of a procedure and its
activation at run time. (8)
(ii) Discuss the various storage allocation strategies in detail. (8)
13. (a) (i) Define three-address code. Describe the various methods of
implementing three-address statements with an example. (8)
(ii) Give the translation scheme for converting the assignments into
three address code. (8)
Or
(b) (i) Discuss the various methods for translating Boolean expression. (8)
(ii) Explain the process of generating the code for a Boolean expression
in a single pass using back patching. (8)
132 132 132
11267 3
14. (a) (i) Write in detail about the issues in the design of a code generator.
(10)
(ii) Define basic block. Write an algorithm to partition a sequence of
three-address statements into basic blocks. (6)
Or
(b) (i) How to generate a code for a basic block from its dag
representation? Explain. (6)
(ii) Briefly explain about simple code generator. (10)
15. (a) (i) Write in detail about function-preserving transformations. (8)
(ii) Discuss briefly about Peephole Optimization. (8)
Or
(b) (i) Write an algorithm to construct the natural loop of a back edge. (6)
(ii) Explain in detail about code-improving transformations. (10)

CS 1351 – ARTIFICIAL INTELLIGENCE ANNA UNIVERSITY PREVIOUS YEAR QUESTION PAPER

2012-06-05T09:34:00.003+05:30

B.E/B.TECH DEGREE EXAMINATION, MAY/JUNE 2009

Sixth semester

(Regulation 2004)

Computer science and engineering

CS 1351 – ARTIFICIAL INTELLIGENCE

(Common to B.E (part –time) fifth semester regulation 2005)

Time: three hours maximum: 100 marks

Answer ALL questions

PART A- (10 x 2 = 20 marks)

1. Define ideal rational agent

2. Define a data type to represent problems and nodes.

3. How does one characterize the quality of heuristic?

4. Formally define game as a kind of search problems.

5. Joe, tom and Sam are brothers-represent using first order logic symbols.

6. List the canonical forms of resolution.

7. What is Q-learning?

8. List the issues that affect the design of a learning element.

9. Give the semantic representation of “john loves Mary”.

10. Define DCG.

PART B – (5 x 16 = 80 marks)

11. (a) explain uninformed search strategies.(16)

(Or)

(b) How searching is used to provide solutions and also describe some real world problems? (16)
12. (a) describe alpha-beta pruning and its effectiveness.(16)

(Or)

(b) Write in detail about any two informed search strategies. (16)

13. (a) elaborate forward and backward chaining.(16)

(Or)

(b) Discuss the general purpose ontology with the following elements:

(i) Categories (4)

(ii) Measures (4)

(iii) Composite objects (4)

(iv) Mental events and mental objects.(4)

14. (a) explain with an example learning in decision trees.(16)

(Or)

(b) Describe multilayer feed-forward networks. (16)

15.(a) (i) list the component steps of communication.(8)

(ii) Write short notes about ambiguity and disambiguation.(8)

(Or)

(b) Discuss in detail the syntactic analysis (PARSING). (16)

CS2351 ARTIFICIAL INTELLIGENCE APRIL/MAY 2011 ANNA UNIVERSITY QUESTION PAPER QUESTION BANK IMPORTANT QUESTIONS 2 MARKS AND 16 MARKS

2012-06-05T09:33:00.003+05:30

B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2011

Sixth Semester

Computer Science and Engineering

CS 2351 — ARTIFICIAL INTELLIGENCE

(Regulation 2008)

Time : Three hours Maximum : 100 marks

Answer ALL questions

PART A — (10 × 2 = 20 marks)

1. List down the characteristics of intelligent agent.
2. What do you mean by local maxima with respect to search technique?
3. What factors determine the selection of forward or backward reasoning
approach for an AI problem?
4. What are the limitations in using propositional logic to represent the
knowledge base?
5. Define partial order planner.
6. What are the differences and similarities between problem solving and
planning?
7. List down two applications of temporal probabilistic models.
8. Define Dempster-Shafer theory.
9. Explain the concept of learning from example.
10. How statistical learning method differs from reinforcement learning method?

PART B — (5 × 16 = 80 marks)

11. (a) Explain in detail on the characteristics and applications of learning
agents.
Or
(b) Explain AO* algorithm with an example.
12. (a) Explain unification algorithm used for reasoning under predicate logic
with an example.
Or
(b) Describe in detail the steps involved in the knowledge Engineering
process.
13. (a) Explain the concept of planning with state space search using suitable
examples.
Or
(b) Explain the use of planning graphs in providing better heuristic
estimates with suitable examples.
14. (a) Explain the method of handling approximate inference in Bayesian
Networks.
Or
(b) Explain the use of Hidden Markov Models in Speech Recognition.
15. (a) Explain the concept of learning using decision trees and neural network
approach.
Or
(b) Write short notes on :
(i) Statistical learning. (8)
(ii) Explanation based learning. (8)

CS2255 DATABASE MANAGEMENT SYSTEMS NOVEMBER/DECEMBER 2010 ANNA UNIVERSITY QUESTION PAPER QUESTION BANK IMPORTANT QUESTIONS 2 MARKS AND 16 MARKS

2012-06-04T16:34:00.002+05:30

B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2010

Fourth Semester

Computer Science and Engineering

CS 2255 — DATABASE MANAGEMENT SYSTEMS

(Common to Information Technology)

(Regulation 2008)

Time : Three hours Maximum : 100 Marks

Answer ALL questions

PART A — (10 × 2 = 20 Marks)

1. Define the two levels of data independence.

2. Write down any two major responsibilities of a database administrator.
3. List out the various relational algebra operators.
4. What are the four broad categories of constraints?
5. Define irreducible sets of dependencies.
6. Define the third normal form.
7. What are ACID properties?
8. What are the three kinds of intent locks?
9. Which are the factors to be considered for the evaluation of indexing and
hashing techniques?
10. What is the drawback of flash memory?

PART B — (5 × 16 = 80 Marks)

11. (a) Explain the three different groups of data models with examples. (16)
Or
(b) Describe the components of entity-relationship diagram with suitable
examples. (16)
12. (a) Describe the features of Embedded SQL and Dynamic SQL. Give suitable
examples. (16)
Or
(b) Write short notes on the following :
(i) Mandatory access control. (9)
(ii) Missing information. (7)
13. (a) Explain non loss decomposition and functional dependencies with
suitable example. (16)
Or
(b) Discuss Join Dependencies and Fifth Normal Form, and explain why
5NF? (16)
14. (a) (i) State the Two-Phase Commit protocol. Discuss the implications of a
failure of the coordinator and some participants. (10)
(ii) Briefly explain transaction recovery with primitive operations. (6)
Or
(b) (i) State and explain the three concurrency problems. (9)
(ii) What is meant by isolation level and define the five different
isolation levels. (7)
15. (a) (i) Discuss the improvement of reliability and performance of RAID (8)
(ii) Explain the structure of a B+-tree. (8)
Or
(b) Explain the complex selection predicates with example. (16)

CS2255 DATABASE MANAGEMENT SYSTEMS APRIL/MAY 2011 ANNA UNIVERSITY QUESTION PAPER QUESTION BANK IMPORTANT QUESTIONS 2 MARKS AND 16 MARKS

2012-06-04T16:33:00.002+05:30

B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2011

Fourth Semester

Computer Science and Engineering

CS 2255 — DATABASE MANAGEMENT SYSTEMS

(Common to Information Technology)

(Regulation 2008)

Time : Three hours Maximum : 100 marks

Answer ALL questions

PART A — (10 × 2 = 20 marks)

1. Who is a DBA? What are the responsibilities of a DBA?
2. What is a data model? List the types of data models used.
3. What is embedded SQL? What are its advantages?
4. What is the difference between tuple relational calculus and domain relational
calculus?
5. What is meant by lossless-join decomposition?
6. A relation { } D C B A R , , , = has FD’s { } A D D C C AB F → → → = , , . Is R is
in 3NF?
7. What are the ACID properties?
8. What are two pitfalls (problems) of lock-based protocols?
9. What are the advantages and disadvantages of indexed sequential file?
10. What is database tuning?

PART B — (5 × 16 = 80 marks)

11. (a) (i) With a neat diagram, explain the structure of a DBMS. (9)
(ii) Draw an E-R diagram for a small marketing company database,
assuming your own data requirements. (7)
Or
(b) (i) Compare the features of file system with database system. (8)
(ii) Explain the differences between physical level, conceptual level and
view level of data abstraction. (4)
(iii) Mention any four major responsibilities of DBA. (4)
12. (a) (i) Consider the following relational database
employee (employee-name, street, city)
works ( employee-name, company-name, salary)
company (company-name, city)
manages (employee-name, manager-name)
Give an expression in SQL to express each of the following queries :
Find the names and cities of residence of all employees who work
for XYZ Bank. Find the names, street address, and cities of
residence of all employees who work for XYZ Bank and earn more
than Rs. 10,000 per annum.
Find the names of all employees in this database who live in the
same city as the company for which they work.
Find the names of all employees who live in the same city and on
the same street as do their managers. (4 × 3 = 12)
(ii) Define the term distributed database management system and
mention the issues to be considered in the design of the same. (4)
Or
(b) (i) What are the relational algebra operations supported in SQL?
Write the SQL statement for each operation. (12)
(ii) What is data integrity? Explain the types of integrity constraints.
(4)
13. (a) (i) Explain 1NF, 2NF, 3NF and BCNF with suitable example. (8)
(ii) Consider the universal relation { } I H G F E D C B A R , , , , , , , , =
and the set of functional dependencies
( ) { } { } { } { } { } F B E D A C B A F → → → = , , , , { , { } { } { } { }} , , , J I D H G F → → .
What is the key for R? Decompose R into 2NF, then 3NF relations.
(8)
Or
(b) What are the pitfalls in relational database design? With a suitable
example, explain the role of functional dependency in the process of
normalization. (16)
14. (a) (i) Explain about immediate update and deferred update recovery
techniques. (8)
(ii) Explain the concepts of serializability. (8)
Or
(b) (i) Explain Two-phase locking protocol. (8)
(ii) Describe about the deadlock prevention schemes. (8)
15. (a) (i) List the different levels in RAID technology and explain its
features. (12)
(ii) Describe the different methods of implementing variable length
records. (4)
Or
(b) (i) Explain the various indexing schemes used in database
environment. (12)
(ii) Let relations ( ) C B A r , , 1 and ( ) E D C r , , 2 have the following
properties : 1 r has 20,000 tuples, r2 has 45,000 tuples, 25 tuples of
r1 fit on one block, and 30 tuples of r2 fit on one block. Estimate the
number of block accesses required, using each of the following join
strategies for r1 r2 : (4)
(1) Nested-loop join with r1 as outer relation
(2) Block nested-loop join with r1 as outer relation
(3) Merge join if r1 and r2 are initially sorted
(4) Hash join (assuming that no overflow occurs).

CS2255 DATABASE MANAGEMENT SYSTEMS ANNA UNIVERSITY QUESTION PAPER QUESTION BANK IMPORTANT QUESTIONS 2 MARKS AND 16 MARKS

2012-06-04T16:32:00.001+05:30

B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2010

Fourth Semester

Computer Science and Engineering

CS2255 — DATABASE MANAGEMENT SYSTEMS

(Common to Information Technology)

(Regulation 2008)

Time: Three hours Maximum: 100 Marks

Answer ALL Questions

PART A — (10 × 2 = 20 Marks)

1. Explain the basic structure of a relational database with an example.
2. What are the functions of a DBA?
3. Give the usage of the rename operation with an example.
4. What do you mean by weak entity set?
5. What is normalization?
6. Write a note on functional dependencies.
7. What do you mean by a transaction?
8. Define the term ACID properties.
9. Describe flash memory.
10. List out the physical storage media.

PART B — (5 × 16 = 80 Marks)

11. (a) (i) Discuss the various disadvantages in the file system and explain
how it can be overcome by the database system. (6)
(ii) What are the different Data models present? Explain in detail. (10)
Or
(b) (i) Explain the Database system structure with a neat diagram. (10)
(ii) Construct an ER diagram for an employee payroll system. (6)
12. (a) (i) Explain the use of trigger with your own example. (8)
(ii) Discuss the terms Distributed databases and client/server
databases. (8)
Or
(b) (i) What is a view? How can it be created? Explain with an example. (7)
(ii) Discuss in detail the operators SELECT, PROJECT, UNION with
suitable examples. (9)
13. (a) Explain 1NF, 2NF and 3NF with an example. (16)
Or
(b) Explain the Boyce-Codd normal form with an example. Also state how it
differs from that of 3NF. (16)
14. (a) (i) How can you implement atomicity in transactions? Explain. (8)
(ii) Describe the concept of serilalizability with suitable example. (8)
Or
(b) How concurrency is performed? Explain the protocol that is used to
maintain the concurrency concept. (16)
15. (a) What is RAID? Explain it in detail. (16)
Or
(b) Mention the purpose of indexing. How this can be done by B+ tree?
Explain. (16)

DATABASE MANAGEMENT SYSTEMS CS2255 MODEL QUESTION PAPER | CS 2255 DBMS QUESTION PAPER NOVEMBER/DECEMBER 2011

2012-06-04T16:30:00.000+05:30

B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2011.

Fourth Semester

Computer Science and Engineering

CS 2255 — DATABASE MANAGEMENT SYSTEMS

(Common to Information Technology)

(Regulation 2008)

Time : Three hours Maximum : 100 marks

Answer ALL questions.

PART A — (10 × 2 = 20 marks)

1. What is a data model?
2. With an example explain what a derived attribute is?
3. Consider the following relation :
EMP (ENO, NAME, DATE_OF_BIRTH, SEX, DATE_OF_JOINING, BASIC_PAY, DEPT) Develop an SQL query that will find and display the average BASIC_PAY in each DEPT.
4. List the two types of embedded SQL SELECT statements.
5. Consider the following relation :
R (A, B, C, D, E)
The primary key of the relation is AB. The following functional
dependencies hold :
A →C
B →D
AB → E
Is the above relation in second normal form?
6. Consider the following relation : R(A, B, C, D)
The primary key of the relation is A. The following functional dependencies
hold :
A →B,C
B →D
Is the above relation in third normal form?
7. List the two commonly used Concurrency Control techniques.
8. List the SQL statements used for transaction control.
9. What are ordered indices?
10. Distinguish between sparse index and dense index.

PART B — (5 × 16 = 80 marks)

11. (a) (i) Construct an E-R diagram for a car-insurance company whose customers own one or more cars each. Each car has associated with it zero to any number of recorded accidents. State any assumptions you make. (6)
(ii) A university registrar’s office maintains data about the following entities :
(1) Courses, including number, title, credits, syllabus, and prerequisites;
(2) Course offerings, including course number, year,
semester, section number, instructor, timings, and classroom;
(3) Students, including student-id, name, and program; and
(4) Instructors, including identification number, name,
department, and title. Further, the enrollment of students in courses and grades awarded to students in each course they are enrolled for must be appropriately modeled. Construct an E-R diagram for the registrar’s office. Document all assumptions that you make about the mapping constraints. (10)

(b) (i) With a neat sketch discuss the three-schema architecture of a DBMS. (8)
(ii) What is aggregation in an ER model? Develop an ER diagram using aggregation that captures the following information :
Employees work for projects. An employee working for a particular project uses various machinery. Assume necessary attributes. State any assumptions you make. Also discuss about the ER diagram you have designed. (2 + 6)
12. (a) (i) Explain the distinctions among the terms primary key, candidate key, and super key. Give relevant examples. (6)
(ii) What is referential integrity? Give relevant example. (4)
(iii) Consider the following six relations for an Order-processing Database Application in a Company :
CUSTOMER (CUSTNO, CNAME, CITY)
ORDER (ORDERNO, ODATE, CUSTNO, ORD_AMT)
ORDER_ITEM (ORDERNO, ITEMNO, QTY)
ITEM (ITEMNO, ITEM_NAME, UNIT_PRICE)
SHIPMENT (ORDERNO, ITEMNO, WAREHOUSENO,
SHIP_DATE)
WAREHOUSE (WAREHOUSENO, CITY)
Here, ORD_AMT refers to total amount of an order; ODATE is the date the order was placed; SHIP_DATE is the date an order is shipped from the warehouse. Assume that an order can be shipped from several warehouses. Specify the foreign keys for
this schema, stating any assumptions you make. (6)

(b) With relevant examples discuss the various operations in Relational Algebra. (16)
13. (a) Define a functional dependency. List and discuss the six inference rules for functional dependencies. Give relevant examples. (16)
Or
(b) (i) Give a set of Functional dependencies for the relation schema R(A,B,C,D,E) with primary key AB under which R is in 2NF but not in 3NF. (5)
(ii) Prove that any relation schema with two attributes is in BCNF.(5)
(iii) Consider a relation R that has three attributes ABC. It is decomposed into relations R1 with attributes AB and R2 with attributes BC. State the definition of lossless-join decomposition with respect to this example. Answer this question concisely by
writing a relational algebra equation involving R, R1, and R2. (6)
14. (a) (i) Define a transaction. Then discuss the following with relevant examples : (8)
(1) A read only transaction
(2) A read write transaction
(3) An aborted transaction
(ii) With a neat sketch discuss the states a transaction can be in. (4)
(iii) Explain the distinction between the terms serial schedule and serializable schedule. Give relevant example. (4)

(b) (i) Discuss the ACID properties of a transaction. Give relevant example. (8)
(ii) Discuss two phase locking protocol. Give relevant example. (8)
15. (a) (i) When is it preferable to use a dense index rather than a sparse index? Explain your answer. (4)
(ii) Since indices speed query processing, why might they not be kept on several search keys? List as many reasons as possible.(6)
(iii) Explain the distinction between closed and open hashing. Discuss the relative merits of each technique in database applications. (6)

(b) Diagrammatically illustrate and discuss the steps involved in processing a query.(16)

CS2254 CS2411 OPERATING SYSTEMS ANNA UNIVERSITY QUESTION PAPER QUESTION BANK IMPORTANT QUESTIONS 2 MARKS AND 16 MARKS

2012-06-04T16:29:00.000+05:30

B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2010

Fourth Semester

Computer Science and Engineering

CS2254 — OPERATING SYSTEMS

(Common to Information Technology)

(Regulation 2008)

Time : Three hours Maximum : 100 Marks

Answer ALL Questions

PART A — (10 × 2 = 20 Marks)

1. Mention the objectives and functions of an operating system.
2. Define thread. Differentiate user threads from kernel threads.
3. What is a semaphore? State the two parameters.
4. What is deadlock? What are the schemes used in operating system to handle
deadlocks?
5. Differentiate a page from a segment.
6. What is meant by thrashing? Give an example.
7. Mention the objectives of file management system.
8. Differentiate the various file access methods.
9. What is the need for disk scheduling?
10. What does swap-space management mean?

PART B — (5 × 16 = 80 Marks)

11. (a) (i) Explain the operating system structure and its components. (8)
(ii) Explain briefly IPC in Linux. (8)
Or
(b) (i) Explain Process Control Block. (4)
(ii) Describe the differences among short-term, medium-term, and
long-term scheduling. (4)
(iii) Describe the Inter Process communication in client-server systems.
(8)
12. (a) (i) Distinguish between preemptive and non-preemptive scheduling.
Explain each type with an example. (8)
(ii) What is synchronization? Explain how semaphores can be used to
deal with n-process critical section problem. (8)
Or
(b) (i) Discuss the issues in multiprocessor and real-time scheduling. (8)
(ii) Explain Banker’s deadlock-avoidance algorithm with an
illustration. (8)
13. (a) (i) Discuss how memory is allocated in variable partition
multiprogramming. (6)
(ii) Explain memory management in Linux. (10)
Or
(b) (i) Discuss segmentation in detail. Compare it with paging. (8)
(ii) Explain FIFO, LRU and Second-chance page replacement
algorithms with an example reference string. (8)
14. (a) (i) Explain linked file allocation method. (6)
(ii) Describe Windows XP file system in detail. (10)
Or
(b) (i) What is the role of Access matrix for protection? Explain. (5)
(ii) What is meant by free space management? Explain. (5)
(iii) Explain the directory structure of Linux operating system. (6)
15. (a) (i) Explain the services provided by a kernel I/O subsystem. (8)
(ii) Explain and compare the C-LOOK and C-SCAN disk scheduling
algorithms. (8)
Or
(b) (i) Write an elaborate note on RAID. (6)
(ii) Explain in detail the salient features of Linux I/O. (10)

CA5155 OPERATING SYSTEMS anna university previous year question paper

2012-06-04T16:27:00.003+05:30

B.E./B.Tech. degree examination ,november/december 2009
fifth semester
(regulation 2004)
cs1252-operating systems

part-A(10*2=20 marks)

1.what is the difference between os for mainframe and desktop systems?
2.differentiate long term scheduler from short term scheduler.
3.define critical region.
4.what is meant by monitors?
5.what is a safe state?give the use of state in deadlock avoidance.
6.why paging is used?
7.what is meant by demand paging?
8.define thrashing
9.what is the importance of shells in linux?
10.differentiate worms from virus.

part-B(5*16=80)

11.a) describe in detail the activities involved in sharing of information between two processes.
or
b) write short notes on:
i) virtual machines
ii)hardware protection
12.a) discuss how the dinning philosopher's problem can be solved by monitors.
or
b) explain the various process scheduling algorithms with example.
13.discuss how deadlocks can be avoided and detected.
Or
b)describe segmentation.
14.a)explain the various page replacement algorithms with example
Or
b)why is file protection necessary? explain the techniques used for the file protection.
15.a) discuss the file system in linux
or
b)discuss in detail the disk management techniques folowed in os.

CA5155 OPERATING SYSTEMS anna university previous year question paper

2012-06-04T16:26:00.002+05:30

M.C.A DEGREE EXAMINATION, JUNE/JULY 2009

SECOND SEMESTER

CA5155 OPERATING SYSTEMS

(REGULATION 2007)

Time: Three hours Maximum: 100 marks

Answer all questions.

PART A – [10 X 2 = 20 marks]

1.What do you mean by graceful degradation in multiprocessor systems?

2.What is system call?

3.What are the various states of a process?

4.Why CPU scheduling is required?

5.List the three requirements that must be satisfied by critical-section problem.

6.Define deadlock.

7.What do you mean by swapping technique?

8.State the principle of locality.

9.What is the use of file control block?

10.What are the free space management techniques?

PART B – [5 X 16 = 80 marks]

11.(a) Discuss about the mainframe system. (8)

(b) Explain the components of an operating system. (8)

Or

12.(a) Explain about the distributed systems. (8)

(b) Discuss the Operating System Services. (8)

13. Consider the following set of processes, with the length of the CPU – burst time given in milliseconds. (16)

Process Burst time Priority
P1 10 3
P2 1 1
P3 2 3
P4 1 4
P5 6 2

The process are assumed to have arrived in order P1, P2, P3, P4, P5, all at time 0.
(a)Draw four Gantt charts illustrating the execution of these processes using FCFS, SJF, a non-preemptive priority (a smaller priority number implies a higher priority), and RR (quantum = 1) scheduling.

(b)What is the turnaround time of each process for each of the scheduling algorithm in part (a)?

(c)What is the waiting time of each process for each of the scheduling algorithm in part (a)?

Or

14. (a) Compare long term, short term and medium term process schedulers. (8)

(b) Describe briefly about the Interprocess Communcation. (8)

15. (a) Explain the readers-writers problem using semaphores. (8)

(b) Explain the banker’s algorithm for solving deadlock problem. (8)

Or

16. (a) Explain the scheme for detecting deadlock. (8)

(b) Discuss the various methods for deadlock recovery. (8)

17. (a) Explain the various contagious memory allocation strategies with suitable examples. (8)

(b) Discuss the concept of demand paging. (8)

Or

18. (a) Consider the page-reference string : 2 3 2 1 5 2 4 5 3 2 5 2. How many page faults occur for the following replacement algorithms, assuming three frames? (12)

(i) FIFO
(ii) LRU
(iii) Optimal

(b) Write a short note on segmentation. (4)

19. (a) Suppose that a disk drive has 5000 cylinders, numbered 0 to 4999. The drive is currently serving a request at cylinder 143 and the previous request was at cylinder 125. The queue of pending request is 86, 1470, 913, 1774, 948, 1509, 1022, 1750, 130. What is the total distance (in cylinders) to satisfy these requests using the following disk-scheduling algorithms? (8)
(i) SCAN
(ii) LOOK

(b) Discuss briefly the schemes for defining the logical structure of a directory. (8)

Or

20. (a) Explain the various methods of allocating disc space. (8)

(b) Describe the components of a Linux system. (8)

CS2253 COMPUTER ORGANIZATION AND ARCHITECTURE APRIL/MAY 2010 ANNA UNIVERSITY QUESTION PAPER QUESTION BANK IMPORTANT QUESTIONS 2 MARKS AND 16 MARKS

2012-06-04T16:24:00.000+05:30

B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2010

Fourth Semester

Computer Science and Engineering

CS2253 — COMPUTER ORGANIZATION AND ARCHITECTURE

(Common to Information Technology)

(Regulation 2008)

Time: Three hours Maximum: 100 Marks

Answer ALL Questions

PART A — (10 × 2 = 20 Marks)

1. Distinguish between autoincrement and autodecrement addressing mode.
2. Compare RISC with CISC architecture.
3. Under what situations the micro program counter is not incremented after a
new instruction is fetched from micro program memory?
4. What are the relative merits of horizontal and vertical microinstruction
format?
5. What is pipelining and what are the advantages of pipelining?
6. List the key aspects in gaining the performance in pipelined systems.
7. How many memory chips are needed to construct 2 M × 16 memory system
using 512 K × 8 static memory chips?
8. What is virtual memory and what are the benefits of virtual memory?
9. What is meant by bus arbitration?
10. Name and give the purpose of widely used bus standard.
PART B — (5 × 16 = 80 Marks)
11. (a) (i) Describe the role of system software to improve the performance of
a computer. (8)
(ii) Design a 4-bit adder/subtracter circuit using full adders and explain
its function. (8)
Or
(b) (i) What are the special registers in a typical computer? Explain their
purposes in detail. (8)
(ii) Design a 4-bit fast adder and explain its function in detail. (8)
12. (a) (i) Draw and explain the block diagram of a complete processor. (6)
(ii) Briefly describe the design of a hardwired control unit. (10)
Or
(b) (i) Explain the basic organization of a microprogrammed control unit
and the generation of control signals using microprogram. (12)
(ii) What are the advantages and disadvantages of hardwired and
microprogrammed control? (4)
13. (a) (i) Describe the role of cache memory in pipelined system. (8)
(ii) Discuss the influence of pipelining on instruction set design. (8)
Or
(b) What is instruction hazard? Explain the methods for dealing with the
instruction hazards. (16)
14. (a) (i) What are the different secondary storage devices? Elaborate on any
one of the devices. (8)
(ii) Explain how the virtual address is converted into real address in a
paged virtual memory system. (8)
Or
(b) (i) Explain approaches for addressing multiple-module memory
systems with suitable diagrams. (6)
(ii) Briefly describe magnetic disk principles and also the organization
and accessing of data on a disk. (10)
15. (a) (i) Describe the hardware mechanism for handling multiple interrupt
requests. (8)
(ii) What are handshaking signals? Explain the handshake control of
data transfer during input and output operation. (8)
Or
(b) (i) What are the needs for input-output interface? Explain the
functions of a typical 8-bit parallel interface in detail. (10)
(ii) Describe the USB architecture with the help of a neat diagram. (6)

CS2253 COMPUTER ORGANIZATION AND ARCHITECTURE NOVEMBER/DECEMBER 2010 ANNA UNIVERSITY QUESTION PAPER QUESTION BANK IMPORTANT QUESTIONS 2 MARKS AND 16 MARKS

2012-06-04T16:22:00.003+05:30

B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2010

Fourth Semester

Computer Science and Engineering

CS 2253 — COMPUTER ORGANIZATION AND ARCHITECTURE

(Common to Information Technology)

(Regulation 2008)

Time : Three hours Maximum : 100 Marks

Answer ALL questions

PART A — (10 × 2 = 20 Marks)

1. What does the term hertz refer to?

2. How is the number 25 represented in BCD and ASCII code?
3. What is mono phase?
4. What are the two possible error conditions that may arise in a stack operation?
5. How can memory access be made faster in a pipelined operation? Which
hazards can be reduced by faster memory access?
6. How do you calculate the execution time T of a program that has a dynamic
instruction count N?
7. What is memory interleaving?
8. How is disk access time calculated?
9. What are Priority groups?
10. What are the operating system routines of a keyboard driver?

PART B — (5 × 16 = 80 Marks)

11. (a) (i) Describe the connections between the processor and memory with a
neat structure diagram. (8)
(ii) X=A X B + C X C (8)
Explain how the above expression will be executed in one address,
two address and three address processors in an accumulator
organization.
Or

(b) Explain in detail how Instructions are encoded. (16)
12. (a) (i) Draw the diagram of the single Bus Organization of the data
path inside a processor. (8)
(ii) Explain the above regarding execution. (8)
Or
(b) (i) Explain the Organization of the control unit to allow conditional
branching in the microprogram. (8)
(ii) How is a functional field microinstruction generated? Explain. (8)
13. (a) Explain how the instruction pipeline works. What are the various
situations where an instruction pipeline can stall? What can be its
resolution? (16)
Or
(b) (i) Examine the relationships between pipeline execution and
addressing modes. (8)
(ii) What do you mean by out of order execution? (8)
14. (a) Write a note on Asynchronous and Synchronous DRAMs. (16)
Or
(b) (i) Analyze the memory hierarchy in terms of speed, size and Cost. (8)
(ii) Explain the Address Translation in Virtual Memory. (8)
15. (a) Explain the following:
(i) Memory mapped I/O (4)
(ii) I/O Registers (4)
(iii) Hardware Interrupts (4)
(iv) Vectored interrupt (4)
Or
(b) Write a note on SCSI BUS. Explain with a neat diagram. (16)

CS2253 COMPUTER ORGANIZATION AND ARCHITECTURE APRIL/MAY 2011 ANNA UNIVERSITY QUESTION PAPER QUESTION BANK IMPORTANT QUESTIONS 2 MARKS AND 16 MARKS

2012-06-04T16:21:00.003+05:30

B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2011

Fourth Semester

Computer Science and Engineering

CS 2253 — COMPUTER ORGANIZATION AND ARCHITECTURE

(Common to Information Technology)

(Regulation 2008)

Time : Three hours Maximum : 100 marks

Answer ALL questions

PART A — (10 × 2 = 20 marks)

1. What is an opcode? How many bits are needed to specify 32 distinct
operations?
2. Write the logic equations of a binary half adder.
3. Write the difference between Horizontal and Vertical Microinstructions.
4. In what ways the width and height of the control memory can be reduced?
5. 5 = A A A + ← 3
A B × ← 4
What hazard does the above two instructions create when executed
concurrently?
6. What are the disadvantages of increasing the number of stages in pipelined
processing?
7. What is the use of EEPROM?
8. State the hardware needed to implement the LRU in replacement algorithm.
9. What is distributed arbitration?
10. How interrupt requests from multiple devices can be handled?

PART B — (5 × 16 = 80 marks)

11. (a) With examples explain the Data transfer, Logic and Program Control
Instructions? (16)
Or
(b) Explain the Working of a Carry-Look Ahead adder. (16)
12. (a) (i) Describe the control unit organization with a separate Encoder and
Decoder functions in a hardwired control. (8)
(ii) Generate the logic circuit for the following functions and explain. (8)
..... .BR T .ADD T T Z 4 6 1 in
+ + + =
END ... ).BRN N . T .N (T .BR T .ADD T 4 5 5 7
+ + + + = .
Or
(b) Write a brief note on nano programming. (16)
13. (a) What are the hazards of conditional branches in pipelines? how it can be
resolved? (16)
Or
(b) Explain the super scalar operations with a neat diagram. (16)
14. (a) What is a mapping function? What are the ways the cache can be
mapped? (16)
Or
(b) Explain the organization and accessing of data on a Disk. (16)
15. (a) (i) How data transfers can be controlled using handshaking technique?
(8)
(ii) Explain the protocols of USB. (8)
Or
(b) How the parallel port output interface circuit works? (16)

MICROPROCESSORS AND MICROCONTROLLERS CS2252 ANNA UNIVERSITY QUESTION PAPER | CS 2252 MICROPROCESSORS AND MICROCONTROLLERS NOVEMBER/DECEMBER 2011 QUESTION PAPER DOWNLOAD

2012-06-04T16:19:00.003+05:30

B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2011.

Fourth Semester

Computer Science and Engineering

CS 2252 – MICROPROCESSORS AND MICROCONTROLLERS

(Common to Information Technology)

(Regulation 2008)

Time : Three hours Maximum : 100 marks

Answer ALL questions.

PART A — (10 × 2 = 20 marks)

1. Identify the addressing mode of the following 8085 instruction.
(a) SHLD 2500H
(b) DCR E
2. Name the machine cycles needed to execute the 8085 instruction MVIB,4FH.
3. What are the general purpose registers in 8086?
4. Give the importance of the assembler directive EVEN.
5. What are the features of closely coupled multiprocessor systems?
6. What do you mean by CCW in an I/O processor?
7. How many address lines and data lines are necessary for accessing 32Kx8 memory?
8. What is DMA?
9. What are the differences between a microprocessor and a microcontroller?
10. How is the selection of particular register bank done in 8051?

PART B —(5 × 16 = 80 marks)

11. (a) Explain the Intel 8085 Microprocessor architecture with neat diagram. (16)

(b) (i) Discuss the different groups of instruction set of 8085 with suitable examples.(8)
(ii) Write an 8085 ALP to find the largest number in a array of 10 data. Starting address of the array of data is 4250H. (8)
12. (a) (i) Explain the various addressing modes of 8086 processor with suitable examples. (10)
(ii) Compare macro and procedure. (6)

(b) (i) Write an 8086 ALP to find the sum of numbers in the array of 12 elements. (8)
(ii) What is BIOS? Discuss the various BIOS function calls. (8)
13. (a) (i) Draw the block diagram of 8087 numeric Data processor and explain. (10)
(ii) Discuss briefly the data types supported by 8087 Numeric Data Processor. (6)

(b) (i) Explain the block diagram of 8089 I/O processor. (10)
(ii) Discuss the schemes used to solve the bus arbitration problem in multiprocessors (6)
14. (a) Explain the 8251 USART with neat block diagram. Also explain its mode word, command word and status word. (16)
Or
(b) Describe the block diagram of 8259 Programmable Interrupt Controller and its priority modes. (16)
15. (a) (i) Draw the pin diagram of 8051 microcontroller and explain the functions of each pin. (10)
(ii) Discuss briefly the various registers in 8051 microcontroller. (6)
Or
(b) (i) Explain the interfacing of 4×4 matrix keyboard to the 8051 microcontroller with neat diagram. (10)
(ii) Briefly write about the IE and IP register in 8051 microcontroller. (6)

CS 2252 MICROPROCESSORS AND MICROCONTROLLERS NOVEMBER/DECEMBER 2010 ANNA UNIVERSITY QUESTION PAPER QUESTION BANK IMPORTANT QUESTIONS 2 MARKS AND 16 MARKS

2012-06-04T16:18:00.001+05:30

B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2010

Fourth Semester

Computer Science and Engineering

CS 2252 — MICROPROCESSORS AND MICROCONTROLLERS

(Common to Information Technology)

(Regulation 2008)

Time : Three hours Maximum : 100 Marks

Answer ALL questions

PART A — (10 × 2 = 20 Marks)

1. Give any two single byte instructions that clear the accumulator register of 8085.

2. List the machine cycles involved in the execution of the following 8085 instructions: PUSH PSW; MOV A, M.
3. List the pointer and index registers of 8086 architecture.
4. Identify the addressing modes involved in the following 8086 instructions:
MOV AX, 0005H; MOV AX, 50H [BX][SI].
5. What are the two internal sections of 8087 architecture?
6. What is the role of CCP in 8089 architecture?
7. What are the signals and instructions available in 8085 processor for serial I/O
communication?
8. What signals are required between a 8085 processor and an interrupt
controller for interrupt driven data transfer?
9. What are the functions of the following signals of 8051? ALE/PROG,PSEN .
10. What are the sources of interrupts in 8051?
PART B — (5 × 16 = 80 Marks)
11. (a) (i) List and explain the functions of flags in 8085 processor. (8)
(ii) Write an assembly language program using 8085 instruction set to
convert a string of ASCII characters into its hexadecimal
equivalent. (8)
Or
(b) (i) Identify the addressing modes and the number of T-states required
for the following instructions of 8085: MOV M,A; LXI SP,
addr.; LDAX D;ORA B. (8)
(ii) Discuss the features of 8085 processor for the support of interrupts
and DMA. (8)
12. (a) (i) Explain the register organization of 8086 processor in detail. (8)
(ii) Describe the various addressing modes of 8086 processor with
suitable examples for each. (8)
Or
(b) (i) What is the use of interrupts in microprocessor systems? With
suitable examples explain the sequence of operations done by a
microprocessor when it is interrupted. (8)
(ii) Explain how BIOS function calls are invoked in assembly language
programs. (8)
13. (a) (i) Explain the exception handling feature of 8087. (8)
(ii) Write a detailed note on the data types supported by 8087 in detail.
(8)
Or
(b) (i) With a neat sketch explain the general interconnections between
8086 and 8089. (10)
(ii) Distinguish between loosely coupled and closely coupled
multiprocessor systems with suitable examples. (6)
14. (a) (i) With a neat sketch, show all the interconnections required between
a 8085 processor and a RAM of size 4KB mapped in the address
range 2000H-2FFFH. (8)
(ii) Explain the data transfer on a parallel printer interface using a
timing diagram. (8)
Or
(b) (i) What are the signals a microprocessor should have to support
DMA? List and explain the sequence of operations carried out
during a DMA transfer. (8)
(ii) Explain the four modes of keyboard operation in 8279. (8)
15. (a) (i) Bring out the features of Special Function Registers of 8051
microcontroller. (8)
(ii) With a neat sketch of a Schematic diagram, explain the functions of
various signals of 8051. (8)
Or
(b) (i) Describe the various interrupts and their associated priorities in
8051 microcontroller. (8)
(ii) Write brief notes on ADCs mid DACs along with their interface
details. (8)

CS2252 MICROPROCESSORS AND MICROCONTROLLERS ANNA UNIVERSITY QUESTION PAPER QUESTION BANK IMPORTANT QUESTIONS 2 MARKS AND 16 MARKS

2012-06-04T16:17:00.000+05:30

B.E./B.Tech. DEGREE EXAMINATION, APRIL/MAY 2010

Fourth Semester

Computer Science and Engineering

CS2252 — MICROPROCESSORS AND MICROCONTROLLERS

(Common to Information Technology)

(Regulation 2008)

Time: Three hours Maximum: 100 Marks

Answer ALL Questions

PART A — (10 × 2 = 20 Marks)

1. Assume that the accumulator contains data bytes 82H and the instruction

MOV C, A (4FH) is fetched. List the steps in decoding and executing the
instruction.
2. What are the second bytes in the instruction IN and OUT of
8085 microprocessor?
3. Draw the 8086 flag register format.
4. List different types of 8086 hardware interrupts.
5. Compare closely coupled configuration with loosely coupled configuration.
6. Mention the need for co-processor in a microprocessor based system.
7. Can an input port and an output port have the same port address? Justify.
8. Why is each channel in DMA controller restricted to 16K bytes of data
transfer?
9. With XTAL = 11.0592 MHz, what value should be loaded into TH1 to have
9600 baud rate?
10. How do you select the register bank in 805l microcontroller?
PART B — (5 × 16 = 80 Marks)
11. (a) (i) Write an 8085 assembly language program with flowchart for the
following: Six bytes are stored in memory locations starting at
XX50H. Add all the data bytes. Use register B to save any carry
generated while adding the data bytes. Store the sum at two
consecutive memory locations, XX70H and XX7IH. Data (H): A2,
FA, DF, E5, 98, 8B. (8)
(ii) Write a program to generate a continuous square wave with the
period of s µ 500 . Assume the system clock period is 325ns and use
bit D0 to output the square wave. (8)
Or
(b) (i) Explain the following 8085 instructions with an example
JP, JPO, CM, RPE. DAA, XCHG. SPHL and PCHL. (8)
(ii) Draw the timing diagram for the instruction
MVI A, 32h and OUT 01h. (8)
12. (a) (i) Draw the internal block diagram of 8086 microprocessor and
explain. (8)
(ii) Explain any eight assembler directives of 8086 microprocessor. (8)
Or
(b) (i) Give three examples for the following 8086 microprocessor
instructions: String Instructions, Process Control Instructions,
Program Execution Transfer Instructions and Bit Manipulation
Instructions. (12)
(ii) How does one define and Call Macro parameters of 8086
microprocessor? (4)
13. (a) (i) Draw the internal block diagram of 8087 Co-processor and explain
it with 8087 control word and status word formats. (12)
(ii) Give two examples for packed decimal data transfers and integer
data transfers of an 8087 Co-processor. (4)
Or
(b) Draw the architecture of 8089 I/O Co-processor and explain. (16)
14. (a) Draw the block diagram of 8279 Keyboard/Display controller and explain
how to interface the Hex Key Pad and 7-segment LEDs using 8279. (16)
Or
(b) (i) Draw the functional block diagram of 8254 timer and explain the
different modes of operation. (8)
(ii) Draw the block diagram of 8259A and explain how to program
8259A. (8)
15. (a) (i) Explain the memory structure of an 8051 Microcontroller. (8)
(ii) How does one interface a 16 × 2 LCD Display using 8051
Microcontroller? (8)
Or
(b) (i) Explain the on-chip timer modes of an 8051 Microcontroller. (8)
(ii) Explain how to interface an 8-bit ADC with 8051 Microcontroller.
(8)