Experimenters' Log

Example Assembly and C Code for ARM Cortex M0 (NXP LPC1114/301)

2014-02-27T17:16:00.001-08:00

What the example programs do:

Example programs described here toggle PIO3_2 pin of the MCU 10 times a second. PIO3_2 is located at pin 43 or M43 on the PCB. First example is provided in assembly language and the second in C.

Figure 1

Connect a wire between PIO3_2 and any pin of JP5 connector (red rectangle). This will allow the corresponding LED of JP5 to blink at 5Hz.

Development Environment Setup:

Keil project setup for assembly: Writing Assembly Code for ARM Cortex M0 (Device NXP LPC1114/301)

Keil Project setup for C: Writing C on ARM Cortex M0 (NXP LPC1114/301)

Program Flow:

Figure 2

On powerup or reset, Reset_Handler is executed first. Reset_Handler in starup_LPC11xx.s first invokes SystemInit routine before calling the __main routine. Keil usually copies the starup_LPC11xx.s file into the project directory when the project is created.

SystemInit routine configures the system PLL and clocks the MCU core with 48MHz. For C projects, SystemInit routine is defined in startup_LPC11xx.c. An assembly version of the SystemInit routine is provided in this example.

On completion of SystemInit routine, execution starts in __main. _Initialize_Peripherals routine is executed next in which following tasks are performed:

Task 1. Clock is enabled for the I/O configuration block

Task 2. Clock is enabled for the GPIO

Task 3. Clock is enabled for a 32-bit timer

Task 4. PIO3_2 (M43 on the PCB) is set as output. On reset, all the GPIO pins are configured as inputs by default.

Task 5. PIO3_2 is set (logic 1) initially

Task 6. 32-bit timer is configured so that it generates an interrupt 10 times a seconds (thus the 5Hz blink rate)

Program execution continues in __main after _Initialize_Peripherals routine returns. Global interrupts are enabled next. An infinite loop is executed in which some general calculations are performed.

Once the 32-bit timer-0 has counted 4.8 million CPU cycles, an interrupt request is generated and the interrupt service routine (ISR) TIMER32_0_IRQHandler is executed. The timer is configured in such a way that the count-value is reset at the time the counter has counted 4.8 million CPU cycles. PIO3_2 output is toggled in TIMER32_0_IRQHandler.

Example assembly code:

Download assembly example

AREA main, CODE, READONLY

EXPORT __main

EXPORT __use_two_region_memory

__use_two_region_memory EQU 0

EXPORT SystemInit

EXPORT TIMER32_0_IRQHandler

ENTRY

; System Init routine

SystemInit PROC

; Initialize system clock to 48MHz from a 12MHz onboard crystal oscillator (XTAL)

; Description of the steps:

; Step 1: Power up system oscillator (XTAL)

; Step 2: Wait 200 counts in a while loop

; Step 3: Select system oscillator (XTAL) as the input of the PLL clock source

; Step 4: Wait until PLL clock source is updated to 12MHz system oscillator (XTAL)

; Step 5: Set the clock multiplier for the PLL and power up the System PLL

; Step 6: Wait until PLL is locked

; Step 7: Select the output of the PLL as the main CPU clock

; Step 8: Toggle the main CPU clock enable bit for the

; new clock source (PLL output) to take effect

; Step 9: Wait until main CPU clock is updated

; Step 10: Set the core and peripheral clock divider to 1

; Step 1: Power up system oscillator (XTAL)

; Load the address of PDRUNCFG into R0;

LDR R0, =(0x40048238); PDRUNCFG, address 0x4004 8238

; Load the value of PDRUNCFG into R1

LDR R1, [R0];

; Clear SYSOSC_PD(bit 5) in PDRUNCFG

LDR R2, =(0xFFFFFFDF);

ANDS R1, R2;

; Store the R2 into PDRUNCFG

STR R1, [R0];

; Step 2: Wait 200 counts in a while loop

MOVS R0, #(0xC7);

MOVS R1, #(0x01);

_WAIT_OSCILLATOR_PWR_UP

SUBS R0, R1;

BNE _WAIT_OSCILLATOR_PWR_UP; Loop until ZERO flag is 1

; Step 3: Select system oscillator (XTAL) as the input of the PLL clock source

LDR R0, =(0x40048040); SYSPLLCLKSEL, address 0x4004 8040

; Load R1 with 0x01 to select the system oscillator for the PLL

MOVS R1, #(0x01);

; Store the value of R1 into SYSPLLCLKSEL

STR R1, [R0];

; Toggle enable bit for the change to take effect in SYSPLLCLKUEN, address 0x4004 8044

; (System PLL clock source update enable register) to update PLL clock source

LDR R0, =(0x40048044); SYSPLLCLKUEN, address 0x4004 8044

MOVS R1, #(0x01);

MOVS R2, #(0x00);

; Write 1 to SYSPLLCLKUEN

STR R1, [R0];

; Write 0 to SYSPLLCLKUEN

STR R2, [R0];

; Write 1 again to SYSPLLCLKUEN

STR R1, [R0];

; Step 4: Wait until PLL clock source is updated to 12 MHz system oscillator (XTAL)

; Load the address of SYSPLLCLKUEN into R0

LDR R0, =(0x40048044); SYSPLLCLKUEN, address 0x4004 8044

MOVS R2, #(0x01); Value to check against in the following loop

_WAIT_PLL_CLK_SRC_UPDATE

; Load the value of SYSPLLCLKUEN into R1

LDR R1, [R0];

CMP R1, R2;

BNE _WAIT_PLL_CLK_SRC_UPDATE; Loop until PLL clock source is updated

; Step 5: Set the clock multiplier for the PLL and power up the System PLL

; Load the address of SYSPLLCTRL

LDR R0, =(0x40048008); SYSPLLCTRL, address 0x4004 8008

; Load R1 with the MSEL and PSEL values to render 48MHz from 12MHz system oscillator

MOVS R1, #(0x23);

; Store R1 into SYSPLLCTRL

STR R1, [R0];

; Power up System PLL = Clear bit 7 of PDRUNCFG

; Load the address of PDRUNCFG into R0;

LDR R0, =(0x40048238); PDRUNCFG, address 0x4004 8238

; Load R1 with PDRUNCFG

LDR R1, [R0];

; Load R2 with 0xFFFFFF7F (only bit 7 is cleared)

LDR R2, =(~(1<<7));

; And the values of R1 (which is PDRUNCFG) and R2

ANDS R1, R2;

; Store the new value of R1 into PDRUNCFG

STR R1, [R0];

; Step 6: Wait until PLL is locked

; Load the address of SYSPLLSTAT into R0

LDR R0, =(0x4004800C); SYSPLLSTAT, address 0x4004 800C

; Load the value of PLL lock status to check against in to R2

MOVS R2, #(0x01);

_WAIT_UNTIL_PLL_LOCKED

; Load SYSPLLSTAT into R1

LDR R1, [R0];

; Check against PLL lock status bit pattern saved in R2

CMP R1, R2;

BNE _WAIT_UNTIL_PLL_LOCKED; Loop until PLL is locked

; Power up the watch dog timer clock here if required

; Step 7: Select the output of the PLL as the main CPU clock

; Load the address of MAINCLKSEL in to R0

LDR R0, =(0x40048070); MAINCLKSEL, address 0x4004 8070

; Load R1 with 0x03 (0x03 = PLL output as the main CPU clock)

MOVS R1, #(0x03);

; Store the value of R1 into MAINCLKSEL

STR R1, [R0];

; Step 8: Toggle the main CPU clock enable bit for the

; new clock source (PLL output) to take effect

; Load the address of MAINCLKUEN into R0

LDR R0, =(0x40048074); MAINCLKUEN, address 0x4004 8074

; Load 0x01 into R1

MOVS R1, #(0x01);

; Load 0x00 into R2

MOVS R2, #(0x00);

; Enable MAINCLKUEN

STR R1, [R0];

; Disable MAINCLKUEN

STR R2, [R0];

; Enable MAINCLKUEN

STR R1, [R0];

; Step 9: Wait until main CPU clock is updated

; Load the address of MAINCLKUEN into R0

LDR R0, =(0x40048074); MAINCLKUEN, address 0x4004 8074

; Load 0x01 into R2

MOVS R2, #(0x01);

_WAIT_MAIN_CLK_UPDATE

; Load the value of MAINCLKUEN into R1

LDR R1, [R0];

; Compare if MAINCLKUEN(R1) is updated or not

CMP R1, R2;

BNE _WAIT_MAIN_CLK_UPDATE; Loop until main CPU clock source is updated

; Step 10: Set the core and peripheral clock divider to 1

; Load the address of SYSAHBCLKDIV into R0

LDR R0, =(0x40048078); SYSAHBCLKDIV, address 0x4004 8078

; Load 0x01 into R1

MOVS R1, #(0x01);

; Store 0x01 into SYSAHBCLKDIV

STR R1, [R0];

BX LR; Return from SystemInit

ENDP; End of SystemInit routine

_Initialize_Peripherals PROC

PUSH {LR}; Other registers can be pushed to the stack if necessary

; Enable clock for I/O config block, GPIO, and 32-bit counter/timer in SYSAHBCLKCTRL

; First, load the address of SYSAHBCLKCTRL into R0

LDR R0, =(0x40048080); SYSAHBCLKCTRL, address 0x4004 8080

; Load R1 with the value of SYSAHBCLKCTRL

LDR R1, [R0];

; Load the bit pattern to enable clock for I/O config block(bit 16), GPIO(bit 6),

; and 32-bit counter/timer(bit 9) into R2

LDR R2, =( (1<<16) | (1<<9) | (1<<6) );

; Apply bitwise OR between R1(value of SYSAHBCLKCTRL) and R2(new bit pattern)

; and save the result into R1

ORRS R1, R2;

; Store the new value of R1 into SYSAHBCLKCTRL

STR R1, [R0];

; Configure PIO3_2 (pin 43, M43 on PCB) as output

; By default (on reset), all the GPIO pins are inputs

; Set bits 2:0 of IOCON_PIO3_2 to zeros for PIO3_2 function (not the DCD function)

; Load the address of IOCON_PIO3_2 into R0

LDR R0, =(0x4004409C); IOCON_PIO3_2, address 0x4004 409C

; Load the value of IOCON_PIO3_2 into R1

LDR R1, [R0];

; Load R2 with 0xFFFFFFF8 (bits 2:0 are zeros)

LDR R2, =(0xFFFFFFF8);

; Apply AND operation between R1 and R2

ANDS R1, R2;

; Store the new value of R1 into IOCON_PIO3_2

STR R1, [R0];

; Set bit 2 of GPIO3 data direction register to set PIO3_2 pin as output

; Load the address of GPIO3DIR into R0

LDR R0, =(0x50038000); GPIO3DIR, address 0x5003 8000

; Load the value of GPIO3DIR into R1

LDR R1, [R0];

; Load a bit pattern 0x00000004 into R2 (bit 2 is set)

MOVS R2, #( (1<<2) );

; Apply bitwise OR operation between R1(value of GPIO3DIR) and R2(bit pattern)

ORRS R1, R2;

; Store the new value of R1 into GPIO3DIR;

STR R1, [R0];

; Set the initial output on PIO3_2(M43) as high

; Load the address of GPIO3DATA(last unmasked address base+0x3FFC) into R0

LDR R0, =(0x50033FFC); GPIO3DATA Base + 0x3FFC, address 0x5003 3FFC

; Load the value (1) at bit location 2 to set PIO3_2 high

MOVS R1, #( (1<<2) );

; Store the value of R1 into GPIO3DATA

STR R1, [R0];

; Initialize 32-bit Counter/Timer0 such that it generates

; an interrupt 10 times a second (= 5 ONs + 5 OFFs = 10Hz timer)

; Load Match Register0(TMR32B0MR0) of 32-bit counter0(TMR32B0 or CT32B0)

; with (48MHz/10Hz - 1) = (4800000-1) = 4799999

LDR R0, =(0x40014018); TMR32B0MR0, address 0x4001 4018

LDR R1, =(0x00493DFF); Decimal 4799999 = Hexadecimal 0x00493DFF;

; Store the value of R1 into TMR32B0MR0

STR R1, [R0];

; Enable interrupt when the value in the counter(TMR32B0TC) matches

; the value in Match Register0 (TMR32B0MR0) and at the same time

; resets the 32-bit counter. Thus the counter starts to count from 0 again.

; Load the address of Match Control Register(TMR32B0MCR) into R0

LDR R0, =(0x40014014); TMR32B0MCR, address 0x4001 4014

; Load the value of TMR32B0MCR into R1

LDR R1, [R0];

; Enable Interrupt on MR0 and reset counter value on match (set bit 0 and bit 1 of TMR32B0MCR)

MOVS R2, #( (1<<1)|(1<<0) ); Load R2 with bit 0 and bit 1 set. All other bits are zeros

; Apply OR operation between R1(value of TMR32B0MCR) and R2

ORRS R1, R2;

; Store the new value of R1 into TMR32B0MCR

STR R1, [R0];

; Enable CT32B0 interrupt (bit 18) in Nested Vectored Interrupt Controller(NVIC)

; Load the address of Interrupt Set Register(ISER) of NVIC into R0

LDR R0, =(0xE000E100); ISER of NVIC, address 0xE000 E100

; Load R1 with all zeros except bit-18 set

LDR R1, =( (1<<18) ); "MOVS" can only load immediate values from 0 - 255 decimal

; Store the value of R1 into ISER of NVIC

STR R1, [R0];

; Start the counter by setting bit 0 of Timer Control Register(TCR)

LDR R0, =(0x40014004); TMR32B0TCR, address 0x4001 4004

; Load R1 with all zeros except bit 0 set

MOVS R1, #(0x01);

; Store R1 into TMR32B0TCR. This starts the counter

STR R1, [R0];

;Return from the function _Initialize_Peripherals

POP {PC};

ENDP; End of _Initialize_Peripherals

; Interrupt Service Routine (ISR) for TMR32B0.

; The name of the service routine is defined in startup_LPC11xx.s

TIMER32_0_IRQHandler PROC

; Save the register values onto the stack that will be used in this ISR

PUSH {R0, R1, R2};

    ; Toggle PIO3_2 (pin 43 or M43 on PCB)

    ; Load the address of GPIO3DATA(last unmasked address base+0x3FFC) into R0

    LDR R0, =(0x50033FFC); GPIO3DATA Base + 0x3FFC, address 0x5003 3FFC

    ; Load the value of GPIO3DATA into R1

    LDR R1, [R0];

    ; Load R2 with (1<<2)

    MOVS R2, #(1<<2);

    ; Apply bitwise XOR between R1(the value of GPIO3DATA)
   ; and R2 (1<<2) to toggle the value of bit location 2

    EORS R1, R1, R2;

    ; Store the new value of R1 into GPIO3DATA

    STR R1, [R0];

    ; Clear interrupt by writing 1 to the MR0 interrupt(bit 0) of Interrupt Register(TMR32B0IR)

    LDR R0, =(0x40014000); TMR32B0IR, address 0x4001 4000

    MOVS R1, #(0x01);

    STR R1, [R0];

    ; Get the registers back from the stack that were saved at the beginning of this ISR

    POP {R0, R1, R2};

    ; Return from TIMER32_0_IRQHandler Interrupt Service Routine

    BX LR;

    ENDP; End of TIMER32_0_IRQHandler

; __main routine starts here

__main PROC

; Call the following function to initialize peripherals

BL _Initialize_Peripherals;

; Enable global interrupts

CPSIE i;

; Loop infinitely between "_LoopHere1" and "B _LoopHere1"

MOVS R0, #(0x00); Test load 1.

; "MOVS" can only load immediate values from 0 - 255 decimal

_LoopHere1

NOP;

MOVS R1, #(0x02); Test load 2

; Increment R0 by 1

ADDS R0, R0, #(0x01); R0 = R0 + 1;

; Test 1 cycle 32-bit hardware multiplier

MULS R1, R0, R1; 1 cycle multiply operation R1 = R0 x R1

NOP;

B _LoopHere1

NOP;

ENDP; End of __main

END; End of File

Example C code:

Download C example

#include "LPC11xx.h"

void _Initialize_Peripherals(void)

{

volatile unsigned int tempData = 0;

// Enable clock for I/O config block, GPIO, and 32-bit counter/timer in SYSAHBCLKCTRL

// Load the bit pattern to enable clock for I/O config block(bit 16), GPIO(bit 6),

// and 32-bit counter/timer(bit 9) int SYSAHBCLKCTRL

LPC_SYSCON->SYSAHBCLKCTRL |= ( (1<<16) | (1<<9) | (1<<6) );

// Configure PIO3_2 (pin 43, M43 on PCB) as output

// By default (on reset), all the GPIO pins are inputs

// Set bits 2:0 of IOCON_PIO3_2 to zeros for PIO3_2 function (not the DCD function)

tempData = LPC_IOCON->PIO3_2;

tempData = tempData & 0xFFFFFFF8;

LPC_IOCON->PIO3_2 = tempData;

// Set bit 2 of GPIO3 data direction register to set PIO3_2 pin as output

LPC_GPIO3->DIR |= (1<<2);

// Set the initial output on PIO3_2(M43) as high

LPC_GPIO3->DATA |= (1<<2);

// Initialize 32-bit Counter/Timer0 such that it generates

// an interrupt 10 times a second (= 5 ONs + 5 OFFs = 10Hz timer)

// Load Match Register0(TMR32B0MR0) of 32-bit counter0(TMR32B0 or CT32B0)

// with (48MHz/10Hz - 1) = (4800000-1) = 4799999

LPC_TMR32B0->MR0 = 0x00493DFF; //Decimal 4799999 = Hexadecimal 0x00493DFF;

// Enable interrupt when the value in the counter(TMR32B0TC) matches

// the value in Match Register0 (TMR32B0MR0) and at the same time

// resets the 32-bit counter. Thus the counter starts to count from 0 again.

LPC_TMR32B0->MCR |= ( (1<<1)|(1<<0) );

// Enable CT32B0 interrupt (bit 18) in Nested Vectored Interrupt Controller(NVIC)

NVIC_EnableIRQ(TIMER_32_0_IRQn); // "TIMER_32_0_IRQn" is defined in LPC11xx.h

// Start the counter by setting bit 0 of Timer Control Register(TCR)

LPC_TMR32B0->TCR = (1<<0);

} // End of _Initialize_Peripherals

// Interrupt Service Routine (ISR) for TMR32B0.

// The name of the service routine is defined in startup_LPC11xx.s

__irq void TIMER32_0_IRQHandler(void)

{

// Toggle PIO3_2 (pin 43 or M43 on PCB)
// Apply bitwise XOR between GPIO3DATA and 1 in bit location 2 (1<<2)

LPC_GPIO3->DATA = ( LPC_GPIO3->DATA ^ (1<<2) );

// Clear interrupt by writing 1 to the MR0 interrupt(bit 0) of Interrupt Register(TMR32B0IR)

LPC_TMR32B0->IR = (1<<0);

} // End of TIMER32_0_IRQHandler

void __main(void)

{

// SystemInit() routine is executed before __main()

// SystemInit() routine is defined in system_LPC11xx.c

// system_LPC11xx.c is located at "keil_installation\ARM\Startup\NXP\LPC11xx"

volatile unsigned int tempData0;

volatile unsigned int tempData1;

// Call the following function to initialize peripherals

_Initialize_Peripherals();

// Enable global interrupts

__enable_irq();

// Infinite while loop

while(1)

{

__NOP();

tempData1 = 2;

// Increment tempData0 by 1

tempData0++;

tempData1 = tempData0 * tempData1; // Multiply operation

__NOP();

} // end of while(1)

} // End of __main

Instruction are provided here (step 8 to step 10) to compile, simulate and run the above programs on the development kit.

Writing C on ARM Cortex M0 (NXP LPC1114/301)

2014-02-25T14:19:00.002-08:00

To write assembly on the MCU: Writing Assembly Code for ARM Cortex M0

Example assembly and C code for LPC1114/301: Example Assembly and C Code for ARM Cortex M0 (NXP LPC1114/301)

Step 1. Create a Project with uVision 4 (Free evaluation of Keil MDK ARM v4: https://www.keil.com/download/product/)

Figure 1

Step 2. Select NXP LPC1114/310 as the target device.

Figure 2

Step 3. Copy “startup_LPC111x.s” into the project directory.

Figure 3

Step 4. Copy the following files into the project directory.

File Name	Source (Assuming Keil uVision4 is installed in D:\Keil)
LPC11xx.h	D:\Keil\ARM\INC\NXP\LPC11xx
system_LPC11xx.h	D:\Keil\ARM\INC\NXP\LPC11xx
system_LPC11xx.c	D:\Keil\ARM\Startup\NXP\LPC11xx

Step 5. Right click on the “Source Group 1” and add “system_LPC11xx.c” to the current project.

Figure 4

Figure 5

Step 5. Again right click on the “Source Group 1” and add a new .c file to the project. This file will contain the “__main()” function and interrupt service routines.

Figure 6

Figure 7

Step 6. Write the application code in the .c file recently created.

Figure 8

Code:

#include "LPC11xx.h"

void __main(void)

{

// Write user code here

unsigned int tempData1 = 0;

__NOP();

// Infinite while loop

while(1)

{

tempData1++;

} // end of while(1)

}

Compilation, Simulation, HEX file generation, and programming the MCU with the generated HEX file steps are same as in Writing Assembly Code for ARM Cortex M0.

Writing Assembly Code for ARM Cortex M0 (Device NXP LPC1114/301)

2014-02-24T15:56:00.000-08:00

To write C on the MCU: Writing C on ARM Cortex M0

Example assembly and C code for LPC1114/301: Example Assembly and C Code for ARM Cortex M0 (NXP LPC1114/301)

Step 1. Install Keil MDK ARM v4. Free evaluation version is code size limited to 32k: https://www.keil.com/download/product/

Figure 1

Step 2: Launch “uVision 4” and create a new project.

Figure 2

Step 3: Select NXP “LPC1114/301” as the target device.

Figure 3

Step 4. Copy “startup_LPC11xx.s” to the project folder and add it to the current project.

Figure 4

“startup_LPC11xx.s” will appear in the project tree.

Figure 5

Step 5. Right click on “Source Group 1” in the project tree and add a new assembly source file to the project. This source file will contain the “__main” function and the interrupt service routines.

Figure 6

Select “Asm file” and name it. Then add the .s file to the project.

Figure 7

Step 6. Write the assembly code for LPC1114 in “ApplicationCode.s”. Use the template provided in the following figure.

Figure 8

Code for "ApplicationCode.s":

AREA main, CODE, READONLY

EXPORT __main

EXPORT __use_two_region_memory

__use_two_region_memory EQU 0

EXPORT SystemInit

ENTRY

; System Init routine

SystemInit

; Add code here to initialize I/O and peripherals

BX LR; Return from SystemInit

; __main routine starts here

__main

NOP;

NOP;

NOP;

NOP;

; Loop infinitely between "_LoopHere1" and "B _LoopHere1"

_LoopHere1

LDR R0, =0; Test load immediate 1

LDR R0, =1; Test load immediate 2

; Test 1 cycle 32-bit hardware multiplier

LDR R2, =5; Load 5 in R2

LDR R3, =2; Load 2 in R3

MULS R2, R3, R2; 1 cycle multiply operation R2 = R2 x R3

MOV R5, R2; Move R2 into R5

MOV R3, R2; Move R2 into R3

B _LoopHere1

NOP;

B __main; End of __main

END; End of File

Another example is provided here in which interrupt service routine is used to toggle one of the MCU pins once every 4.8 million clock cycles.

Step 7. To compile the source code, right click on “Target1” or “Source Group 1” and select “Rebuild all target files”

Figure 9

Figure 10

Few warnings may appear. Ignore them for now.

Step 8. Simulating the code.

Set “Use Simulator” radio button under the “Debug” tab of “Flash->Configure Flash Tools”. “Options for Target” window will appear. Keep the rest of the settings to the default values.

Figure 11

(Quick: Press “Alt+F7” to bring the “Option for Target” window)

Select “Use Simulator” under the “Debug” tab.

Figure 12

Start the simulation with “Ctrl+F5” or from “Debug->Start/Stop Debug Session”. Evaluation Mode info window will appear. Click “ok” to continue.

Press F11 to single step through the code.

Figure 14

Anytime during the simulation, all the peripheral registers can be observed from the “Peripherals” in the main menu.

Figure 15

Stop the simulation with “Ctrl+F5” or from “Debug->Start/Stop Debug Session”.

Step 9. Generate the .hex file to program the MCU with.

Check “Create .HEX file” box under the “Output” tab of “Flash->Configure Flash Tools”. Then recompile the project. The output .hex file be created in the project directory.

(Quick: Press “Alt+F7” to bring the “Option for Target” window)

Figure 16

Step 10. Program the MCU with the generated .hex file and the LPC21isp tool(http://lpc21isp.sourceforge.net/). A compiled version of the executable “lpcprog.exe” can be downloaded from here.

10a. Connect the development kit to the PC using USB-A to USB-B cable. Download and install the FTDI Vitrual Communication Port Driver, if not installed already.

10b. Make a note of the COM port number at which the the development kit is discovered. Say it is COM7.

10c. To place the MCU into ISP mode, press and hold “RESET + PROG” buttons together on the development kit. Release the “RESET” button FIRST, then release the “PROG” button. The MCU is now in ISP mode.

10d. Open a command prompt and navigate to the place where “lpcprog.exe” is located. Then, type in the following command and press enter.

lpcprog -wipe -verify PATH COM# BaudRate CrystalFrequnecyInKHz

where,

PATH = Absolute path of the .hex file that was generated by Keil

COM# = ‘#’ should be replaced by the serial port number at which the development kit is connected to. If the port number is greater than 9, write “\\.\COMXX” instead of just “COMXX”

Example:

lpcprog -wipe -verify D:\Projects\Project1.hex COM7 115200 12000

Here,

PATH = D:\Projects\Project1.hex

COM# = COM7

BaudRate = 115200
CrystalFrequnecyInKHz = 12000

10e. Once the MCU is programmed, press “RESET” once to launch the new code.

ARM Cortex M0/M3 development kit

Top surface render of the development kit pcb

Bottom surface render of the development kit pcb

PWM Controlled By PC Serial Port

2011-09-15T13:32:00.000-07:00

MCUs Programmed:

1. ATMEGA88PA: UART0, SPI
2. ATTINY261: PWM, USI (Universal Serial Interface) configured as SPI

PC ---(UART)---> ATMEGA88PA ---(SPI)---> ATTINY261 -------> PWM

Assembly Draft Code for ATMEGA88PA:

.include "m88padef.inc"

; Setup MCU to receive data at 2400 baud rate on the UART0

; -------- Register map (START) ----------

; R10 (KEY A) = Address of the I2C Slave (Read/~Write bit included) --> Address byte will be preceeded by 0xAA

; R3 (KEY M) = Byte RG_ADD1_HIGH

; R4 (KEY N) = Byte RG_ADD1_LOW

; R5 (KEY O) = Byte DATA1_HIGH

; R6 (KEY P) = Byte DATA1_LOW

; R22 = Flag for the jump instructions indicating if the next byte is a separator or a data byte (only the bit counts, if last bit == 0, current is a separator byte; if last bit == 1, current byte is a data byte)

; R23 = Dispatch for the loading of the registers R10, R3, R4, R5, and R6

; R18 = Timer0 prescalar

; R19 = Fast PWM R11 or R12 register load indicator (R11 < R12; and R11 + R12 = Total Base frequency counter)

; R11 = Fast PWM pulse width counter

; R12 = Fast PWM base frequency counter

; -------- Register map (END) ------------

.CSEG

.ORG 0x0000

RJMP RESET;

.ORG OC0Aaddr

RJMP OC0Aaddr_ISR;

.ORG OC0Baddr

RJMP OC0Baddr_ISR;

.ORG URXCaddr

RJMP URXCaddr_Rx_Complete_ISR;

.EQU I2C_SLAVE_ADDR_WRITE = 0x0A;

.EQU I2C_STAT_START_SENT = 0x08;

.EQU I2C_STAT_ADDRESS_SENT_ACK_RCVD = 0x18;

.EQU I2C_STAT_DATA_SENT_ACK_RCVD = 0x28;

; Separator bytes

.EQU SEPARATOR_ADDRESS = 0xAA;

.EQU SEPARATOR_RG_ADD1_HIGH = 0x4D;

.EQU SEPARATOR_RG_ADD1_LOW = 0x4E;

.EQU SEPARATOR_DATA1_HIGH = 0x4F;

.EQU SEPARATOR_DATA1_LOW = 0x50;

.EQU SEPARATOR_PWM_BASE_FREQ = 0x51;

.EQU SEPARATOR_PWM_PULSE_WIDTH = 0x52;

.EQU SEPARATOR_SIGNAL_SEND = 0x53;

RESET:

; ----- Set the stack pointer (START) ------

LDI R16, LOW(RAMEND);

LDI R17, HIGH(RAMEND);

OUT SPH, R17;

OUT SPL, R16;

; ----- Set the stack pointer (END) --------

; ------ Setup input and output ports (START) -------

; Set portC as output

SER R16;

OUT DDRC, R16;

; Set all the leds to the zero connected to portC

SER R16;

OUT PORTC, R16;

; Set portB as output

SER R16;

OUT DDRB, R16;

; Set all the leds to the zero connected to portC

SER R16;

OUT PORTB, R16;

; Set portB5 as output for the PWM

CBI PORTB, PORTB5;

; ------ Setup input and output ports (END) ---------

; ------- Setup USART0 2400, 8-bit, 1 stop bit , No parity (START) ----------

; Set the baud rate to 2400 -> UBRR would be set to 520d = (0x0208)

LDI R17, 0x02;

LDI R16, 0x08;

STS UBRR0H, R17;

STS UBRR0L, R16;

; Set the character size to 8 bits, No polarity, and 1 stop bit in UCSR0C

LDI R16, (1<<UCSZ01)|(1<<UCSZ00)|(0<<UPM00)|(0<<UPM01)|(0<<USBS0);

STS UCSR0C, R16;

; Enable the receiver only (RXEN0) and also enable receive data complete interrupt (RXCIE0) in UCSR0B

LDI R16, (1<<RXEN0) | (1<<RXCIE0);

STS UCSR0B, R16;

; ------- Setup USART0 2400, 8-bit, 1 stop bit , No parity (END) ------------

; ----------- SETUP I2C BIT RATE GENERATOR (START) --------

; Set the SCL clock to 200 KHz With TWBR = 42d = 0x2A and Prescalar value set to 1

;LDI R16, 0x2A;

;STS TWBR, R16;

; Set the SCL clock to 38 KHz With TWBR = 255d = 0xFF and Prescalar value set to 1

;LDI R16, 0xFF;

;STS TWBR, R16;

; Set the SCL clock to 8 KHz With TWBR = 20d = 0x14 and Prescalar value set to 64

LDI R16, (1<<TWPS1)|(1<<TWPS0);

STS TWSR , R16;

LDI R16, 0x14;

STS TWBR, R16;

; ----------- SETUP I2C BIT RATE GENERATOR (END) ----------

; ----------- SETUP TIMER0 FOR PWM GENERATION (START) ------

; Load the related registers

CLR R19;

; Load base frequency counter

LDI R16, 0xB4;

MOV R12, R16;

; Load pulse width counter

LDI R16, 0x14;

MOV R11, R16;

; Initially load the OCR0A with the pulse width counter

OUT OCR0A, R11;

; Initially load the OCR0B with the base frequency counter

OUT OCR0B, R12;

; Enable output compare A interrupt

;LDI R16, (1<<OCIE0B)|(1<<OCIE0A);

;STS TIMSK0, R16;

; Load the prescalar and start the clock

;LDI R18, (0<<CS02)|(0<<CS01)|(1<<CS00);

;OUT TCCR0B, R18;

; ----------- SETUP TIMER0 FOR PWM GENERATION (END) --------

; ------------ Enable SPI Communication on PortB(START) ----

; Enable the pin functions

; PB5 (SCK) to output

SBI DDRB, 5;

; PB4 (MISO) to input

CBI DDRB, 4;

; PB3 (MOSI) to output

SBI DDRB, 3;

; PB2 (~SS) to output

SBI DDRB, 2;

; Drive the slave select to LOW ALWAYS, as if the connected slave is always selected

CBI PORTB, 2;

; Enable SPI as master in 0-0 mode, and set the clock prescalar to fscl/128

LDI R16, (1<<SPE)|(1<<MSTR)|(1<<SPR1)|(1<<SPR0);

OUT SPCR, R16;

; ------------ Enable SPI Communication on PortB(END) ------

; Enable global interrupt and go..

SEI;

; --------- Blink some leds (START) ---------

; Clear all the registers involved

CLR R10;

CLR R3;

CLR R4;

CLR R5;

CLR R6;

CLR R22;

CLR R23;

MAIN_LOOP1:

NOP;

RJMP MAIN_LOOP1;

; --------- Blink some leds (END) -----------

RETI;

URXCaddr_Rx_Complete_ISR:

; Read the data from UDR0 into R16;

LDS R16, UDR0;

; ------ Process the data read on the serial port (START) --

MOV R7, R16;

OUT PORTC, R7; Dubugging the serial port

; Increment R22

INC R22;

; Turn off the LEDs if the parsing error occurred in the last byte

CLR R21; To flag the instant when the error occurred..

SER R20;

;;;;OUT PORTB, R20;

; If R22 & 0x01 == 0x01, current byte is a separator byte; if R22 & 0x01 == 0x00, current byte is data byte

SBRC R22, 0;

RJMP PROCESS_SEPARATOR_BYTE;

RJMP PROCESS_DATA_BYTE;

PROCESS_SEPARATOR_BYTE:

; CHECK which separator byte is received in R7;

; MOVE R7 into the temporary resister R24 and work from there

MOV R24, R7;

; Compare the data in R24 with all the SEPARATORs and set R23 appropriately

CPI R24, SEPARATOR_ADDRESS;

BREQ LOAD_SEPARATOR_ADDRESS;

CPI R24, SEPARATOR_RG_ADD1_HIGH;

BREQ LOAD_SEPARATOR_RG_ADD1_HIGH;

CPI R24, SEPARATOR_RG_ADD1_LOW;

BREQ LOAD_SEPARATOR_RG_ADD1_LOW;

CPI R24, SEPARATOR_DATA1_HIGH;

BREQ LOAD_SEPARATOR_DATA1_HIGH;

CPI R24, SEPARATOR_DATA1_LOW;

BREQ LOAD_SEPARATOR_DATA1_LOW;

CPI R24, SEPARATOR_PWM_BASE_FREQ;

BREQ LOAD_SEPARATOR_PWM_BASE_FREQ;

CPI R24, SEPARATOR_PWM_PULSE_WIDTH;

BREQ LOAD_SEPARATOR_PWM_PULSE_WIDTH;

CPI R24, SEPARATOR_SIGNAL_SEND;

BREQ LOAD_SEPARATOR_SIGNAL_SEND;

RJMP WRONG_SEPARATOR_RECEIVED;

LOAD_SEPARATOR_ADDRESS:

LDI R23, 0x01;

RJMP END_OF_PROCESS_SEPARATOR_BYTE;

LOAD_SEPARATOR_RG_ADD1_HIGH:

LDI R23, 0x02;

RJMP END_OF_PROCESS_SEPARATOR_BYTE;

LOAD_SEPARATOR_RG_ADD1_LOW:

LDI R23, 0x03;

RJMP END_OF_PROCESS_SEPARATOR_BYTE;

LOAD_SEPARATOR_DATA1_HIGH:

LDI R23, 0x04;

RJMP END_OF_PROCESS_SEPARATOR_BYTE;

LOAD_SEPARATOR_DATA1_LOW:

LDI R23, 0x05;

RJMP END_OF_PROCESS_SEPARATOR_BYTE;

LOAD_SEPARATOR_PWM_BASE_FREQ:

LDI R23, 0x06;

; Send out SEPARATOR_PWM_BASE_FREQ to the SPI slave

LDI R16, SEPARATOR_PWM_BASE_FREQ;

OUT SPDR, R16;

; Wait for SPI Transmission complete

WAIT_SPI_TX_SEPARATOR_PWM_BASE_FREQ:

IN R16, SPSR;

SBRS R16, SPIF;

RJMP WAIT_SPI_TX_SEPARATOR_PWM_BASE_FREQ;

; Dummy read to clear SPIF flag in SPSR

IN R16, SPDR;

RJMP END_OF_PROCESS_SEPARATOR_BYTE;

LOAD_SEPARATOR_PWM_PULSE_WIDTH:

LDI R23, 0x07;

; Send out SEPARATOR_PWM_PULSE_WIDTH to the SPI slave

LDI R16, SEPARATOR_PWM_PULSE_WIDTH;

OUT SPDR, R16;

; Wait for SPI Transmission complete

WAIT_SPI_TX_SEPARATOR_PWM_PULSE_WIDTH:

IN R16, SPSR;

SBRS R16, SPIF;

RJMP WAIT_SPI_TX_SEPARATOR_PWM_PULSE_WIDTH;

; Dummy read to clear SPIF flag in SPSR

IN R16, SPDR;

RJMP END_OF_PROCESS_SEPARATOR_BYTE;

WRONG_SEPARATOR_RECEIVED:

DEC R22;

CLR R23;

RJMP END_OF_PROCESS_SEPARATOR_BYTE;

LOAD_SEPARATOR_SIGNAL_SEND:

DEC R22;

CLR R23;

RJMP SEND_DATA_TO_I2C_SLAVE;

END_OF_PROCESS_SEPARATOR_BYTE:

RJMP Rx_Complete_ISR_End; ; end of level PROCESS_SEPARATOR_BYTE:

PROCESS_DATA_BYTE:

; Compare the data in R23 with all the possible combinations

; if R23 == 0x01; load data from R7 into R10; --> Address byte (ADB)

; if R23 == 0x02; load data from R7 into R3; --> Byte RG_ADD1_HIGH

; if R23 == 0x03; load data from R7 into R4; --> Byte RG_ADD1_LOW

; if R23 == 0x04; load data from R7 into R5; --> Byte DATA1_HIGH

; if R23 == 0x05; load data from R7 into R6; --> Byte DATA1_LOW

CPI R23, 0x01;

BREQ LOAD_R10_WITH_ADDRESS;

CPI R23, 0x02;

BREQ LOAD_R3_WITH_RG_ADD1_HIGH;

CPI R23, 0x03;

BREQ LOAD_R4_WITH_RG_ADD1_LOW;

CPI R23, 0x04;

BREQ LOAD_R5_WITH_DATA1_HIGH;

CPI R23, 0x05;

BREQ LOAD_R6_WITH_DATA1_LOW;

CPI R23, 0x06;

BREQ LOAD_R12_WITH_PWM_BASE_FREQ;

CPI R23, 0x07;

BREQ LOAD_R11_WITH_PWM_PULSE_WIDTH;

RJMP END_OF_PROCESS_DATA_BYTE;

LOAD_R10_WITH_ADDRESS:

MOV R10, R7;

RJMP END_OF_PROCESS_DATA_BYTE;

LOAD_R3_WITH_RG_ADD1_HIGH:

MOV R3, R7;

RJMP END_OF_PROCESS_DATA_BYTE;

LOAD_R4_WITH_RG_ADD1_LOW:

MOV R4, R7;

RJMP END_OF_PROCESS_DATA_BYTE;

LOAD_R5_WITH_DATA1_HIGH:

MOV R5, R7;

RJMP END_OF_PROCESS_DATA_BYTE;

LOAD_R6_WITH_DATA1_LOW:

MOV R6, R7;

RJMP END_OF_PROCESS_DATA_BYTE;

LOAD_R12_WITH_PWM_BASE_FREQ:

MOV R12, R7;

OUT OCR0B, R12;

; Send out PWM_BASE_FREQ (R12) to the SPI slave

OUT SPDR, R12;

; Wait for SPI Transmission complete

WAIT_SPI_TX_PWM_BASE_FREQ:

IN R16, SPSR;

SBRS R16, SPIF;

RJMP WAIT_SPI_TX_PWM_BASE_FREQ;

; Dummy read to clear SPIF flag in SPSR

IN R16, SPDR;

RJMP END_OF_PROCESS_DATA_BYTE;

LOAD_R11_WITH_PWM_PULSE_WIDTH:

MOV R11, R7;

OUT OCR0A, R11;

; Send out PWM_PULSE_WIDTH (R11) to the SPI slave

OUT SPDR, R11;

; Wait for SPI Transmission complete

WAIT_SPI_TX_PWM_PULSE_WIDTH:

IN R16, SPSR;

SBRS R16, SPIF;

RJMP WAIT_SPI_TX_PWM_PULSE_WIDTH;

; Dummy read to clear SPIF flag in SPSR

IN R16, SPDR;

RJMP END_OF_PROCESS_DATA_BYTE;

END_OF_PROCESS_DATA_BYTE:

RJMP Rx_Complete_ISR_End; ; end of level PROCESS_DATA_BYTE:

; ------ Process the data read on the serial port (END) ----

; ----------------- Send data from R3 (DB1), R4 (DB2), R5 (CB), and R6 (BB) to the I2C slave addressed by R10 (START) -----

SEND_DATA_TO_I2C_SLAVE:

; Load the I2C start condition into R16

LDI R16, (1<<TWEN)|(1<<TWSTA)|(1<<TWINT);

STS TWCR, R16;

; Wait for the START condition to be sent on the line

START_SENT_LOOP:

LDS R16, TWCR;

SBRS R16, TWINT;

RJMP START_SENT_LOOP;

INC R21;

; Read the status code

LDS R16, TWSR;

ANDI R16, 0xF8; Masking out the prescalar bits

CPI R16, I2C_STAT_START_SENT;

BRNE I2C_ERROR_ADDRESS;

; Load the TWDR with SLA+R/W address from R10

MOV R16, R10;

STS TWDR, R16;

; Send out the address by clearing the TWINT bit in TWCR

LDI R16, (1<<TWEN)|(1<<TWINT);

STS TWCR, R16;

; Wait for the address ACK to be received from the slave

WAIT_SLAVE_ADDRESS_ACK:

LDS R16, TWCR;

SBRS R16, TWINT;

RJMP WAIT_SLAVE_ADDRESS_ACK;

INC R21;

; Read the status code

LDS R16, TWSR;

ANDI R16, 0xF8; Masking out the prescalar bits

CPI R16, I2C_STAT_ADDRESS_SENT_ACK_RCVD;

BRNE I2C_ERROR_ADDRESS;

RJMP SEND_DATA_OK;

I2C_ERROR_ADDRESS:

; Disable the TWI interface and let go off the SCL line

LDI R16, (0<<TWEN)|(1<<TWINT);

STS TWCR, R16;

; Turn on Alternating LEDS to indicate I2C error

LDI R20, 0x50;

OR R20, R21;

COM R20;

OUT PORTB, R20;

RJMP Rx_Complete_ISR_End;

SEND_DATA_OK:

; ++++++++++++++++ SENDING R3 BYTE DB1 (START)

; Load the data into TWDR from R3

STS TWDR, R3;

; Send out the data by clearing the TWINT bit in TWCR

LDI R16, (1<<TWEN)|(1<<TWINT);

STS TWCR, R16;

; Wait for the data ACK to be received from the slave

WAIT_SLAVE_DATA_ACK_FOR_R3_DB1:

LDS R16, TWCR;

SBRS R16, TWINT;

RJMP WAIT_SLAVE_DATA_ACK_FOR_R3_DB1;

INC R21;

; Read the status code

LDS R16, TWSR;

ANDI R16, 0xF8; Masking out the prescalar bits

CPI R16, I2C_STAT_DATA_SENT_ACK_RCVD;

BRNE I2C_ERROR;

; ++++++++++++++++ SENDING R3 BYTE DB1 (END)

; ++++++++++++++++ SENDING R4 BYTE DB2 (START)

; Load the data into TWDR from R4

STS TWDR, R4;

; Send out the data by clearing the TWINT bit in TWCR

LDI R16, (1<<TWEN)|(1<<TWINT);

STS TWCR, R16;

; Wait for the data ACK to be received from the slave

WAIT_SLAVE_DATA_ACK_FOR_R4_DB2:

LDS R16, TWCR;

SBRS R16, TWINT;

RJMP WAIT_SLAVE_DATA_ACK_FOR_R4_DB2;

INC R21;

; Read the status code

LDS R16, TWSR;

ANDI R16, 0xF8; Masking out the prescalar bits

CPI R16, I2C_STAT_DATA_SENT_ACK_RCVD;

BRNE I2C_ERROR;

; ++++++++++++++++ SENDING R4 BYTE DB2 (END)

; ++++++++++++++++ SENDING R5 BYTE CB (START)

; Load the data into TWDR from R5

STS TWDR, R5;

; Send out the data by clearing the TWINT bit in TWCR

LDI R16, (1<<TWEN)|(1<<TWINT);

STS TWCR, R16;

; Wait for the data ACK to be received from the slave

WAIT_SLAVE_DATA_ACK_FOR_R5_CB:

LDS R16, TWCR;

SBRS R16, TWINT;

RJMP WAIT_SLAVE_DATA_ACK_FOR_R5_CB;

INC R21;

; Read the status code

LDS R16, TWSR;

ANDI R16, 0xF8; Masking out the prescalar bits

CPI R16, I2C_STAT_DATA_SENT_ACK_RCVD;

BRNE I2C_ERROR;

; ++++++++++++++++ SENDING R5 BYTE CB (END)

; ++++++++++++++++ SENDING R6 BYTE BB (START)

; Load the data into TWDR from R6

STS TWDR, R6;

; Send out the data by clearing the TWINT bit in TWCR

LDI R16, (1<<TWEN)|(1<<TWINT);

STS TWCR, R16;

; Wait for the data ACK to be received from the slave

WAIT_SLAVE_DATA_ACK_FOR_R6_BB:

LDS R16, TWCR;

SBRS R16, TWINT;

RJMP WAIT_SLAVE_DATA_ACK_FOR_R6_BB;

INC R21;

; Read the status code

LDS R16, TWSR;

ANDI R16, 0xF8; Masking out the prescalar bits

CPI R16, I2C_STAT_DATA_SENT_ACK_RCVD;

BRNE I2C_ERROR;

; ++++++++++++++++ SENDING R6 BYTE BB (END)

; Send a stop condition on the line

LDI R16, (1<<TWEN)|(1<<TWINT)|(1<<TWSTO);

STS TWCR, R16;

RJMP Rx_Complete_ISR_End;

I2C_ERROR:

; Disable the TWI interface and let go off the SCL line

LDI R16, (0<<TWEN)|(1<<TWINT);

STS TWCR, R16;

; Turn on Alternating LEDS to indicate I2C error

LDI R20, 0x50;

OR R20, R21;

COM R20;

OUT PORTB, R20;

RJMP Rx_Complete_ISR_End;

; ----------------- Send data from R3 (DB1), R4 (DB2), R5 (CB), and R6 (BB) to the I2C slave addressed by R10 (END) -------

Rx_Complete_ISR_End:

RETI;

; For the pulse width counter

OC0Aaddr_ISR:

; Turn off the pulse on portB5

CBI PORTB, PORTB5;

RETI;

; For the base frequency counter

OC0Baddr_ISR:

; Stop the timer

CLR R16;

OUT TCCR0B, R16;

; Clear the timer

OUT TCNT0, R16;

; Turn on the pulse on portB5

SBI PORTB, PORTB5;

; Load the prescalar and start the Timer

LDI R18, (0<<CS02)|(0<<CS01)|(1<<CS00);

OUT TCCR0B, R18;

RETI;

;------------------------------ END OF FILE ---------------------

Draft Assembly Code for ATTINY261:

.include "tn261def.inc"

;++++++++++++++++++++++++++++++++++++++++++++

; I/O Assignments

; Swap the SPI default port operation from PortB to PortA using USIPP

; PA0 = Input, DI, MISO

; PA1 = Output, DO, MOSI

; PA2 = Input, SCK

; PORTB(PB3-PB0) AND PORTA(PA7-PA4) as the debug output

;

; -------- SPI MESSAGE DECODE (START) ------

; R20 = Last bit of R20 indicates the current received byte is a separator (if 1) or data (if 0)

; R21 = Indicates which register to load with (R11 or R12)

; -------- SPI MESSAGE DECODE (END) --------

;

; ------- PWM SETUP TIMER-1 (START) --------

; OCR1C = Base frequency (R12)

; OCR1A = Pulse width (R11)

; ------- PWM SETUP TIMER-1 (END) ----------

;++++++++++++++++++++++++++++++++++++++++++++

.CSEG

.ORG 0x0000

RJMP RESET;

.ORG USI_OVFaddr

RJMP USI_OVFaddr_ISR; indicates that a byte has been received over the SPI

.EQU SEPARATOR_PWM_BASE_FREQ = 0x51;

.EQU SEPARATOR_PWM_PULSE_WIDTH = 0x52;

RESET:

; Setup stack pointer

LDI R17, high(RAMEND);

LDI R16, low(RAMEND);

;OUT SPH, R17;

OUT SPL, R16;

;+++++++++++++ I/O setup (START) +++++++++++

; Setup PORTA PA2:PA0 for the SPI communication(PA2->I, PA1->O; PA0->I)

CLR R16;

OUT DDRA, R16;

SBI DDRA, 1;

; Setup PortB PB3-PB0 as the debug output

LDI R16, 0x0F;

OUT DDRB, R16;

; Setup PortB PA7-PA4 as the debug output

SBI DDRA, 7;

SBI DDRA, 6;

SBI DDRA, 5;

SBI DDRA, 4;

; Initally set all output ports to zeros

CBI PORTB, 0;

CBI PORTB, 1;

CBI PORTB, 2;

CBI PORTB, 3;

CBI PORTA, 4;

CBI PORTA, 5;

CBI PORTA, 6;

CBI PORTA, 7;

;+++++++++++++ I/O setup (END) +++++++++++++

; ++++++++++++ SETUP SPI USING USI FROM EXTERNAL CLOCK (START) ++++++++++++++

; Swap the SPI default port operation from PortB to PortA using USIPP

SBI USIPP, 0;

; Enable counter-overflow interrupt

;LDI R16, (1<<USIOIE)|(1<<USIWM0)|(1<<USICLK);

LDI R16, (1<<USIOIE)|(1<<USIWM0)|(1<<USICS1);

OUT USICR, R16;

; Clear the counter-overflow flag by writing 1 to USIOIF of USISR register

LDI R16, (1<<USIOIF);

OUT USISR, R16;

; ++++++++++++ SETUP SPI USING USI FROM EXTERNAL CLOCK (START) ++++++++++++++

; +++++++++++++++ TIMER1-PWM SETUP (START) ++++++++++++

; Enable PLL for the MCU

LDI R16, (1<<PLLE);

OUT PLLCSR, R16;

; Wait for PLL to lock (~100ms)

WAIT_FOR_PLL_LOCK:

IN R16, PLLCSR;

SBRS R16, PLOCK;

RJMP WAIT_FOR_PLL_LOCK;

; Set FAST-PWM mode; Clear OC1A(PB1) on compare match

LDI R16, (1<<COM1A0)|(1<<PWM1A);

OUT TCCR1A, R16;

; Set the base frequency OCR1C (R12) to the top value 0xFF

SER R16;

MOV R12, R16;

OUT OCR1C, R12;

; Set the base frequency OCR1A (R11) to the half of maximum 0x0F

LDI R16, 0x0F;

MOV R11, R16;

OUT OCR1A, R11;

; Start off TIMER-1 by setting the prescalar in TCCR1B

LDI R16, (1<<CS10); No prescaling-> Full Speed

OUT TCCR1B, R16;

; +++++++++++++++ TIMER1-PWM SETUP (END) ++++++++++++++

; ++++++++++++ SPI MESSAGE DECODER SETUP (START) +++++++

CLR R20;

; ++++++++++++ SPI MESSAGE DECODER SETUP (END) +++++++++

; Enable interrupts and go

SEI;

MASTER_LOOP1:

RJMP MASTER_LOOP1;

RET;

USI_OVFaddr_ISR: ; use R16 and R17 as the temporary registers

; Read the data from USIDR into R18;

IN R18, USIDR;

; Clear the counter-overflow flag by writing 1 to USIOIF of USISR register

LDI R17, (1<<USIOIF);

OUT USISR, R17;

; Process the rest of the data here

INC R20; Separator or data indicator; if the LSB is 1, received byte is a separator or data otherwise

MOV R16, R20;

ANDI R16, 0x01;

CPI R16, 0x00;

BREQ LOAD_DATA;

; Load Separator here and check which separator was received

MOV R16, R18;

CPI R16, SEPARATOR_PWM_BASE_FREQ;

BREQ LOAD_SEPARATOR_PWM_BASE_FREQ;

MOV R16, R18;

CPI R16, SEPARATOR_PWM_PULSE_WIDTH;

BREQ LOAD_SEPARATOR_PWM_PULSE_WIDTH;

; Wrong Separator received; try again

CLR R20;

CLR R21;

RJMP END_OF_USI_OVFaddr_ISR;

LOAD_SEPARATOR_PWM_BASE_FREQ:

LDI R21, 0x01; Load next byte into R12 for the base frequency (OCR1C)

RJMP END_OF_USI_OVFaddr_ISR;

LOAD_SEPARATOR_PWM_PULSE_WIDTH:

LDI R21, 0x02; Load next byte into R11 for the pulse width (OCR1A)

RJMP END_OF_USI_OVFaddr_ISR;

LOAD_DATA:

; Check with register to load

MOV R16, R21;

CPI R16, 0x01;

BREQ LOAD_BASE_FREQ_DATA_INTO_R12;

; Check with register to load

MOV R16, R21;

CPI R16, 0x02;

BREQ LOAD_PULSE_WIDTH_DATA_INTO_R11;

; Else if jump to end

RJMP END_OF_USI_OVFaddr_ISR;

LOAD_BASE_FREQ_DATA_INTO_R12:

MOV R12, R18;

RJMP END_OF_LOAD_DATA;

LOAD_PULSE_WIDTH_DATA_INTO_R11:

MOV R11, R18;

RJMP END_OF_LOAD_DATA;

END_OF_LOAD_DATA:

; Stop the PWM TIMER-1

CLR R16;

OUT TCCR1B, R16;

; Update the base frequency

OUT OCR1C, R12;

; Update the pulse width

OUT OCR1A, R11;

; Restart the TIMER-1

LDI R16, (1<<CS10);

OUT TCCR1B, R16;

RJMP END_OF_USI_OVFaddr_ISR;

END_OF_USI_OVFaddr_ISR:

; Debug Display upper 4 nibble at PORTA(PA7-PA4)

;MOV R18, R16;

;ANDI R18, 0xF0;

;OUT PORTA, R18;

RETI;

;-------------------------------- END OF FILE -------------------

PWM Controller Design with AVR Microcontroller

2011-01-07T13:43:00.000-08:00

Objective: Design a Pulse Width Modulation (PWM) controller with 3.0 MHz base frequency

Requirements:

Pulse width needs to be adjustable for a 3.0 MHz signal (the base frequency)
Pulses must be less than 100.0 nanoseconds wide
When the PWM output is activated, the number of pulses for a specified pulse width needs to be adjustable

Hardware:

20.0 MHz AVR ATTINY261 MCU (http://www.atmel.com/dyn/products/product_card.asp?PN=ATtiny261)
NAND Logic Gates
5.0 V Power Supply
20.0 MHz Crystal Oscillator
Resistors
Capacitors
Switches

Circuit Schematic:

S1 input switch:

MSB 7	6	5	4	3	2	1	LSB 0
E	C2	C1	C0	W3	W2	W1	W0

E = Enable input (enables the rest of the input pins)

C2 - C0 = Pulse Count Control Bits

W3 - W0 = Pulse Width Control Bits

Pulse Width Control Bits of S1 Switch:

Switch ON = 1

Switch OFF = 0

Base Frequency at PWM_OUT = 3MHz
W3	W2	W1	W0	Pulse Width in nanoseconds
0	0	0	0	0
0	0	0	1	30
0	0	1	0	46
0	0	1	1	62
0	1	0	0	78
0	1	0	1	94
0	1	1	0	110
0	1	1	1	124
1	0	0	0	140
1	0	0	1	156
1	0	1	0	172
1	0	1	1	188
1	1	0	0	204
1	1	0	1	220
1	1	1	0	236
1	1	1	1	252

The rows highlighted in green contain acceptable pulse widths.

Pulse Count Control Bits of S1 Switch (can be reprogrammed):

Switch ON = 1

Switch OFF = 0

Base Frequency at PWM_OUT = 3MHz
C2	C1	C0	Pulse Count N	Time for N Pulses at 3MHz in microseconds
0	0	0	282	94.0
0	0	1	236	78.7
0	1	0	190	63.3
0	1	1	142	47.3
1	0	0	96	32.0
1	0	1	48	16.0
1	1	0	24	8.0
1	1	1	13	4.3

Output signals:

PWM_OUT = PWM signal with a base frequency of 3MHz

BUSY_OUT = BUSY_OUT stays HIGH until N number of pulses (defined by C2-C0 of S1 switch) have been generated at the PWM_OUT pin

ATTINY261 Assembly Code (Compiled with AVR Studio 4)

;++++++++++++++++++++++++

;I/O:

; PB3-PB0 = Output

; PB7-PB4 = Input

; PA7-PA0 = Input

;Special I/O:

; PB3 = Busy Output

; PB1 = PWM Output

; PA7 = PWM enable input

; ----------- Registers ----------

; R20 = Flags that a counting sequence has already began by 1 and 0 Otherwise

; R21 = Clock for PWM (Timer1)

; R22 = Clock for Timer0

; R23 = Always Set to 0 to reset the clocks on interrupts

; R24 = Always holds 0x01 for PORTB (Reset value for PORTB)

; R5 = PinID on PortB for Busy Signal

; R10 = Loaded with 0x0F for duty cycle selection

; R11 = Loaded with 0x07 for pulse count selection

;++++++++++++++++++++++++

.include "tn261def.inc"

.DSEG

Pulse_Count: .BYTE 16

.CSEG

.org 0x0000

RJMP RESET;

.org OC0Aaddr

RJMP Output_Match0_ISR;

RESET:

; Load the stack pointer

LDI R16, LOW(RAMEND);

LDI R17, HIGH(RAMEND);

OUT SPL, R16;

;-------- Register Initialization -----------

LDI R20, 0x00;

LDI R21, (1<<CS10);

LDI R22, (1<<CS00);

CLR R23;

CLR R24;

LDI R16, 0x08;

MOV R5, R16;

LDI R16, 0x0F;

MOV R10, R16;

LDI R16, 0x07;

MOV R11, R16;

;------------------- Input/Output Setup (Start) ----------------------

; Set PB3-PB0 = Output

LDI R16, (1<<PB3)|(1<<PB2)|(1<<PB1)|(1<<PB0);

OUT DDRB, R16;

LDI R16, 0x02;

OUT PORTB, R16;

; Set PA7-PA0 = Input

LDI R16, 0x00;

OUT DDRA, R16;

; Set Initial output to PWM (PB1) line to 5 volts --> in R23

LDI R24, 0x01;

;------------------- Input/Output Setup (End) ----------------------

;------------------ Pulse_Count Initialization (START) ----------------

; Load the base address of Pulse_Count into Z registers (R31:R30) = (H:L)

LDI R30, low(Pulse_Count);

LDI R31, high(Pulse_Count);

;Load 0x0753 (Low Byte First)

LDI R16, 0x53;

ST Z+, R16;

LDI R17, 0x07;

ST Z+, R17;

;Load 0x061B (Low Byte First)

LDI R16, 0x1B;

ST Z+, R16;

LDI R17, 0x06;

ST Z+, R17;

;Load 0x04E2 (Low Byte First)

LDI R16, 0xE2;

ST Z+, R16;

LDI R17, 0x04;

ST Z+, R17;

;Load 0x03AA (Low Byte First)

LDI R16, 0xAA;

ST Z+, R16;

LDI R17, 0x03;

ST Z+, R17;

;Load 0x0271 (Low Byte First)

LDI R16, 0x71;

ST Z+, R16;

LDI R17, 0x02;

ST Z+, R17;

;Load 0x0139 (Low Byte First)

LDI R16, 0x39;

ST Z+, R16;

LDI R17, 0x01;

ST Z+, R17;

;Load 0x009C (Low Byte First)

LDI R16, 0x9C;

ST Z+, R16;

LDI R17, 0x00;

ST Z+, R17;

;Load 0x004E (Low Byte First)

LDI R16, 0x4E;

ST Z+, R16;

LDI R17, 0x00;

ST Z, R17;

;Reset Z to base address of Pulse_Count

LDI R30, low(Pulse_Count);

LDI R31, high(Pulse_Count);

;------------------ Pulse_Count Initialization (END) ------------------

;------------------- Setup Timer 0 (START) -------------------------

; Set the width of the counter to 16

LDI R16, (1<<TCW0);

OUT TCCR0A, R16;

; Set the output compare value to 1875d = 0x0753--- (1875 x 3.2 = 6000)

LDI R17, 0x07;

LDI R16, 0x53;

OUT OCR0B, R17; Write the High Byte

OUT OCR0A, R16; Write the Low Byte

; Enable Output compare match A

LDI R16, (1<<OCIE0A);

OUT TIMSK, R16;

;------------------- Setup Timer 0 (END) -------------------------

;---------------------- Setup Timer 1 (START) ----------------------

; Enable PLL for the peripheral clock..

LDI R16, (1<<PLLE);

OUT PLLCSR, R16;

;Wait of PLL to LOCK

WaitLock:

IN R16, PLLCSR;

SBRS R16, PLOCK;

RJMP WaitLock;

; Set PLL as the PWM or the peripheral clock source (PCLK)

IN R16, PLLCSR;

LDI R17, (1<<PCKE);

OR R16, R17;

OUT PLLCSR, R16;

; Enable PWM1A and toggle OC1A on match

;LDI R16, (1<<COM1A0)|(1<<PWM1A);

LDI R16, (1<<COM1A0)|(1<<PWM1A);

OUT TCCR1A, R16;

; Set Output Compare match value..--> sets the base frequency for 3MHz

LDI R16, 0x14;

OUT OCR1C, R16;

; Set the duty cycle.. 0x7F = 127 for 50%

LDI R16, 0x04;

OUT OCR1A, R16;

; Set the prescalar time.. then go..

;LDI R16, (1<<CS10);

;OUT TCCR1B, R16;

;---------------------- Setup Timer 1 (END) ----------------------

;Enable Interrupts

SEI;

; Turn off Busy Signal..

OUT PORTB, R24;

; In the Loop, Do the following..

; 1. Check R20 to see if a counting sequence is in progress; if so loop again, otherwise goto 2

; 2. Read PortA and if a correct input is found, start the sequence, Set Busy signal to high

LOOP1:

; Check R20

SBRC R20, 0;

RJMP LOOP1;

; Turn off Busy Signal..

OUT PORTB, R24;

IN R18, PINA;

SBRS R18, 7; For STK500

;SBRC R18, 7; For prototype PCB

RJMP START_PWM;

RJMP LOOP1;

START_PWM:

; Move R19 <- R18

MOV R19, R18;

; Complement R19

COM R19;

; ---- Set the duty cycle from R19 (START) ------

; Move R19 into R8

MOV R8, R19;

; Select the last 4 bits (R10 = 0x0F)

AND R8, R10;

; Load duty cycle value into OCR1A

OUT OCR1A, R8;

; ---- Set the duty cycle from R19 (END) --------

;----- Set the Pulse_Count from R19 into OCR0B/OCR0A (START) ----

; Set Z register to the base address

LDI R30, low(Pulse_Count);

LDI R31, high(Pulse_Count);

; Move R19 into R9

MOV R9, R19;

;Swap R9

SWAP R9;

; Keep last 3 bits in R9

AND R9, R11;

; Multiply Location counter by 2

LSL R9;

; Clear Carry

CLC;

; Calculate address into Z register to get the Pulse_Counter from R9;

ADD R30, R9;

ADC R31, R23;

; Load pulse counter from memory into R16 (low byte) and R17 (high byte)

LD R16, Z+;

LD R17, Z;

; Set 16-bit output compare match value of timer-0

OUT OCR0B, R17; High byte

OUT OCR0A, R16; Low byte

;----- Set the Pulse_Count from R19 into OCR0B/OCR0A (END) ------

; Set Busy Signal

OUT PORTB, R5;

; Set R20 to (1 = R5)

LDI R20, 0x01;

; Start Timer-0

OUT TCCR0B, R22;

; Start Timer-1;

OUT TCCR1B, R21;

RJMP LOOP1;

Output_Match0_ISR:

;; Stop Timer-0;

OUT TCCR0B, R23;

;; Stop Timer-1;

OUT TCCR1B, R23;

; Turn off Busy Signal..

OUT PORTB, R24;

; Set R20 to 0

CLR R20;

; Clear Timer 0 register..

CLR R17;

CLR R16;

OUT TCNT0H, R17;

OUT TCNT0L, R16;

; Clear Timer 1 register..

OUT TCNT1, R16;

RETI;

-------------------------------------- Results Section -----------------------------------------------------------

> To be updated