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	<title>GeeksQuiz</title>
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	<description>Computer Science Quizzes for Geeks !</description>
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		<title>Half Adder and Half Subtractor using NAND NOR gates</title>
		<link>http://cdngquiz.geeksforgeeks.org/half-adder-half-subtractor-using-nand-nor-gates/</link>
		<comments>http://cdngquiz.geeksforgeeks.org/half-adder-half-subtractor-using-nand-nor-gates/#comments</comments>
		<pubDate>Tue, 21 Mar 2017 13:09:51 +0000</pubDate>
		<dc:creator><![CDATA[Special Geeks]]></dc:creator>
				<category><![CDATA[Digital Electronic]]></category>

		<guid isPermaLink="false">http://cdngquiz.geeksforgeeks.org/?p=32531</guid>
		<description><![CDATA[<p>Implementation of Half Adder using NAND gates : Total 5 NAND gates are required to implement half adder. Implementation of Half Adder using NOR gates : Total 5 NOR gates are required to implement half adder. Implementation of Half Subtractor using NAND gates : Total 5 NAND gates are required to implement half subtractor. Implementation… <span class="read-more"><a href="http://cdngquiz.geeksforgeeks.org/half-adder-half-subtractor-using-nand-nor-gates/">Read More &#187;</a></span></p>
<p>The post <a rel="nofollow" href="http://cdngquiz.geeksforgeeks.org/half-adder-half-subtractor-using-nand-nor-gates/">Half Adder and Half Subtractor using NAND NOR gates</a> appeared first on <a rel="nofollow" href="http://cdngquiz.geeksforgeeks.org">GeeksQuiz</a>.</p>
]]></description>
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		<title>Full Adder &#124; Digital Electronics</title>
		<link>http://cdngquiz.geeksforgeeks.org/full-adder-digital-electronics/</link>
		<comments>http://cdngquiz.geeksforgeeks.org/full-adder-digital-electronics/#comments</comments>
		<pubDate>Tue, 21 Mar 2017 13:06:12 +0000</pubDate>
		<dc:creator><![CDATA[Dheerendra Singh]]></dc:creator>
				<category><![CDATA[Digital Electronic]]></category>

		<guid isPermaLink="false">http://cdngquiz.geeksforgeeks.org/?p=32553</guid>
		<description><![CDATA[<p>Full Adder is the adder which adds three inputs and produces two outputs. The first two inputs are A and B and the third input is an input carry as C-IN. The output carry is designated as C-OUT and the normal output is designated as S which is SUM. A full adder logic is designed… <span class="read-more"><a href="http://cdngquiz.geeksforgeeks.org/full-adder-digital-electronics/">Read More &#187;</a></span></p>
<p>The post <a rel="nofollow" href="http://cdngquiz.geeksforgeeks.org/full-adder-digital-electronics/">Full Adder | Digital Electronics</a> appeared first on <a rel="nofollow" href="http://cdngquiz.geeksforgeeks.org">GeeksQuiz</a>.</p>
]]></description>
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		<title>Multiplexers &#124; Digital Electronics</title>
		<link>http://cdngquiz.geeksforgeeks.org/multiplexers-digital-electronics/</link>
		<comments>http://cdngquiz.geeksforgeeks.org/multiplexers-digital-electronics/#comments</comments>
		<pubDate>Tue, 21 Mar 2017 12:59:19 +0000</pubDate>
		<dc:creator><![CDATA[Dheerendra Singh]]></dc:creator>
				<category><![CDATA[Digital Electronic]]></category>

		<guid isPermaLink="false">http://cdngquiz.geeksforgeeks.org/?p=32450</guid>
		<description><![CDATA[<p>It is a combinational circuit which have many data inputs and single output depending on control or select inputs.​ For N input lines, log n (base2) selection lines, or we can say that for 2n input lines, n selection lines are required. Multiplexers are also known as “Data n selector, parallel to serial convertor, many… <span class="read-more"><a href="http://cdngquiz.geeksforgeeks.org/multiplexers-digital-electronics/">Read More &#187;</a></span></p>
<p>The post <a rel="nofollow" href="http://cdngquiz.geeksforgeeks.org/multiplexers-digital-electronics/">Multiplexers | Digital Electronics</a> appeared first on <a rel="nofollow" href="http://cdngquiz.geeksforgeeks.org">GeeksQuiz</a>.</p>
]]></description>
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		<title>Synchronous Sequential Circuits &#124; Digital Logic</title>
		<link>http://cdngquiz.geeksforgeeks.org/synchronous-sequential-circuits/</link>
		<comments>http://cdngquiz.geeksforgeeks.org/synchronous-sequential-circuits/#comments</comments>
		<pubDate>Wed, 08 Mar 2017 13:09:40 +0000</pubDate>
		<dc:creator><![CDATA[Dheerendra Singh]]></dc:creator>
				<category><![CDATA[Digital Electronic]]></category>

		<guid isPermaLink="false">http://cdngquiz.geeksforgeeks.org/?p=31794</guid>
		<description><![CDATA[<p>Steps to solve a problem: 1. Draw the state diagram from the problem statement or from the given state table. Example: Serial Adder. The functioning of serial adder can be depicted by the following state diagram. X1 and X2 are inputs, A and B are states representing carry. 2. Draw the state table. If there… <span class="read-more"><a href="http://cdngquiz.geeksforgeeks.org/synchronous-sequential-circuits/">Read More &#187;</a></span></p>
<p>The post <a rel="nofollow" href="http://cdngquiz.geeksforgeeks.org/synchronous-sequential-circuits/">Synchronous Sequential Circuits | Digital Logic</a> appeared first on <a rel="nofollow" href="http://cdngquiz.geeksforgeeks.org">GeeksQuiz</a>.</p>
]]></description>
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		<title>Floating Point Representation &#124; Digital Logic</title>
		<link>http://cdngquiz.geeksforgeeks.org/floating-point-representation-digital-logic/</link>
		<comments>http://cdngquiz.geeksforgeeks.org/floating-point-representation-digital-logic/#comments</comments>
		<pubDate>Wed, 08 Mar 2017 13:01:58 +0000</pubDate>
		<dc:creator><![CDATA[Dheerendra Singh]]></dc:creator>
				<category><![CDATA[Digital Logic]]></category>

		<guid isPermaLink="false">http://cdngquiz.geeksforgeeks.org/?p=31802</guid>
		<description><![CDATA[<p>1. To convert the floating point into decimal, we have 3 elements in a 32-bit floating point representation: &#160; &#160; i) Sign &#160; &#160; ii) Exponent &#160; &#160; iii) Mantissa Sign bit is the first bit of the binary representation. &#39;1&#39; implies negative number and &#39;0&#39; implies positive number. Example: 11000001110100000000000000000000 This is negative number.… <span class="read-more"><a href="http://cdngquiz.geeksforgeeks.org/floating-point-representation-digital-logic/">Read More &#187;</a></span></p>
<p>The post <a rel="nofollow" href="http://cdngquiz.geeksforgeeks.org/floating-point-representation-digital-logic/">Floating Point Representation | Digital Logic</a> appeared first on <a rel="nofollow" href="http://cdngquiz.geeksforgeeks.org">GeeksQuiz</a>.</p>
]]></description>
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		<title>Leaky Bucket Algorithm&#124; Computer Networks</title>
		<link>http://cdngquiz.geeksforgeeks.org/leaky-bucket-algorithm/</link>
		<comments>http://cdngquiz.geeksforgeeks.org/leaky-bucket-algorithm/#comments</comments>
		<pubDate>Wed, 08 Mar 2017 12:56:02 +0000</pubDate>
		<dc:creator><![CDATA[Dheerendra Singh]]></dc:creator>
				<category><![CDATA[Computer Networks]]></category>

		<guid isPermaLink="false">http://cdngquiz.geeksforgeeks.org/?p=31810</guid>
		<description><![CDATA[<p>To understand this concept first we have to know little about traffic shaping. Traffic Shaping : This is a mechanism to control the amount and the rate of the traffic sent to the network. Two techniques can shape traffic: Leaky Bucket Token Bucket. Suppose we have a bucket in which we are pouring water in… <span class="read-more"><a href="http://cdngquiz.geeksforgeeks.org/leaky-bucket-algorithm/">Read More &#187;</a></span></p>
<p>The post <a rel="nofollow" href="http://cdngquiz.geeksforgeeks.org/leaky-bucket-algorithm/">Leaky Bucket Algorithm| Computer Networks</a> appeared first on <a rel="nofollow" href="http://cdngquiz.geeksforgeeks.org">GeeksQuiz</a>.</p>
]]></description>
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