<?xml version="1.0" encoding="UTF-8"?>
<?xml-stylesheet type="text/xsl" media="screen" href="/~d/styles/rss2full.xsl"?><?xml-stylesheet type="text/css" media="screen" href="http://feeds.feedburner.com/~d/styles/itemcontent.css"?><!-- Generated on Sat, 21 Nov 2009 19:07:28 -0800 --><rss xmlns:atom="http://www.w3.org/2005/Atom" xmlns:feedburner="http://rssnamespace.org/feedburner/ext/1.0" version="2.0">
  <channel>
    
    <title>Intel Software Network - Main Articles Feed</title>
    <link>http://software.intel.com/en-us/articles/all</link>
    <description>Feed of all the articles posted on the main page of Intel Software Network.</description>
    <language>en-us</language>
    <atom10:link xmlns:atom10="http://www.w3.org/2005/Atom" rel="self" href="http://feeds.feedburner.com/ISNMain" type="application/rss+xml" /><feedburner:emailServiceId>ISNMain</feedburner:emailServiceId><feedburner:feedburnerHostname>http://feedburner.google.com</feedburner:feedburnerHostname><atom10:link xmlns:atom10="http://www.w3.org/2005/Atom" rel="hub" href="http://pubsubhubbub.appspot.com" /><item>
      <title>BIND(C) does not work for COMPLEX </title>
      <description>&lt;br /&gt;
&lt;div id="art_pre_template"&gt;&lt;strong&gt;Reference Number :&lt;/strong&gt; dpd200049725&lt;br /&gt;&lt;br /&gt;&lt;br /&gt;&lt;strong&gt;Version :&lt;/strong&gt; 10.0,10.1,11.0,11.1&lt;br /&gt;&lt;br /&gt;&lt;strong&gt;Product : &lt;/strong&gt;Intel Fortran Compiler, Professional Edition&lt;br /&gt;&lt;br /&gt;&lt;br /&gt;&lt;strong&gt;Operating System : &lt;/strong&gt;Linux&lt;br /&gt;&lt;br /&gt;&lt;br /&gt;&lt;b&gt;Problem Description : &lt;/b&gt;&lt;br /&gt;The Intel Fortran compiler uses an additional, hidden argument to return the result of a function of type COMPLEX. Adding the BIND(C) attribute to the function declaration should cause the result to be returned by value, in accordance with the x64 ABI, so that the function becomes interoperable with the Intel and GNU C compilers. Currently, it does not.&lt;br /&gt;&lt;br /&gt;&lt;strong&gt;Resolution Status :  &lt;/strong&gt;This may be fixed in a future version of the Intel compiler&lt;br /&gt;&lt;br /&gt;&lt;br /&gt;&lt;br /&gt;&lt;i&gt;[DISCLAIMER: The information on this web site is intended for hardware system manufacturers and software developers. Intel does not warrant the accuracy, completeness or utility of any information on this site. Intel may make changes to the information or the site at any time without notice. Intel makes no commitment to update the information at this site. ALL INFORMATION PROVIDED ON THIS WEBSITE IS PROVIDED "as is" without any express, implied, or statutory warranty of any kind including but not limited to warranties of merchantability, non-infringement of intellectual property, or fitness for any particular purpose. Independent companies manufacture the third-party products that are mentioned on this site. Intel is not responsible for the quality or performance of third-party products and makes no representation or warranty regarding such products. The third-party supplier remains solely responsible for the design, manufacture, sale and functionality of its products. Intel and the Intel logo are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. *Other names and brands may be claimed as the property of others.]&lt;/i&gt;&lt;/div&gt;&lt;img src="http://feeds.feedburner.com/~r/ISNMain/~4/17tXfNev_u0" height="1" width="1"/&gt;</description>
      <link>http://feedproxy.google.com/~r/ISNMain/~3/17tXfNev_u0/BIND_C-does-not-work-for-complex</link>
      <pubDate>Fri, 20 Nov 2009 13:00:50 -0800</pubDate>
      <comments>http://software.intel.com/en-us/articles/BIND_C-does-not-work-for-complex#comments</comments>
      <guid isPermaLink="false">http://software.intel.com/en-us/articles/BIND_C-does-not-work-for-complex</guid>
      <category>Intel® Fortran Compiler for Linux* Knowledge Base</category>
      <category>Intel® Fortran Compiler for Mac OS X* Knowledge Base</category>
    <feedburner:origLink>http://software.intel.com/en-us/articles/BIND_C-does-not-work-for-complex</feedburner:origLink></item>
    <item>
      <title>Interview with Anatoliy Kuznetsov, the author of BitMagic C++ Library</title>
      <description>&lt;h2&gt;Abstract&lt;/h2&gt;
&lt;p&gt;In this article, Anatoliy Kuznetsov answers the questions and tells us about the open BitMagic C++ Library.&lt;/p&gt;
&lt;h2&gt;Introduction&lt;/h2&gt;
&lt;p&gt;In my regular browsing  through 64-bit programming related websites, I often came across references to  BitMagic C++ Library and realized that it had benefited a lot from using  64-bits. I decided to contact the author asking him to give us an interview  about his research and developments.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Questions are asked by: Andrey Karpov&lt;/strong&gt; - in-house developer at OOO "Program Verification Systems currently"  working on  &lt;a href="http://www.viva64.com/pvs-studio/"&gt;PVS-Studio&lt;/a&gt; tool designed for verification modern C++  applications.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;The answers are given by: Anatoliy Kuznetsov&lt;/strong&gt; - chief software engineer at NCBI; developer of the  open source  &lt;a href="http://bmagic.sourceforge.net/"&gt;BitMagic C++ Library&lt;/a&gt;.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Anatoliy, please tell us a few words about  yourself. What projects are you involved in?&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;I am a chief software  engineer, at present I am working for the bio-molecular data discovery and  visualization team at &lt;a href="http://www.ncbi.nlm.nih.gov/"&gt;NCBI&lt;/a&gt; (National  Center for Biotechnology Information). Apart from my primary job, I am the  chief developer and architect of the open-source BitMagic C++ Library.&lt;/p&gt;
&lt;p&gt;I am a planning  engineer by education, a graduate of the Lobachevskiy University of Nizhniy  Novgorod.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;What is BitMagic?&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;BitMagic has been developed  as a universal template library for processing compressed bit vectors. The  library solves several tasks:&lt;/p&gt;
&lt;p&gt;It provides a bit container which is really  compatible with STL in terms of ideology. It means that such container must  support iterators, memory allocators and interact with algorithms and other STL  containers.&lt;/p&gt;
&lt;p&gt;The library can efficiently operate on very  long and sparse vectors.&lt;/p&gt;
&lt;p&gt;It enables the serialization vectors for  further writing to a database or sending them over a network.&lt;/p&gt;
&lt;p&gt;A developer is provided with a set of  algorithms to implement set-theory operations and calculate distances and  similarity metrics in multidimensional binary spaces.&lt;/p&gt;
&lt;p&gt;Much consideration is given to optimization for  popular fast calculation systems such as &lt;a href="http://www.viva64.com/go.php?url=272"&gt;SSE&lt;/a&gt;.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;What tasks addressed by BitMagic make it so  attractive for developers?&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;The library turned out  to be fairly a one-stop solution and apparently it won’t be easy to list all its  possible applications. At present, the library offers more compelling results in  the following spheres:&lt;/p&gt;
&lt;p&gt;Bit and inverted indexes building for full-text  search systems, acceleration of relational algebra operations (AND, OR, JOIN  etc).&lt;/p&gt;
&lt;p&gt;Development of non-standard extensions and  indexes for existing databases (Oracle Cartridges, MS SQL extended stored  procedures). Generally, such extensions help integrate scientific, geographic  and other non-standard data into the database.&lt;/p&gt;
&lt;p&gt;Data mining algorithms development.&lt;/p&gt;
&lt;p&gt;In-memory indexes and databases development.&lt;/p&gt;
&lt;p&gt;Development of precise access isolation systems  with a large number of objects (security enhanced databases with the isolation of  access to specific fields and columns).&lt;/p&gt;
&lt;p&gt;Task management systems (for the computation  cluster), real-time task state tracking systems, and the storage of task states  described as Finite State Machines.&lt;/p&gt;
&lt;p&gt;Tasks related to the representation and storage  of strongly connected graphs.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;What can you tell about the history of BitMagic  development? What motivated you to create it?&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;For a long time my  colleagues and I had worked on tasks related to large databases, analysis and  visualization systems. The initial working version demonstrating bit-vector capabilities  was produced by Maxim Shemanaryov (he is the developer of Antigrain Geometry, a  wonderful 2D vector graphics library: &lt;a href="http://www.antigrain.com"&gt;http://www.antigrain.com&lt;/a&gt;). Then, some ideas for an equivalent  representation of data sets were described by Koen Van Damm, an engineer from  Europe, who worked on programming language parsers for the verification of complex  systems. There were other sources as well. I decided to bring them all together  in the form of a library suitable for repeated use in various projects.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;What license BitMagic is distributed under?  Where I can download it?&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;The library is free  for commercial and non-commercial use and is available in the form of source  texts. The only limitation is the the requirement to give credit to the library  and its authors if you are using it in a released product.&lt;/p&gt;
&lt;p&gt;You can check out all the  materials here: &lt;a href="http://bmagic.sourceforge.net"&gt;http://bmagic.sourceforge.net&lt;/a&gt;.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Am I right saying that BitMagic has significant  advantage if compiled as a 64-bit version?&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;Yes indeed, the  library uses a series of optimization methods to accelerate processing in  64-bit systems or SIMD-enabled systems (128-bit &lt;a href="http://www.viva64.com/go.php?url=273"&gt;SSE2&lt;/a&gt;).&lt;/p&gt;
&lt;p&gt;Here are some factors  leading to a faster execution of algorithms:&lt;/p&gt;
&lt;p&gt;a wide machine word (logical operations are  performed over a wide word);&lt;/p&gt;
&lt;p&gt;the programmer (and the compiler) has access to  additional registers and the lack of registers is not so critical (this an  inherited disadvantage of x86 architecture);&lt;/p&gt;
&lt;p&gt;memory alignment often makes the operation  faster (128-bit alignment of addresses provides good results);&lt;/p&gt;
&lt;p&gt;and of course it’s possible to place more  objects and data for processing in a program’s memory. That’s a great benefit of  the 64-bit version, which is clear to everyone.&lt;/p&gt;
&lt;p&gt;At the moment the fastest  method is to use 128-bit SSE2 optimizations with a 64-bit program. This mode  combines the double number of &lt;a href="http://www.viva64.com/terminology/x86.html"&gt;x86&lt;/a&gt; registers  with a wide machine word to perform logical operations.&lt;/p&gt;
&lt;p&gt;64-bit systems and  programs are going through a real Renaissance. The migration to 64-bits will be  faster than the move from 16 to 32. The launch of 64-bit Windows versions in  the mainstream market and the availability of related tools (like the one your  company is developing) will stimulate this process. In the environment of  increasingly complex systems and larger amounts of code, such tools as &lt;a href="http://www.viva64.com/pvs-studio/"&gt;PVS-Studio&lt;/a&gt; will be of great  practical utility as they help reduce labor costs and the time to market.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Please tell us about the compression methods  used in BitMagic.&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;The current 3.6.0 version  of the library uses several compression methods.&lt;/p&gt;
&lt;p&gt;"Bitvectors" in memory are split into  blocks. When a block is not occupied or is occupied fully, it won’t be  allocated. That is, the programmer can set bits in a wide range very far from  zero. Thus setting a 100,000,000 bit won’t result in an exploded memory use which  is often common to vectors with a two-dimensional linear model.&lt;/p&gt;
&lt;p&gt;Blocks in memory can have an equivalent  representation in the form of areas – the so-called gaps. Actually that’s a sort  of RLE coding. Unlike RLE, our library doesn't lose the capability to execute logical  operations or access random bits.&lt;/p&gt;
&lt;p&gt;When serializing "bitvectors", a set  of different methods is used: conversion to lists of integer numbers  (representing nulls or ones) and list coding by the Elias Gamma Coding method. When  implementing these methods, we do lose the random bit access capability but it  is not so critical for disk writes if compared with reduced storage and  input-output overheads.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Could you give some code examples demonstrating  possible uses of BitMagic?&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;The first example simply  creates 2 vectors, initializes them and performs the logical operation AND.  Further, the enumerator class is used for the iteration and printing of values  saved in the vector.&lt;/p&gt;
&lt;pre name="code" class="cpp"&gt;#include &amp;lt;iostream&amp;gt;
#include "bm.h"
using namespace std;
int main(void)
{
    bm::bvector&amp;lt;&amp;gt;   bv;    
    bv[10] = true; bv[100] = true; bv[10000] = true;
    bm::bvector&amp;lt;&amp;gt;   bv2(bv);    
    bv2[10000] = false;
    bv &amp;amp;= bv2;
    bm::bvector&amp;lt;&amp;gt;::enumerator en = bv.first();
    bm::bvector&amp;lt;&amp;gt;::enumerator en_end = bv.end();
    for (; en &amp;lt; en_end; ++en) {
        cout &amp;lt;&amp;lt; *en &amp;lt;&amp;lt; endl;
    }
    return 0;
}
&lt;/pre&gt;
&lt;p&gt;The next example  demonstrates vector serialization and the use of compression.&lt;/p&gt;
&lt;pre name="code" class="cpp"&gt;#include &amp;lt;stdlib.h&amp;gt;
#include &amp;lt;iostream&amp;gt;
#include "bm.h"
#include "bmserial.h"
using namespace std;
// This procedure creates very dense bitvector.
// The resulting set will consists mostly from ON (1) bits
// interrupted with small gaps of 0 bits.
//
void fill_bvector(bm::bvector&amp;lt;&amp;gt;* bv)
{
    for (unsigned i = 0; i &amp;lt; MAX_VALUE; ++i) {
        if (rand() % 2500) {
            bv-&amp;gt;set_bit(i);
        }
    }
}
void print_statistics(const bm::bvector&amp;lt;&amp;gt;&amp;amp; bv)
{
    bm::bvector&amp;lt;&amp;gt;::statistics st;
    bv.calc_stat(&amp;amp;st);
    cout &amp;lt;&amp;lt; "Bits count:" &amp;lt;&amp;lt; bv.count() &amp;lt;&amp;lt; endl;
    cout &amp;lt;&amp;lt; "Bit blocks:" &amp;lt;&amp;lt; st.bit_blocks &amp;lt;&amp;lt; endl;
    cout &amp;lt;&amp;lt; "GAP blocks:" &amp;lt;&amp;lt; st.gap_blocks &amp;lt;&amp;lt; endl;
    cout &amp;lt;&amp;lt; "Memory used:"&amp;lt;&amp;lt; st.memory_used &amp;lt;&amp;lt; endl;
    cout &amp;lt;&amp;lt; "Max.serialize mem.:" &amp;lt;&amp;lt; 
            st.max_serialize_mem &amp;lt;&amp;lt; endl &amp;lt;&amp;lt; endl;;
}
unsigned char* serialize_bvector(
  bm::serializer&amp;lt;bm::bvector&amp;lt;&amp;gt; &amp;gt;&amp;amp; bvs, 
  bm::bvector&amp;lt;&amp;gt;&amp;amp; bv)
{
    // It is reccomended to optimize 
    // vector before serialization.
    bv.optimize();  
    bm::bvector&amp;lt;&amp;gt;::statistics st;
    bv.calc_stat(&amp;amp;st);
    cout &amp;lt;&amp;lt; "Bits count:" &amp;lt;&amp;lt; bv.count() &amp;lt;&amp;lt; endl;
    cout &amp;lt;&amp;lt; "Bit blocks:" &amp;lt;&amp;lt; st.bit_blocks &amp;lt;&amp;lt; endl;
    cout &amp;lt;&amp;lt; "GAP blocks:" &amp;lt;&amp;lt; st.gap_blocks &amp;lt;&amp;lt; endl;
    cout &amp;lt;&amp;lt; "Memory used:"&amp;lt;&amp;lt; st.memory_used &amp;lt;&amp;lt; endl;
    cout &amp;lt;&amp;lt; "Max.serialize mem.:" &amp;lt;&amp;lt; 
             st.max_serialize_mem &amp;lt;&amp;lt; endl;
    // Allocate serialization buffer.
    unsigned char*  buf = 
        new unsigned char[st.max_serialize_mem];
    // Serialization to memory.
    unsigned len = bvs.serialize(bv, buf, 0);
    cout &amp;lt;&amp;lt; "Serialized size:" &amp;lt;&amp;lt; len &amp;lt;&amp;lt; endl &amp;lt;&amp;lt; endl;
    return buf;
}
int main(void)
{
    bm::bvector&amp;lt;&amp;gt;   bv1;    
    bm::bvector&amp;lt;&amp;gt;   bv2;
   //  set DGAP compression mode ON
    bv2.set_new_blocks_strat(bm::BM_GAP);  
    fill_bvector(&amp;amp;bv1);
    fill_bvector(&amp;amp;bv2);
    // Prepare a serializer class 
    // for best performance it is best 
    // to create serilizer once and reuse it
    // (saves a lot of memory allocations)
    //
    bm::serializer&amp;lt;bm::bvector&amp;lt;&amp;gt; &amp;gt; bvs;
    // next settings provide lowest serilized size 
    bvs.byte_order_serialization(false);
    bvs.gap_length_serialization(false);
    bvs.set_compression_level(4);
    unsigned char* buf1 = serialize_bvector(bvs, bv1);
    unsigned char* buf2 = serialize_bvector(bvs, bv2);
    // Serialized bvectors (buf1 and buf2) now ready to be
    // saved to a database, file or send over a network.
    // ...
    // Deserialization.
    bm::bvector&amp;lt;&amp;gt;  bv3;
    // As a result of desrialization bv3 
    // will contain all bits from
    // bv1 and bv3:
    //   bv3 = bv1 OR bv2
    bm::deserialize(bv3, buf1);
    bm::deserialize(bv3, buf2);
    print_statistics(bv3);
    // After a complex operation 
    // we can try to optimize bv3.
    bv3.optimize();
    print_statistics(bv3);
    delete [] buf1;
    delete [] buf2;
    return 0;
}
&lt;/pre&gt;
&lt;p&gt;&lt;strong&gt;What are your plans for BitMagic further  development? &lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;We want to implement  some new vector compression methods with parallel data procession capability.&lt;/p&gt;
&lt;p&gt;In view of the mass expansion  of Intel Core i5-i7-i9, it would be reasonable to release a SSE 4.2 version of  the library. Intel has added some interesting features that can be used very efficiently.  The most promising feature is hardware support for bit number calculation (Population  Count).&lt;/p&gt;
&lt;p&gt;We are experimenting  with nVidia CUDA and other GPGPUs. Today graphic cards enable you to perform  integer and logical operations - and their resources can be harnessed for algorithms  working on data sets and compression.&lt;/p&gt;
&lt;h2&gt;References&lt;/h2&gt;
&lt;ol&gt;
&lt;li&gt;Elias Gamma encoding of bit-vector Delta gaps (D-Gaps). &lt;a href="http://bmagic.sourceforge.net/dGap-gamma.html"&gt;http://bmagic.sourceforge.net/dGap-gamma.html&lt;/a&gt; &lt;/li&gt;
&lt;li&gt;Hierarchical Compression. &lt;a href="http://bmagic.sourceforge.net/hCompression.html"&gt;http://bmagic.sourceforge.net/hCompression.html&lt;/a&gt; &lt;/li&gt;
&lt;li&gt;D-Gap Compression. &lt;a href="http://bmagic.sourceforge.net/dGap.html"&gt;http://bmagic.sourceforge.net/dGap.html&lt;/a&gt; &lt;/li&gt;
&lt;li&gt;64-bit Programming And Optimization. &lt;a href="http://bmagic.sourceforge.net/bm64opt.html"&gt;http://bmagic.sourceforge.net/bm64opt.html&lt;/a&gt; &lt;/li&gt;
&lt;li&gt;Optimization of memory allocations. &lt;a href="http://bmagic.sourceforge.net/memalloc.html"&gt;http://bmagic.sourceforge.net/memalloc.html&lt;/a&gt; &lt;/li&gt;
&lt;li&gt;Bitvector as a container. &lt;a href="http://bmagic.sourceforge.net/enum.html"&gt;http://bmagic.sourceforge.net/enum.html&lt;/a&gt; &lt;/li&gt;
&lt;li&gt;128-bit SSE2 optimization. &lt;a href="http://bmagic.sourceforge.net/bmsse2opt.html"&gt;http://bmagic.sourceforge.net/bmsse2opt.html&lt;/a&gt; &lt;/li&gt;
&lt;li&gt;Using BM library in memory saving mode. &lt;a href="http://bmagic.sourceforge.net/memsave.html"&gt;http://bmagic.sourceforge.net/memsave.html&lt;/a&gt; &lt;/li&gt;
&lt;li&gt;Efficient distance metrics. &lt;a href="http://bmagic.sourceforge.net/distopt.html"&gt;http://bmagic.sourceforge.net/distopt.html&lt;/a&gt;&lt;/li&gt;
&lt;/ol&gt;&lt;img src="http://feeds.feedburner.com/~r/ISNMain/~4/P0RMvg6PZqo" height="1" width="1"/&gt;</description>
      <link>http://feedproxy.google.com/~r/ISNMain/~3/P0RMvg6PZqo/BitMagic-Library</link>
      <pubDate>Fri, 20 Nov 2009 03:30:48 -0800</pubDate>
      <comments>http://software.intel.com/en-us/articles/BitMagic-Library#comments</comments>
      <guid isPermaLink="false">http://software.intel.com/en-us/articles/BitMagic-Library</guid>
      <category>Parallel Programming</category>
    <feedburner:origLink>http://software.intel.com/en-us/articles/BitMagic-Library</feedburner:origLink></item>
    <item>
      <title>Intel Software Network at SuperComputing SC09</title>
      <description>&lt;p&gt;&lt;!-- #PublishedModifiedDate,#PageTitle{display:none;} --&gt;
&lt;object height="120" width="600" codebase="http://download.macromedia.com/pub/shockwave/cabs/flash/swflash.cab#version=6,0,40,0" classid="clsid:d27cdb6e-ae6d-11cf-96b8-444553540000" id="events"&gt;
&lt;param name="id" value="events" /&gt;
&lt;param name="align" value="middle" /&gt;
&lt;param name="allowScriptAccess" value="sameDomain" /&gt;
&lt;param name="allowFullScreen" value="false" /&gt;
&lt;param name="quality" value="high" /&gt;
&lt;param name="bgcolor" value="#IC4C7D" /&gt;
&lt;param name="src" value="http://software.intel.com/file/23250/" /&gt;&lt;embed allowfullscreen="false" allowscriptaccess="sameDomain" src="http://software.intel.com/file/23250/" bgcolor="#IC4C7D" quality="high" type="application/x-shockwave-flash" height="120" width="600" align="middle" id="events"&gt;&lt;/embed&gt;
&lt;/object&gt;
&lt;/p&gt;
&lt;p&gt;&lt;b&gt;Intel Software Network at Supercomputing 09!  Visit Intel at Booth #1935, and the Intel Academic Program in the SC Education Booth (Lobby C).&lt;/b&gt;&lt;/p&gt;
&lt;p&gt;Please Join Intel and the Intel Academic Community at Supercomputing 09 in Portland Oregon.  We are sponsoring keynotes, talks, and sessions.  Many of our events will be available live and on line, see below, and of course, if you are attending,  please visit us in person.&lt;/p&gt;
&lt;p&gt;&lt;b&gt;Intel Academic Community Sponsored Talks&lt;/b&gt;&lt;/p&gt;
&lt;table border="2" cellpadding="2" cellspacing="2"&gt;
&lt;tbody&gt;
&lt;tr&gt;
&lt;td&gt;&lt;b&gt;Tuesday, November 17&lt;br /&gt;5:00-6:30 PM Room C124&lt;/b&gt;&lt;/td&gt;
&lt;td&gt;&lt;b&gt;Friday, November 20&lt;br /&gt;10:30 AM-12:00PM  Room PB252&lt;/b&gt;&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;&lt;b&gt;&lt;i&gt;Teach Parallel: Developing a Curriculum for Parallelism&lt;/i&gt;&lt;/b&gt;,&lt;br /&gt;Moderator: &lt;b&gt;Tom Murphy&lt;/b&gt; (Contra Costa College)&lt;br /&gt;
&lt;ul&gt;
&lt;li&gt;&lt;span style="line-height: normal; font-family: Verdana, Arial, Helvetica, sans-serif;"&gt;&lt;b&gt;Dr. John Gustafson&lt;/b&gt; (Intel Labs)&lt;/span&gt;&lt;/li&gt;
&lt;li&gt;&lt;span style="line-height: normal; font-family: Verdana, Arial, Helvetica, sans-serif;"&gt;&lt;b&gt;Robert Chesebrough&lt;/b&gt; (Intel)&lt;/span&gt;&lt;/li&gt;
&lt;li&gt;&lt;span style="line-height: normal; font-family: Verdana, Arial, Helvetica, sans-serif;"&gt;&lt;b&gt;Dr. Jim Larus&lt;/b&gt; (Microsoft)&lt;/span&gt;&lt;/li&gt;
&lt;li&gt;&lt;span style="line-height: normal; font-family: Verdana, Arial, Helvetica, sans-serif;"&gt;&lt;b&gt;Dr. Bill Dally&lt;/b&gt; (NVIDIA)&lt;/span&gt;&lt;/li&gt;
&lt;li&gt;&lt;span style="line-height: normal; font-family: Verdana, Arial, Helvetica, sans-serif;"&gt;&lt;b&gt;Dr. Simon McIntosh-Smith&lt;/b&gt; (Bristol University)&lt;/span&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;/td&gt;
&lt;td&gt;&lt;b&gt;&lt;i&gt;Preparing the World for Ubiquitous Parallelism&lt;/i&gt;&lt;/b&gt;&lt;br /&gt;Moderator: &lt;b&gt;Dr. &lt;/b&gt;&lt;b&gt;Matthew Wolf&lt;/b&gt; (Georgia Institute of Technology)&lt;br /&gt;
&lt;ul&gt;
&lt;li&gt;&lt;span style="line-height: normal; font-family: Verdana, Arial, Helvetica, sans-serif;"&gt;&lt;b&gt;Dr. Benedict Gaster&lt;/b&gt; (AMD) &lt;/span&gt;&lt;/li&gt;
&lt;li&gt;&lt;span style="line-height: normal; font-family: Verdana, Arial, Helvetica, sans-serif;"&gt;&lt;b&gt;Kevin Goldsmith&lt;/b&gt; (Adobe Systems Inc.) &lt;/span&gt;&lt;/li&gt;
&lt;li&gt;&lt;span style="line-height: normal; font-family: Verdana, Arial, Helvetica, sans-serif;"&gt;&lt;b&gt;Dr. Charlie Peck&lt;/b&gt; (Earlham College) &lt;/span&gt;&lt;/li&gt;
&lt;li&gt;&lt;span style="line-height: normal; font-family: Verdana, Arial, Helvetica, sans-serif;"&gt;&lt;b&gt;Dr. Steven Parker&lt;/b&gt; (NVIDIA) &lt;/span&gt;&lt;/li&gt;
&lt;li&gt;&lt;span style="line-height: normal; font-family: Verdana, Arial, Helvetica, sans-serif;"&gt;&lt;b&gt;Dr. Michael Wrinn&lt;/b&gt; (Intel Corporation) &lt;/span&gt;&lt;/li&gt;
&lt;li&gt;&lt;span style="line-height: normal; font-family: Verdana, Arial, Helvetica, sans-serif;"&gt;&lt;b&gt;Dr. Evan Smyth&lt;/b&gt; (DreamWorks)&lt;/span&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;/td&gt;
&lt;/tr&gt;
&lt;/tbody&gt;
&lt;/table&gt;
&lt;div&gt;&lt;br /&gt;&lt;b&gt;&lt;br /&gt;&lt;/b&gt;&lt;/div&gt;
&lt;div&gt;&lt;b&gt;Intel Software Network TV&lt;br /&gt;&lt;/b&gt;&lt;br /&gt;&lt;a href="http://software.intel.com/en-us/tv/"&gt;Intel Software Network TV&lt;/a&gt; will stream many of the keynotes and invited talks live as well as conversations with key attendees. When not streamling live, you will see encore presentations of past episodes - see the Schedules below (all times Pacific).  All events can be seen live below, on &lt;a href="http://software.intel.com/en-us/tv/"&gt;Intel Software Network TV&lt;/a&gt;, or on the &lt;a href="http://sc09.sc-education.org/conference/teachparallel.php"&gt;Supercomputing Education Website&lt;/a&gt;.&lt;/div&gt;
&lt;div&gt;

&lt;b&gt;
&lt;div&gt;
&lt;h2&gt;&lt;br /&gt;&lt;/h2&gt;
&lt;h2&gt;Teach Parallel! - Intel Academic Community &amp;amp; Supercomputing Education&lt;/h2&gt;
&lt;/div&gt;
&lt;div&gt;&lt;center&gt;&lt;img width="600" src="http://software.intel.com/file/23704" height="206" /&gt;&lt;/center&gt;&lt;br /&gt;&lt;/div&gt;
&lt;div&gt;&lt;br /&gt;&lt;/div&gt;
Join us live in Person - All broadcasts will take place in Supercomputing Education Booth (Lobby C).&lt;br /&gt;&lt;/b&gt;Teach Parallel is a cooperative production of Supercomputing Education and the Intel Academic Community&lt;br /&gt;Questions and discussion from the audience will be encouraged.&lt;/div&gt;
&lt;div&gt;&lt;br /&gt;
&lt;table border="2" cellpadding="2" cellspacing="2"&gt;
&lt;tbody&gt;
&lt;tr&gt;
&lt;td colspan="4"&gt;&lt;b&gt;Teach Parallel! - with Paul steinberg &amp;amp; Professor Tom Murphy&lt;/b&gt;&lt;br /&gt;All major manufactures of CPUs, GPUs and ASICs have moved to a many core design, yet universities and colleges are not training engineers in the parallel and concurrent disciplines needed to efficiently program on such systems. What can be done to bring parallelism into the mainstream? Join Paul &amp;amp; Tom and the experts below as they discuss Paralleism, Technology and Education.&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;th scope="col"&gt;Time&lt;/th&gt;&lt;th scope="col"&gt;Tuesday, November 17&lt;/th&gt;&lt;th scope="col"&gt;Wednesday, November 18&lt;/th&gt;&lt;th scope="col"&gt;Thursday, November 19&lt;/th&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;1:00 PM&lt;/td&gt;
&lt;td&gt;&lt;b&gt;Dr. Wilf Pinfold&lt;/b&gt;, General Chair, Super Computing Conference 09&lt;/td&gt;
&lt;td&gt;&lt;b&gt;Dr Evan Smyth&lt;/b&gt;, Principal Software Engineer, DreamWorks Animation&lt;/td&gt;
&lt;td&gt;&lt;strong&gt;Dr. Daniel Ernst,&lt;/strong&gt; University of Wisconsin, Eau-Claire&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;&lt;span style="font-family: __;"&gt;1:30 PM&lt;/span&gt;&lt;/td&gt;
&lt;td&gt;&lt;span style="font-family: __;"&gt;&lt;b&gt;Dr. Joel Adams&lt;/b&gt;, Department of Computer Science Calvin College &lt;/span&gt;&lt;/td&gt;
&lt;td&gt;&lt;span style="font-family: __;"&gt;&lt;b&gt;Dr. Charlie Peck,&lt;/b&gt; Earlham College&lt;/span&gt;&lt;/td&gt;
&lt;td&gt;&lt;span style="font-family: __;"&gt;&lt;b&gt;Laura McGinnis,&lt;/b&gt; Supercomputing Education Chair, 2010&lt;/span&gt;&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;2:00 PM&lt;/td&gt;
&lt;td&gt;&lt;b&gt;Dr. Tim Mattson&lt;/b&gt;, Intel Principal Engineer.&lt;/td&gt;
&lt;td&gt;&lt;b&gt;Jason Arviso&lt;/b&gt;, Navajo Technical College, Internet to the Hogan&lt;/td&gt;
&lt;td&gt;&lt;strong&gt;Dr. John Gustafson&lt;/strong&gt;, He's not just a scientist, he's a law!&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;2:30 PM&lt;/td&gt;
&lt;td&gt;&lt;b&gt;Dr. Dan Reed&lt;/b&gt;, Microsoft, Director of Multicore Research.&lt;/td&gt;
&lt;td&gt;&lt;strong&gt;Dr. David O'Hallaron,&lt;/strong&gt; Director, Intel Labs Pittsburgh. Professor, Computer Science,&lt;br /&gt;Carnegie Mellon University&lt;/td&gt;
&lt;td&gt;&lt;strong&gt;Parallel Octave&lt;/strong&gt;&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;3:00&lt;/td&gt;
&lt;td colspan="3"&gt;
&lt;div align="center"&gt;&lt;b&gt;Prize drawing!&lt;/b&gt; &lt;b&gt;Prize drawing&lt;/b&gt;! &lt;b&gt;Prize drawing!&lt;/b&gt;&lt;/div&gt;
&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;3:05 PM&lt;/td&gt;
&lt;td&gt;&lt;b&gt;Dr. Jesse Bemley&lt;/b&gt;, former National BDPA(Black Data Processing Associates) Education Chairperson. Developer the High School Computer competition (HSCC) program&lt;/td&gt;
&lt;td&gt;&lt;b&gt;Dr. Matt Wolf&lt;/b&gt;, Research Scientist CERCS Center for Experimental Research in Computer Systems.&lt;/td&gt;
&lt;td&gt;&lt;b&gt;Todd Rosenquist, &lt;/b&gt;Senior Technical Consulting Engineer, Intel Math Kernel Library&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;3:30 PM&lt;/td&gt;
&lt;td&gt;&lt;b&gt;Dr. James Reinders&lt;/b&gt;, Intel Chief Software Evangelist.&lt;/td&gt;
&lt;td&gt;&lt;b&gt;Dr. Charlie Peck,&lt;/b&gt; Earlham College&lt;/td&gt;
&lt;td&gt;&lt;b style="font-family: verdana, sans-serif; padding: 0px; margin: 0px;"&gt;Dr. Paul McKenney&lt;/b&gt;, Distinguished Engineer at IBM Linux Technology Center&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;4:00 PM&lt;/td&gt;
&lt;td&gt;&lt;b&gt;Dr. Robert M. Panoff&lt;/b&gt;, founder and Executive Director of The Shodor Education&lt;/td&gt;
&lt;td&gt;&lt;b&gt;Werner Krotz-Vogel&lt;/b&gt;, Technical Marketing Engineer at Intel for Intel® Cluster Tools&lt;/td&gt;
&lt;td&gt;&lt;strong&gt;Dr. Rebecca Hartman- Baker&lt;/strong&gt;&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;4:30 PM&lt;/td&gt;
&lt;td&gt;&lt;/td&gt;
&lt;td&gt;&lt;/td&gt;
&lt;td&gt;&lt;b&gt;&lt;span style="font-weight: normal; font-family: Verdana, Arial, Helvetica, sans-serif;"&gt;&lt;/span&gt;&lt;/b&gt;&lt;/td&gt;
&lt;/tr&gt;
&lt;/tbody&gt;
&lt;/table&gt;
&lt;/div&gt;
&lt;div&gt;&lt;span style="color: #0860a8;"&gt;&lt;span style="color: #000000;"&gt;&lt;br /&gt;&lt;/span&gt;&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span style="line-height: 16px;"&gt;&lt;b&gt;&lt;span style="font-weight: normal; line-height: normal;"&gt;&lt;br /&gt;&lt;/span&gt;&lt;/b&gt;&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;
&lt;p&gt;&lt;b&gt;Intel Booth Theater Presentations:&lt;/b&gt;&lt;/p&gt;
&lt;p&gt;Join us in our in-booth theater (booth #1935) at Supercomputing to hear free presentations throughout the show! &lt;br /&gt;&lt;a href="http://software.intel.com/file/23511"&gt;Download the Theater Schedule PDF&lt;/a&gt; (427 KB)&lt;br /&gt;&lt;br /&gt;_______________________________________________________________________________________________&lt;br /&gt;&lt;b&gt;Here are a few of our scheduled sessions:&lt;/b&gt;&lt;br /&gt;&lt;br /&gt;&lt;br /&gt;&lt;b&gt;PANEL: Preparing the World for Ubiquitous Parallelism&lt;br /&gt;&lt;/b&gt;Moderator: Matthew Wolf (Georgia Institute of Technology) &lt;br /&gt;Panelists: Benedict Gaster (AMD), Kevin Goldsmith (Adobe Systems Inc.), Tom Murphy (Contra Costa College), Steven Parker (NVIDIA),  Michael Wrinn (Intel Corporation) &lt;br /&gt;Friday, 10:30AM - 12:00PM &lt;br /&gt;Room PB252&lt;/p&gt;
&lt;p&gt;&lt;b&gt;&lt;br /&gt;&lt;/b&gt;&lt;/p&gt;
&lt;p&gt;&lt;b&gt;The complete list of Intel panels, talks, BOFs and events can be downloaded: &lt;/b&gt;&lt;a target="_blank" href="http://software.intel.com/file/23263"&gt;Download the Intel talk schedule, PDF (427 KB)&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&lt;br /&gt;&lt;img width="468" src="http://software.intel.com/file/23200" alt="banner" height="60" style="margin-top: 2px; float: left; margin-bottom: 2px;" /&gt;&lt;/p&gt;
&lt;p&gt; &lt;/p&gt;
&lt;b&gt;&lt;br /&gt;&lt;br /&gt;&lt;br /&gt;&lt;/b&gt;&lt;/div&gt;
&lt;div&gt;&lt;b&gt;&lt;br /&gt;&lt;br /&gt;Our latest Intel @ Supercomputing 09 blogs:&lt;br /&gt;
&lt;ul&gt;
&lt;li&gt;&lt;span style="font-weight: normal; line-height: normal;"&gt;&lt;a href="http://software.intel.com/en-us/blogs/2009/11/04/in-the-company-of-friends/"&gt;In the Company of Friends&lt;/a&gt;, by Tom Murphy. (Your invitation to the Panel Discussion, November 17th, 5:30pm, room C124)&lt;/span&gt;&lt;/li&gt;
&lt;li&gt;&lt;span style="font-weight: normal; line-height: normal;"&gt;Subscribe to the &lt;a href="http://software.intel.com/en-us/blogs/category/academic/feed/"&gt;Intel Academic Community blog RSS feed&lt;/a&gt;&lt;/span&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;b&gt;Intel Software Network Attendees at Supercomputing 2009 (partial list):&lt;/b&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Paul Steinberg, Academic Community Manager (&lt;a target="_blank" href="http://software.intel.com/en-us/blogs/author/paul-steinberg/"&gt;Pauls' blog&lt;/a&gt;, &lt;a target="_blank" href="http://twitter.com/psteinb"&gt;@psteinb&lt;/a&gt; on Twitter)&lt;/li&gt;
&lt;li&gt;Aaron Tersteeg, Parallel Programming Community Manager (&lt;a target="_blank" href="http://software.intel.com/en-us/blogs/author/aaron-tersteeg/"&gt;Aaron's blog&lt;/a&gt;, &lt;a target="_blank" href="http://twitter.com/tersteeg"&gt;&lt;/a&gt;&lt;a href="http://twitter.com/tersteeg"&gt;@Tersteeg &lt;/a&gt;on Twitter)&lt;/li&gt;
&lt;li&gt;Arti Gupta, Visual Computing Community Manager (&lt;a target="_blank" href="http://software.intel.com/en-us/blogs/author/arti-gupta/"&gt;Arti's blog&lt;/a&gt;, &lt;a target="_blank" href="http://twitter.com/artigupta"&gt;@artigupta&lt;/a&gt; on Twitter)&lt;/li&gt;
&lt;li&gt;James Reinders, Director Marketing and Business, Software Development Products (&lt;a target="_blank" href="http://software.intel.com/en-us/blogs/author/james-reinders/"&gt;James' blog&lt;/a&gt;, &lt;a target="_blank" href="http://twitter.com/jamesreinders"&gt;@JamesReinders&lt;/a&gt; on Twitter)&lt;/li&gt;
&lt;li&gt;Michael Wrinn, Manager, Innovative Software Education (&lt;a href="http://software.intel.com/en-us/blogs/author/michael-wrinn/"&gt;Michael's blog&lt;/a&gt;) &lt;/li&gt;
&lt;li&gt;Scott Apeland, Director, Developer Network Organization (&lt;a href="http://software.intel.com/en-us/blogs/author/scott-apeland/"&gt;Scott's blog&lt;/a&gt;)&lt;/li&gt;
&lt;li&gt;Michael McCool, Software Architect (&lt;a href="http://software.intel.com/en-us/blogs/author/michael-mccool/"&gt;Michael's blog&lt;/a&gt;, &lt;a href="http://twitter.com/michaelmccool"&gt;@michaelmccool&lt;/a&gt; on Twitter)&lt;/li&gt;
&lt;li&gt;Bob Chesebrough, Technical Course Architect, (&lt;a target="_blank" href="http://software.intel.com/en-us/blogs/author/robert-chesebrough/"&gt;Bob's blog&lt;/a&gt;)&lt;/li&gt;
&lt;li&gt;Jennifer Teal, Marketing Manager (&lt;a target="_blank" href="http://software.intel.com/en-us/blogs/author/jennifer-teal-levine/"&gt;Jen's blog&lt;/a&gt;, &lt;a href="http://twitter.com/jenvteal"&gt;@jenvteal &lt;/a&gt;on Twitter)&lt;/li&gt;
&lt;li&gt;Bev Bachmayer, Intel Academic Community Europe Region (&lt;a href="http://software.intel.com/en-us/blogs/author/beverly-bachmayer/"&gt;Bev's blog&lt;/a&gt;)&lt;/li&gt;
&lt;li&gt;Zander Sprague, Intel Academic Community, Americas Region (&lt;a target="_blank" href="http://software.intel.com/en-us/blogs/author/zander-sprague/"&gt;Zander's blog,&lt;/a&gt; &lt;a target="_blank" href="http://twitter.com/ztsprague"&gt;@ztsprague&lt;/a&gt; on Twitter)&lt;/li&gt;
&lt;li&gt;Jerry Baugh, Technical Content Manager&lt;/li&gt;
&lt;li&gt;Josh Bancroft, &lt;a target="_blank" href="http://intel.com/software/tv"&gt;Intel Software Network TV&lt;/a&gt; (&lt;a href="http://software.intel.com/en-us/blogs/author/josh-bancroft/"&gt;Josh's blog&lt;/a&gt;, &lt;a target="_blank" href="http://twitter.com/jabancroft"&gt;@jabancroft&lt;/a&gt; on Twitter)&lt;/li&gt;
&lt;li&gt;Maryann Iannitti, Manager, Marketing Programs (&lt;a target="_blank" href="http://software.intel.com/en-us/blogs/author/maryann-iannitti/"&gt;Maryann's blog&lt;/a&gt;)&lt;/li&gt;
&lt;li&gt;Bill Pearson, Manager, Intel Software Network (&lt;a href="http://software.intel.com/en-us/blogs/author/bill-pearson/"&gt;Bill's blog&lt;/a&gt;, &lt;a target="_blank" href="http://twitter.com/billpearson"&gt;@billpearson&lt;/a&gt; on Twitter)&lt;/li&gt;
&lt;li&gt;Amy Barton, New Media Communications (&lt;a href="http://software.intel.com/en-us/blogs/author/amy-barton/"&gt;Amy's blog&lt;/a&gt;, &lt;a target="_blank" href="http://bit.ly/YouTubeISN"&gt;YouTube&lt;/a&gt;, &lt;a href="http://twitter.com/amybarton"&gt;@amybarton&lt;/a&gt; on Twitter)&lt;/li&gt;
&lt;/ul&gt;
&lt;b&gt;&lt;br /&gt;Intel Academic Community Black Belts at Supercomputing 2009:&lt;/b&gt;&lt;br /&gt;
&lt;ul&gt;
&lt;li&gt;Matthew Wolf, Georgia Tech University (&lt;a target="_blank" href="http://software.intel.com/en-us/blogs/author/matthew-wolf/"&gt;Dr. Wolf's blog&lt;/a&gt;)&lt;/li&gt;
&lt;li&gt;Tom Murphy, Contra Costa College (&lt;a target="_blank" href="http://software.intel.com/en-us/blogs/author/wolfmurphy/"&gt;Dr. Murphy's blog&lt;/a&gt;, &lt;a href="http://twitter.com/wolfmurphy"&gt;@wolfmurphy &lt;/a&gt;on Twitter)&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;b&gt;&lt;br /&gt;&lt;/b&gt;&lt;/p&gt;
&lt;p&gt;&lt;b&gt;&lt;/b&gt;&lt;img width="639" src="http://software.intel.com/file/23242" height="156" style="vertical-align: text-bottom;" /&gt;&lt;/p&gt;
&lt;p&gt; &lt;/p&gt;
Additional Links:&lt;/b&gt;&lt;/div&gt;
&lt;b&gt;&lt;/b&gt;&lt;img src="http://feeds.feedburner.com/~r/ISNMain/~4/ke2-NPrePBY" height="1" width="1"/&gt;</description>
      <link>http://feedproxy.google.com/~r/ISNMain/~3/ke2-NPrePBY/intel-software-network-at-supercomputing</link>
      <pubDate>Thu, 19 Nov 2009 08:00:53 -0800</pubDate>
      <comments>http://software.intel.com/en-us/articles/intel-software-network-at-supercomputing#comments</comments>
      <guid isPermaLink="false">http://software.intel.com/en-us/articles/intel-software-network-at-supercomputing</guid>
      <category>Intel® Cluster Ready</category>
      <category>Intel Software Network communities</category>
      <category>Academic</category>
      <category>Intel® Cluster Ready Knowledge Base</category>
      <category>Data Parallelism</category>
    <feedburner:origLink>http://software.intel.com/en-us/articles/intel-software-network-at-supercomputing</feedburner:origLink></item>
    <item>
      <title>Diagnostic 269: invalid format string conversion</title>
      <description>&lt;br /&gt;
&lt;div id="art_pre_template"&gt;&lt;b&gt;Casue: &lt;/b&gt;&lt;br /&gt;&lt;br /&gt;This warning is triggered by a printf or scanf format specifier that is not appropriate for the type of the variable being printed.&lt;br /&gt;&lt;br /&gt;&lt;b&gt;Example: &lt;/b&gt;&lt;br /&gt;&lt;br /&gt;
&lt;p&gt;#include &amp;lt;stdio.h&amp;gt;&lt;/p&gt;
&lt;p&gt;int main() {&lt;br /&gt;   long int li = 0;&lt;br /&gt;   printf("%l\n",li);     // %l is the size specifier; the type specifer is missing&lt;br /&gt;   printf("%ld\n",li);  // OK&lt;br /&gt;   return 0;&lt;br /&gt;}&lt;/p&gt;
&lt;p&gt;&lt;br /&gt;&amp;gt; icl -c /W4 diag269.cpp&lt;br /&gt;Intel(R) C++ Compiler Professional for applications running on IA-32, Version 11.1    Build 20090511 Package ID: w_cproc_p_11.1.035&lt;br /&gt;Copyright (C) 1985-2009 Intel Corporation.  All rights reserved.&lt;/p&gt;
&lt;p&gt;diag269.cpp&lt;br /&gt;diag269.cpp(5): warning #269: invalid format string conversion&lt;br /&gt;     printf("%l\n",li);&lt;br /&gt;                   ^&lt;/p&gt;
&lt;br /&gt;&lt;b&gt;Resolution : &lt;/b&gt;&lt;br /&gt;&lt;br /&gt;Use proper type specifier.&lt;br /&gt;&lt;/div&gt;&lt;img src="http://feeds.feedburner.com/~r/ISNMain/~4/Bkid9kyRPEQ" height="1" width="1"/&gt;</description>
      <link>http://feedproxy.google.com/~r/ISNMain/~3/Bkid9kyRPEQ/cdiag269</link>
      <pubDate>Wed, 18 Nov 2009 16:36:31 -0800</pubDate>
      <comments>http://software.intel.com/en-us/articles/cdiag269#comments</comments>
      <guid isPermaLink="false">http://software.intel.com/en-us/articles/cdiag269</guid>
      <category>Intel® C++ Compiler for Linux* Knowledge Base</category>
      <category>Intel® C++ Compiler for Mac OS X* Knowledge Base</category>
      <category>Intel® C++ Compiler for Windows* Knowledge Base</category>
      <category>Intel® Parallel Composer Knowledge Base</category>
    <feedburner:origLink>http://software.intel.com/en-us/articles/cdiag269</feedburner:origLink></item>
    <item>
      <title>Diagnostic 181: argument is incompatible with corresponding format string conversion</title>
      <description>&lt;br /&gt;
&lt;div id="art_pre_template"&gt;&lt;b&gt;Cause: &lt;/b&gt;&lt;br /&gt;&lt;br /&gt;This warning is triggered by a printf or scanf format specifier that is not appropriate for the type of the variable being printed. &lt;br /&gt;&lt;br /&gt;&lt;b&gt;Example: &lt;/b&gt;&lt;br /&gt;&lt;br /&gt;
&lt;p&gt;#include &amp;lt;stdio.h&amp;gt;&lt;/p&gt;
&lt;p&gt;int main() {&lt;br /&gt;   unsigned int ui = 0;&lt;br /&gt;   printf("%f\n",ui);  // %f is for a double type, not an unsigned integer type&lt;br /&gt;   printf("%u\n",ui); // OK&lt;br /&gt;   return 0;&lt;br /&gt;}&lt;br /&gt;&amp;gt; icl -c /W4 diag181.cpp&lt;br /&gt;Intel(R) C++ Compiler Professional for applications running on IA-32, Version 11.1    Build 20090511 Package ID: w_cproc_p_11.1.035&lt;br /&gt;Copyright (C) 1985-2009 Intel Corporation.  All rights reserved.&lt;/p&gt;
&lt;p&gt;diag181.cpp&lt;br /&gt;diag181.cpp(5): warning #181: argument is incompatible with corresponding format string conversion&lt;br /&gt;     printf("%f\n",ui);&lt;br /&gt;                   ^&lt;/p&gt;
&lt;b&gt;Resolution : &lt;/b&gt;&lt;br /&gt;&lt;br /&gt;Use the proper type specifier.&lt;br /&gt;&lt;/div&gt;&lt;img src="http://feeds.feedburner.com/~r/ISNMain/~4/tE5yiACJu8Y" height="1" width="1"/&gt;</description>
      <link>http://feedproxy.google.com/~r/ISNMain/~3/tE5yiACJu8Y/cdiag181</link>
      <pubDate>Wed, 18 Nov 2009 16:23:47 -0800</pubDate>
      <comments>http://software.intel.com/en-us/articles/cdiag181#comments</comments>
      <guid isPermaLink="false">http://software.intel.com/en-us/articles/cdiag181</guid>
      <category>Intel® C++ Compiler for Linux* Knowledge Base</category>
      <category>Intel® C++ Compiler for Mac OS X* Knowledge Base</category>
      <category>Intel® C++ Compiler for Windows* Knowledge Base</category>
      <category>Intel® Parallel Composer Knowledge Base</category>
    <feedburner:origLink>http://software.intel.com/en-us/articles/cdiag181</feedburner:origLink></item>
    <item>
      <title>Diagnostic 319: name followed by &amp;#34;::&amp;#34; must be a class or namespace</title>
      <description>&lt;br /&gt;
&lt;div id="art_pre_template"&gt;&lt;b&gt;Cause: &lt;/b&gt;&lt;br /&gt;&lt;br /&gt;This diagnostic occurs when a qualifier is not preceded by a class or namespace name.  &lt;br /&gt;&lt;br /&gt;&lt;b&gt;Example: &lt;/b&gt;&lt;br /&gt;&lt;br /&gt;
&lt;p&gt;class C {&lt;br /&gt;   static int i;&lt;br /&gt;};&lt;/p&gt;
&lt;p&gt;typedef int Foo;&lt;/p&gt;
&lt;p&gt;int Foo::i;  // error -- Foo is not a class or namespace&lt;/p&gt;
&lt;br /&gt;
&lt;p&gt;&amp;gt; icl -c diag319.cpp&lt;br /&gt;Intel(R) C++ Compiler Professional for applications running on IA-32, Version 11.1    Build 20090511 Package ID: w_cproc_p_11.1.035&lt;br /&gt;Copyright (C) 1985-2009 Intel Corporation.  All rights reserved.&lt;/p&gt;
&lt;p&gt;diag319.cpp&lt;br /&gt;diag319.cpp(7): error: name followed by "::" must be a class or namespace name&lt;br /&gt;  int Foo::i;&lt;br /&gt;      ^&lt;/p&gt;
&lt;br /&gt;&lt;b&gt;Resolution: &lt;/b&gt;&lt;br /&gt;&lt;br /&gt;Quality the name correctly.  For example:&lt;br /&gt;&lt;br /&gt;int C::i;    // ok, C is a class name&lt;br /&gt;&lt;/div&gt;&lt;img src="http://feeds.feedburner.com/~r/ISNMain/~4/wCf5EV21hJI" height="1" width="1"/&gt;</description>
      <link>http://feedproxy.google.com/~r/ISNMain/~3/wCf5EV21hJI/cdiag319</link>
      <pubDate>Wed, 18 Nov 2009 15:24:43 -0800</pubDate>
      <comments>http://software.intel.com/en-us/articles/cdiag319#comments</comments>
      <guid isPermaLink="false">http://software.intel.com/en-us/articles/cdiag319</guid>
      <category>Intel® C++ Compiler for Linux* Knowledge Base</category>
      <category>Intel® C++ Compiler for Mac OS X* Knowledge Base</category>
      <category>Intel® C++ Compiler for Windows* Knowledge Base</category>
      <category>Intel® Parallel Composer Knowledge Base</category>
    <feedburner:origLink>http://software.intel.com/en-us/articles/cdiag319</feedburner:origLink></item>
    <item>
      <title>Diagnostic 109: expression must have (pointer-to-) function type</title>
      <description>&lt;br /&gt;
&lt;div id="art_pre_template"&gt;&lt;b&gt;Cause: &lt;/b&gt;&lt;br /&gt;
&lt;p&gt;&lt;br /&gt;This error is reported when the compiler sees a function call but the identifier in the&lt;br /&gt;function call is not a function name or function pointer.&lt;/p&gt;
&lt;p&gt;&lt;br /&gt;&lt;b&gt;Example: &lt;br /&gt;&lt;/b&gt;&lt;br /&gt;void foo(void* p) {&lt;br /&gt;    p();   // p is being called as if it were a function but it is not a function&lt;br /&gt;&lt;br /&gt;}&lt;/p&gt;
&lt;p&gt;&amp;gt; icl -c diag109.cpp&lt;br /&gt;Intel(R) C++ Compiler Professional for applications running on IA-32, Version 11.1    Build 20090511 Package ID: w_cproc_p_11.1.035&lt;br /&gt;Copyright (C) 1985-2009 Intel Corporation.  All rights reserved.&lt;/p&gt;
&lt;p&gt;diag109.cpp&lt;br /&gt;diag109.cpp(2): error: expression must have (pointer-to-) function type&lt;br /&gt;      p();&lt;br /&gt;      ^&lt;/p&gt;
&lt;p&gt;&lt;b&gt;Resolution : &lt;/b&gt;&lt;br /&gt;Ensure there is no syntax error and the function prototype exists.&lt;/p&gt;
&lt;/div&gt;&lt;img src="http://feeds.feedburner.com/~r/ISNMain/~4/VURlitFPOBI" height="1" width="1"/&gt;</description>
      <link>http://feedproxy.google.com/~r/ISNMain/~3/VURlitFPOBI/cdiag109</link>
      <pubDate>Wed, 18 Nov 2009 15:13:47 -0800</pubDate>
      <comments>http://software.intel.com/en-us/articles/cdiag109#comments</comments>
      <guid isPermaLink="false">http://software.intel.com/en-us/articles/cdiag109</guid>
      <category>Intel® C++ Compiler for Linux* Knowledge Base</category>
      <category>Intel® C++ Compiler for Mac OS X* Knowledge Base</category>
      <category>Intel® C++ Compiler for Windows* Knowledge Base</category>
      <category>Intel® Parallel Composer Knowledge Base</category>
    <feedburner:origLink>http://software.intel.com/en-us/articles/cdiag109</feedburner:origLink></item>
    <item>
      <title>Compile moblin 2.1 kernel sources with Intel Compiler</title>
      <description>&lt;p&gt;1.  Prepare for build&lt;/p&gt;
&lt;p&gt;       a.  su into root.&lt;/p&gt;
&lt;p&gt;       b.  Create a ~/.rpmmacros file containing:&lt;/p&gt;
&lt;p&gt;       %_topdir %(echo $HOME)/rpmbuild&lt;/p&gt;
&lt;p&gt;      %_smp_mflags -j3&lt;/p&gt;
&lt;p&gt;      %__arch_install_post /usr/lib/rpm/check-rpaths /usr/lib/rpm/check-buildroot&lt;/p&gt;
&lt;p&gt;      %_default_patch_fuzz 2&lt;/p&gt;
&lt;p&gt;      #end of file&lt;/p&gt;
&lt;p&gt;      fuzz=2 is critical to allow the 915 patches to merge correctly.&lt;/p&gt;
&lt;p&gt;_smp_mflags -jN, N should be set to the number of processor cores on your build system&lt;/p&gt;
&lt;p&gt;2.  Setup and do initial build.  Download the kernel source from a source repository:&lt;/p&gt;
&lt;p&gt;(Used http://repo.moblin.org/moblin/releases/2.1/source/kernel-2.6.31.5-10.1.moblin2.src.rpm)&lt;/p&gt;
&lt;p&gt;       a.  Extract the rpm:&lt;/p&gt;
&lt;p&gt;       $ rpm -ivh kernel-2.6.31.5-10.1.moblin2.src.rpm&lt;/p&gt;
&lt;p&gt;       b. Prepare and do initial build to rpm:&lt;/p&gt;
&lt;p&gt;       $ cd rpmbuild/SPECS&lt;/p&gt;
&lt;p&gt;       c. Remove lines 762 &amp;amp; 763, 'BuildKernel %make_target %kernel_image menlow' &amp;amp; 'BuildKernel %make_target %kernel_image ivi'&lt;/p&gt;
&lt;p&gt;       $ rpmbuild -bc --target=i586 kernel.spec&lt;/p&gt;
&lt;p&gt;       The previous step ensures you have the components to build successfully.&lt;/p&gt;
&lt;p&gt;3.  Rebuild with gcc:&lt;/p&gt;
&lt;p&gt;       $ cd rpmbuild/BUILD/kernel-2.6.31/linux-2.6.31&lt;/p&gt;
&lt;p&gt;       $ make clean&lt;/p&gt;
&lt;p&gt;       $ make bzImage&lt;/p&gt;
&lt;p&gt;       $ make modules&lt;/p&gt;
&lt;p&gt;       $ make modules_install&lt;/p&gt;
&lt;p&gt;       $ make install &lt;/p&gt;
&lt;p&gt;      Test the image on your netbook by rebooting the system and selecting the kernel at the grub screen.&lt;/p&gt;
&lt;p&gt;Rebuild with Intel Compiler&lt;/p&gt;
&lt;p&gt;1.  Perform step 1 in the previous section&lt;/p&gt;
&lt;p&gt;2.  Setup Intel Compiler environment:&lt;/p&gt;
&lt;p&gt;       a.  Set the compiler environment:&lt;/p&gt;
&lt;p&gt;       $ source /opt/intel/Compiler/11.1/XXX/bin/ia32/iccvars_ia32.sh&lt;/p&gt;
&lt;p&gt;       where XXX is the particular version you are using.&lt;/p&gt;
&lt;p&gt;3.  Make source code modifications.&lt;/p&gt;
&lt;p&gt;      a.  Modify include/linux/compiler-intel.h and add the following line at&lt;/p&gt;
&lt;p&gt;the end of the file:&lt;/p&gt;
&lt;p&gt;       #undef __compiler_offsetof&lt;/p&gt;
&lt;p&gt;       b.  Modify arch/x86/include/asm/xor_32.h at line 843, change&lt;/p&gt;
&lt;p&gt;       : "+r" (lines),&lt;/p&gt;
&lt;p&gt;       To:&lt;/p&gt;
&lt;p&gt;       : "+rm" (lines),&lt;/p&gt;
&lt;p&gt;       This change is required because the code is written to work with gcc's assumption that the stack is 16 byte aligned (contrary to the ABI) and thus there is one additional register available.&lt;/p&gt;
&lt;p&gt;c.  Add libirc_s.a to the link command by modifying Makefile at line 699.  Change:&lt;/p&gt;
&lt;p&gt;       --start-group $(vmlinux-main) --end-group&lt;/p&gt;
&lt;p&gt;       to:&lt;/p&gt;
&lt;p&gt;       --start-group $(vmlinux-main) /opt/intel/Compiler/11.1/XXX/lib/ia32/libirc_s.a&lt;/p&gt;
&lt;p&gt;--end-group&lt;/p&gt;
&lt;p&gt;       d.  Modify arch/x86/include/asm/delay.h and remove the references to __bad_udelay and replace the calls to it with 0.&lt;/p&gt;
&lt;p&gt;       e.  Modify include/linux/log2.h and remove the references to ____ilog2_NaN() and replace the calls to it with 0.&lt;/p&gt;
&lt;p&gt;       f.  Modify line 47 of arch/x86/kernel/acpi/realmode/Makefile adding a reference to libirc_s.a as follows:&lt;br /&gt;        WAKEUP_OBJS = $(addprefix $(obj)/,$(wakeup-y)) /opt/intel/Compiler/11.1/053/lib/ia32/libirc_s.a&lt;/p&gt;
&lt;p&gt;        g.  Modify line 89 of arch/x86/boot/Makefile adding a reference to libirc_s.a as follows:&lt;br /&gt;SETUP_OBJS = $(addprefix $(obj)/,$(setup-y)) /opt/intel/Compiler/11.1/053/lib/ia32/libirc_s.a&lt;/p&gt;
&lt;p&gt;        h. Modify kernel/trace/trace_events.c by adding the following line of code (line 915) at the start of event_create_dir():&lt;br /&gt;        if (call-&amp;gt;system==NULL) return -1;&lt;br /&gt;This change is due to a kernel issue where the source code makes alignment assumptions that are not enforced in the kernel source code.  This change is merely a workaround, not a fix for the real issue.&lt;/p&gt;
&lt;p&gt;        i.  Modify the intelwrapper file documented at &lt;a href="http://www.linuxdna.com/"&gt;www.linuxdna.com&lt;/a&gt; and make the following changes:&lt;br /&gt;          - Enable script to replace -march=i686 | -mtune=pentium3 | -mtune=generic with ‘'&lt;br /&gt;          - Enable script to replace -O2 | -Os with ‘-O3 -ip -xSSE3_ATOM'&lt;br /&gt;            Performance BKM: The goal of this option change is to enable higher performance.  Note that the default kernel options uses things such as -mnosse and -fno-omit-frame-pointer which can override the higher optimizations in some places.&lt;br /&gt;          - Enable script to call gcc to compile drivers/net/wimax/i2400m/fw.c | lib/libcrc32c* | crypto/testmgr* - this is required because 11.1 does not yet support some instances of variable length arrays&lt;br /&gt;          - Enable script to call gcc to compile arch/x86/boot/compressed/misc.c - issue with PIC in icc&lt;br /&gt;          - Enable script to call gcc to compile drivers/block/spectra/ffsport.c - inline asm issue&lt;/p&gt;
&lt;p&gt;4.  Start the build:&lt;/p&gt;
&lt;p&gt;       $ cd &amp;lt;build path&amp;gt;/rpmbuild/BUILD/kernel-2.6.31/linux-2.6.31&lt;/p&gt;
&lt;p&gt;       $ make clean&lt;/p&gt;
&lt;p&gt;       $ make HOSTCC=intelwrapper CC=intelwrapper CONFIG_DEBUG_SECTION_MISMATCH=y KBUILD_MODPOST_WARN=n bzImage&lt;/p&gt;
&lt;p&gt;       $ make HOSTCC=intelwrapper CC=intelwrapper CONFIG_DEBUG_SECTION_MISMATCH=y KBUILD_MODPOST_WARN=n modules&lt;/p&gt;
&lt;p&gt;       $ make HOSTCC=intelwrapper CC=intelwrapper CONFIG_DEBUG_SECTION_MISMATCH=y KBUILD_MODPOST_WARN=n modules_install&lt;/p&gt;
&lt;p&gt;       $ make HOSTCC=intelwrapper CC=intelwrapper CONFIG_DEBUG_SECTION_MISMATCH=y KBUILD_MODPOST_WARN=n install&lt;/p&gt;
&lt;p&gt;The make install step will install the kernel and modify grub so that the kernel can be selected upon bootup.&lt;/p&gt;
To build with other configurations, such as the mrst config:&lt;br /&gt;cp configs/kernel-mrst.config .config and go to step 4.&lt;br /&gt;
&lt;div id="art_pre_template"&gt;&lt;strong&gt;&lt;/strong&gt;&lt;/div&gt;&lt;img src="http://feeds.feedburner.com/~r/ISNMain/~4/SJeaiSDu_7c" height="1" width="1"/&gt;</description>
      <link>http://feedproxy.google.com/~r/ISNMain/~3/SJeaiSDu_7c/compile-moblin-21-kernel-sources-with-intel-compiler</link>
      <pubDate>Wed, 18 Nov 2009 09:36:37 -0800</pubDate>
      <comments>http://software.intel.com/en-us/articles/compile-moblin-21-kernel-sources-with-intel-compiler#comments</comments>
      <guid isPermaLink="false">http://software.intel.com/en-us/articles/compile-moblin-21-kernel-sources-with-intel-compiler</guid>
      <category>Intel® Atom™ Software Developer Community</category>
      <category>Intel C++ Tool Suite for MIDs</category>
      <category>Intel® C++ Compiler for Linux* Knowledge Base</category>
    <feedburner:origLink>http://software.intel.com/en-us/articles/compile-moblin-21-kernel-sources-with-intel-compiler</feedburner:origLink></item>
    <item>
      <title>error 409 when building boost libraries 1.40.0 with Intel compiler</title>
      <description>&lt;p&gt;&lt;strong&gt;Problem : &lt;br /&gt;&lt;/strong&gt;When building boost libraries version 1.40.0 with Intel compiler 11.1.046, the compiler report error #409 like below:&lt;/p&gt;
&lt;blockquote&gt;
&lt;p&gt;./boost/wave/cpplexer/re2clex/cpp_re2c_lexer.hpp(119): error #409: "boost::wave::cpplexer::re2clex::lexer&amp;lt;IteratorT, PositionT&amp;gt;::lexer(const IteratorT &amp;amp;, const IteratorT &amp;amp;, const PositionT &amp;amp;, boost::wave::language_support)" provides no initializer for:&lt;br /&gt;const member "boost::wave::cpplexer::re2clex::lexer&amp;lt;IteratorT, PositionT&amp;gt;::cache"&lt;br /&gt;{&lt;br /&gt;^&lt;br /&gt;detected during:&lt;br /&gt;instantiation of "boost::wave::cpplexer::re2clex::lex_functor&amp;lt;IteratorT, PositionT&amp;gt;::lex_functor(const IteratorT &amp;amp;, const IteratorT &amp;amp;, const PositionT &amp;amp;, boost::wave::language_support) [with IteratorT=char *, PositionT=boost::wave::util::file_position_type]" at line 402&lt;br /&gt;instantiation of "boost::wave::cpplexer::lex_input_interface *boost::wave::cpplexer::new_lexer_gen&amp;lt;IteratorT, PositionT&amp;gt;::new_lexer(const IteratorT &amp;amp;, const IteratorT &amp;amp;, const PositionT &amp;amp;, boost::wave::language_support) [with IteratorT=char *, PositionT=boost::wave::util::file_position_type]" at line 52 of "libs/wave/src/instantiate_re2c_lexer.cpp"&lt;/p&gt;
&lt;/blockquote&gt;
&lt;p&gt;&lt;strong&gt;Environment :&lt;/strong&gt; &lt;br /&gt;&lt;br /&gt;Boost libraries version 1.40.0 for linux*&lt;br /&gt;Intel C++ Compiler for linux, version 11.1.046&lt;br /&gt;&lt;br /&gt;&lt;strong&gt;Root Cause :&lt;/strong&gt; &lt;br /&gt;Need initializer for const variable cache defined in file cpp_re2c_lexer.hpp, line 107. Refer this article &lt;a href="http://software.intel.com/en-us/articles/cdiag409"&gt;http://software.intel.com/en-us/articles/cdiag409&lt;/a&gt; for details.&lt;br /&gt;&lt;br /&gt;&lt;strong&gt;Resolution : &lt;br /&gt;&lt;/strong&gt;This error no longer occurs with the Intel® C++ Compiler 11.1.059 for Linux*.  As a workaround as well, you can add an initializer for the const variable cache in file boost/wave/cpplexer/re2clex/cpp_re2c_lexer.hpp. For example:&lt;/p&gt;
&lt;pre name="code" class="cpp"&gt;template &amp;lt;typename IteratorT, typename PositionT&amp;gt;
inline
lexer&amp;lt;IteratorT, PositionT&amp;gt;::lexer(IteratorT const &amp;amp;first, 
IteratorT const &amp;amp;last, PositionT const &amp;amp;pos, 
boost::wave::language_support language_) 
: filename(pos.get_file()), at_eof(false), language(language_),cache(token_cache&amp;lt; typename lexer &amp;lt; IteratorT, PositionT &amp;gt;::string_type &amp;gt;())
{
using namespace std; // some systems have memset in std
memset(&amp;amp;scanner, '\0', sizeof(Scanner));
&lt;/pre&gt;
&lt;p&gt; &lt;/p&gt;&lt;img src="http://feeds.feedburner.com/~r/ISNMain/~4/7pRBLIC0Omw" height="1" width="1"/&gt;</description>
      <link>http://feedproxy.google.com/~r/ISNMain/~3/7pRBLIC0Omw/error-409-when-building-boost-libraries-1400-with-intel-compiler</link>
      <pubDate>Tue, 17 Nov 2009 19:21:42 -0800</pubDate>
      <comments>http://software.intel.com/en-us/articles/error-409-when-building-boost-libraries-1400-with-intel-compiler#comments</comments>
      <guid isPermaLink="false">http://software.intel.com/en-us/articles/error-409-when-building-boost-libraries-1400-with-intel-compiler</guid>
      <category>Intel® C++ Compiler for Linux* Knowledge Base</category>
    <feedburner:origLink>http://software.intel.com/en-us/articles/error-409-when-building-boost-libraries-1400-with-intel-compiler</feedburner:origLink></item>
    <item>
      <title>Intel® Media Software Development Kit (Intel® Media SDK)</title>
      <description>&lt;b&gt;Q1: What did Intel announce?&lt;/b&gt;&lt;br /&gt;&lt;b&gt;A1:&lt;/b&gt; At the Intel Developers Forum, Intel announced the availability of the Intel® Media Software Development Kit (SDK), a tool specifically designed for software developers of media applications for video playback and encoding. Intel Media SDK enables developers to advantage of hardware acceleration in Intel platforms and future-proofs the software by allowing developers to program once and enjoy performance gains on future Intel processors and graphics chipsets.&lt;br /&gt;&lt;br /&gt;&lt;b&gt;Q2: What are the benefits to using Intel Media SDK?&lt;/b&gt;&lt;br /&gt;&lt;b&gt;A2:&lt;/b&gt; Developers using Intel Media SDK no longer have to write separate code paths to tap into platform specific hardware acceleration to improve video performance. The Intel Media SDK features a single API that streamlines workflow and exploits hardware acceleration capabilities within Intel hardware. Additionally, applications integrating Intel Media SDK today will take advantage of hardware acceleration capabilities of future graphics processing solutions without rewriting the program code.&lt;br /&gt;&lt;br /&gt;&lt;b&gt;Q3: Is the Intel Media SDK setting the stage for future multi-core products?&lt;/b&gt;&lt;br /&gt;&lt;b&gt;A3:&lt;/b&gt; Intel Media SDK helps developers produce future-proofed code by using a single API that supports today's hardware as well as well as hardware that will be available in the future. This API is available for developers to evaluate now through membership in Intel's Visual Adrenaline developer program at www.intel.com/software/media. &lt;br /&gt;&lt;br /&gt;&lt;b&gt;Q4: Are there developers currently using Intel Media SDK to optimize their media applications?&lt;/b&gt;&lt;br /&gt;&lt;b&gt;A4:&lt;/b&gt; Yes, Intel has worked with a number of media application developers in the Alpha and Beta phases leading to this announcement. Developers including Corel*, CyberLink*, and Sonic* are just a few of the companies working with Intel to develop and refine this tool. These same developers have made public their intentions to use the Intel Media SDK in future products.&lt;br /&gt;&lt;br /&gt;&lt;b&gt;Q5: What platforms does Intel Media SDK support?&lt;/b&gt;&lt;br /&gt;&lt;b&gt;A5:&lt;/b&gt; Intel Media SDK supports a broad selection of hardware platforms including Intel Integrated Graphics chipsets (starting with Intel® G45/GM45 Express Chipsets), Intel® Architecture Processors (for software-based encode and decode) and third-party graphics platforms (through DLL extensions). Intel® Media SDK supports the Windows* Vista operating system (32-bit and 64-bit) with Windows* 7 support planned for a future release.&lt;br /&gt;&lt;br /&gt;&lt;b&gt;Q6: Does the Intel Media SDK tool work with non-Intel graphics?&lt;/b&gt;&lt;br /&gt;&lt;b&gt;A6:&lt;/b&gt; The API within the Intel Media SDK is extensible, allowing development teams to create dynamic link libraries (DLL) that support platform-specific implementations, including hardware from third party vendors.&lt;br /&gt;&lt;br /&gt;&lt;b&gt;Q7: What is the pricing for the Intel Media SDK?&lt;/b&gt;&lt;br /&gt;&lt;b&gt;A7:&lt;/b&gt; The Intel Media SDK is a free download to members of the Visual Adrenaline Developer program. The Visual Adrenaline Developer program is a no-cost, individual membership offering visual computing developers insight on Intel's software tools, community interaction and developer support. For more information on the Visual Adrenaline developer program visit: &lt;a href="http://intel.com/software/graphics/"&gt;http://intel.com/software/graphics/&lt;/a&gt;. For information on downloading the Intel Media SDK, visit &lt;a href="http://www.intel.com/software/media/"&gt;http://www.intel.com/software/media/&lt;/a&gt;.&lt;br /&gt;&lt;br /&gt;&lt;b&gt;Q8: What video codecs does Intel Media SDK support?&lt;/b&gt;&lt;br /&gt;&lt;b&gt;A8:&lt;/b&gt; Intel Media SDK supports encode of AVC/H.264/MPEG-4 part 10 (an international standard for compressing/decompressing video) and MPEG-2 video and decode support for AVC/H.264, MPEG-2 video, and VC-1.&lt;br /&gt;&lt;br /&gt;&lt;b&gt;Q9: Does Intel Media SDK support any video pre-processing features?&lt;/b&gt;&lt;br /&gt;&lt;b&gt;A9:&lt;/b&gt; Yes, Intel Media SDK supports pre-processing functions, including: Inverse Telecine, Scene Detection, Deinterlacing, Denoising, Resizing and Color conversion.&lt;br /&gt;&lt;br /&gt;&lt;b&gt;Q10: How does Intel Media SDK work when no hardware acceleration is available?&lt;/b&gt;&lt;br /&gt;&lt;b&gt;A10:&lt;/b&gt; When hardware is not present for acceleration of decode or encode, Intel Media SDK will fall back to using software. This software will function on legacy and non-Intel CPUs. It is designed to not degrade performance on those non-Intel CPUs, but is not optimized for performance. Performance optimization is included for Intel processors and is fully threaded and utilizes a heritage of software encoders and decoders within the Intel® Integrated Performance Primitives (Intel® IPP) product.&lt;br /&gt;&lt;br /&gt;&lt;b&gt;Q11: Does Intel Media SDK software fall back on use of Intel® Streaming SIMD Extensions (Intel® SSE)?&lt;/b&gt;&lt;br /&gt;&lt;b&gt;A11:&lt;/b&gt; All instruction level optimizations for software fallback originate from Intel® Integrated Performance Primitives (Intel® IPP). Intel guarantees functionality on competitive processors; however performance optimizations are designed for Intel processors. Intel Media SDK 1.0 supports instructions up to Intel® Streaming SIMD Extensions 4.1 (Intel® SSE 4.1).&lt;br /&gt;&lt;br /&gt;&lt;b&gt;Q12: Is H.264 optimized for transmission latency?&lt;/b&gt;&lt;br /&gt;&lt;b&gt;A12:&lt;/b&gt; Intel Media SDK is not optimized for offline video editing, transcoding or video playback usages for streaming or video conferencing usage models where latency would be a focus.&lt;br /&gt;&lt;br /&gt;&lt;b&gt;Q13: Why limit support to the Microsoft Windows* operating environments?&lt;/b&gt;&lt;br /&gt;&lt;b&gt;A13:&lt;/b&gt; Intel is first supporting the Microsoft Windows Vista operating system (32-bit and 64-bit) with Microsoft Windows* 7 support planned for a future release. Intel continues to monitor customer feedback and will factor customer needs into future product plans.&lt;br /&gt;&lt;br /&gt;&lt;b&gt;Q14: Does the Intel Media SDK support Apple Mac OS and Apple platforms based on Intel hardware?&lt;/b&gt;&lt;br /&gt;&lt;b&gt;A14:&lt;/b&gt; For Intel's initial version of Intel Media SDK we chose to support Windows Vista and in the future will support Microsoft Windows 7 in order to support a broad customer base with the first release. Intel continues to monitor customer feedback and will factor customer needs into future product plans.
&lt;p&gt;&lt;br /&gt;&lt;strong&gt;Q15: How can I use my own SW library for encoding or decoding instead of using the Intel supplied library?&lt;/strong&gt;&lt;br /&gt;&lt;strong&gt;A15:&lt;/strong&gt; Replace libmfxsw32.dll or libmfxsw64.dll with your own SW library DLL. Use the same naming, and place into your unique install directory.&lt;/p&gt;&lt;img src="http://feeds.feedburner.com/~r/ISNMain/~4/h-W_MZ54l0I" height="1" width="1"/&gt;</description>
      <link>http://feedproxy.google.com/~r/ISNMain/~3/h-W_MZ54l0I/intel-media-software-development-kit-intel-media-sdk</link>
      <pubDate>Tue, 17 Nov 2009 10:43:59 -0800</pubDate>
      <comments>http://software.intel.com/en-us/articles/intel-media-software-development-kit-intel-media-sdk#comments</comments>
      <guid isPermaLink="false">http://software.intel.com/en-us/articles/intel-media-software-development-kit-intel-media-sdk</guid>
      <category>Visual Computing</category>
      <category>Media</category>
    <feedburner:origLink>http://software.intel.com/en-us/articles/intel-media-software-development-kit-intel-media-sdk</feedburner:origLink></item>
  </channel>
</rss>
