<?xml version="1.0" encoding="UTF-8"?>
<?xml-stylesheet type="text/xsl" media="screen" href="/~d/styles/rss2full.xsl"?><?xml-stylesheet type="text/css" media="screen" href="http://feeds.feedburner.com/~d/styles/itemcontent.css"?><!-- Generated on Mon, 06 Jul 2009 01:11:37 -0700 --><rss xmlns:atom="http://www.w3.org/2005/Atom" xmlns:feedburner="http://rssnamespace.org/feedburner/ext/1.0" version="2.0">
  <channel>
    
    <title>Intel Threading for Multi-Core Community</title>
    <link>http://software.intel.com/en-us/articles/multi-core/all</link>
    <description />
    <language>en-us</language>
    <atom10:link xmlns:atom10="http://www.w3.org/2005/Atom" rel="self" href="http://feeds.feedburner.com/ISNMulticore" type="application/rss+xml" /><feedburner:emailServiceId>ISNMulticore</feedburner:emailServiceId><feedburner:feedburnerHostname>http://feedburner.google.com</feedburner:feedburnerHostname><atom10:link xmlns:atom10="http://www.w3.org/2005/Atom" rel="hub" href="http://pubsubhubbub.appspot.com" /><item>
      <title>Intel® Threading Challenge 2009 - First 4 Winners</title>
      <description>&lt;div&gt;Problem #4 - String Matching - Winner Announced:&lt;/div&gt;
&lt;div&gt;Congratulations to "BradleyKuszmaul" who is our 4th problem winner.&lt;/div&gt;
&lt;div&gt;&lt;br /&gt;&lt;/div&gt;
&lt;div&gt;Problem #3 - Searching - Winner Announced:&lt;/div&gt;
&lt;div&gt;Congratulations to "denghui0815" who is our 3rd problem winner.&lt;/div&gt;
&lt;div&gt;&lt;br /&gt;&lt;/div&gt;
&lt;div&gt;Problem #2 - 3SAT - Winner Announced:&lt;/div&gt;
&lt;div&gt;Congratulations to "haojn" who is our 2nd problem winner.&lt;/div&gt;
&lt;div&gt;&lt;br /&gt;&lt;/div&gt;
&lt;div&gt;Problem #1 - Radix Sort - Winner Announced:&lt;/div&gt;
&lt;div&gt;Congratulations to "denghui0815" who is our 1st problem winner.&lt;/div&gt;&lt;img src="http://feeds.feedburner.com/~r/ISNMulticore/~4/EI1AMcsKYVY" height="1" width="1"/&gt;</description>
      <link>http://feedproxy.google.com/~r/ISNMulticore/~3/EI1AMcsKYVY/intel-threading-challenge-2009-first-4-winners</link>
      <pubDate>Thu, 02 Jul 2009 12:10:28 -0700</pubDate>
      <comments>http://software.intel.com/en-us/articles/intel-threading-challenge-2009-first-4-winners#comments</comments>
      <guid isPermaLink="false">http://software.intel.com/en-us/articles/intel-threading-challenge-2009-first-4-winners</guid>
      <category>Parallel Programming and Multi-Core</category>
    <feedburner:origLink>http://software.intel.com/en-us/articles/intel-threading-challenge-2009-first-4-winners</feedburner:origLink></item>
    <item>
      <title>Joe Duffy architect of Parallel Extensions to .NET &amp; author of &amp;#34;Concurrent Programming on Windows&amp;#34; on Parallel Programming Talk</title>
      <description>&lt;span style="font-family: verdana, sans-serif; line-height: 16px;"&gt;Aaron &amp;amp; Clay talked with Joe Duffy of Microsoft on the 37th episode of Parallel Programming Talk of Parallel Programming Talk. Joe Duffy is the lead developer and architect for Parallel Extensions to .NET. He is the author of two books: Concurrent Programming on Windows and Professional .NET Framework 2.0.&lt;/span&gt;&lt;img src="http://feeds.feedburner.com/~r/ISNMulticore/~4/0ZDIY9tXbc8" height="1" width="1"/&gt;</description>
      <link>http://feedproxy.google.com/~r/ISNMulticore/~3/0ZDIY9tXbc8/joe-duffy-architect-of-parallel-extensions-to-net-author-of-concurrent-programming-on-windows-on-parallel-programming-talk</link>
      <pubDate>Thu, 02 Jul 2009 12:06:39 -0700</pubDate>
      <comments>http://software.intel.com/en-us/articles/joe-duffy-architect-of-parallel-extensions-to-net-author-of-concurrent-programming-on-windows-on-parallel-programming-talk#comments</comments>
      <guid isPermaLink="false">http://software.intel.com/en-us/articles/joe-duffy-architect-of-parallel-extensions-to-net-author-of-concurrent-programming-on-windows-on-parallel-programming-talk</guid>
      <category>Parallel Programming and Multi-Core</category>
    <feedburner:origLink>http://software.intel.com/en-us/articles/joe-duffy-architect-of-parallel-extensions-to-net-author-of-concurrent-programming-on-windows-on-parallel-programming-talk</feedburner:origLink></item>
    <item>
      <title>Major Software Tools Update to Intel Compilers and Libraries</title>
      <description>&lt;span style="font-family: verdana, sans-serif;"&gt;
&lt;p style="font-family: verdana, sans-serif; margin-top: 0px; margin-right: 0px; margin-bottom: 10px; margin-left: 0px; line-height: 16px; padding: 0px;"&gt;On June 23 Intel Software Product Division released updates for our C++ and Fortran compilers, Intel Math Kernel (MKL) and Intel Integrated Performance Primitives (IPP) libraries and Cluster toolkits. Noteworthy additions include outstanding performance enhancements, support of Intel® Advanced Vector Extensions (AVX) and inclusion of some elements that debuted in Intel® Parallel Studio last month.&lt;/p&gt;
&lt;p style="font-family: verdana, sans-serif; margin-top: 0px; margin-right: 0px; margin-bottom: 10px; margin-left: 0px; line-height: 16px; padding: 0px;"&gt;Features to note including our AVX and AES support in the tools, our adaptation of some of new features from Parallel Studio to Linux and Mac OS X, and really great tuning of our performance leading MPI library.&lt;/p&gt;
&lt;p style="font-family: verdana, sans-serif; margin-top: 0px; margin-right: 0px; margin-bottom: 10px; margin-left: 0px; line-height: 16px; padding: 0px;"&gt;The specific new product versions are:&lt;/p&gt;
&lt;p style="font-family: verdana, sans-serif; margin-top: 0px; margin-right: 0px; margin-bottom: 10px; margin-left: 0px; line-height: 16px; padding: 0px;"&gt;&lt;a style="font-family: verdana, sans-serif; color: #0860a8; text-decoration: none; padding: 0px; margin: 0px; border: 0px initial initial;" href="http://software.intel.com/en-us/intel-compilers/"&gt;Intel® Professional Edition Compilers 11.1 (Fortran &amp;amp; C/C++, for Windows, Linux, Mac OS X)&lt;/a&gt;&lt;br style="font-family: verdana, sans-serif; padding: 0px; margin: 0px;" /&gt;&lt;a style="font-family: verdana, sans-serif; color: #0860a8; text-decoration: none; padding: 0px; margin: 0px; border: 0px initial initial;" href="http://software.intel.com/en-us/intel-ipp/"&gt;Intel® Integrated Performance Primitives (IPP) 6.1 (for Windows, Linux, Mac OS X)&lt;/a&gt;&lt;br style="font-family: verdana, sans-serif; padding: 0px; margin: 0px;" /&gt;&lt;a style="font-family: verdana, sans-serif; color: #0860a8; text-decoration: none; padding: 0px; margin: 0px; border: 0px initial initial;" href="http://software.intel.com/en-us/intel-mkl/"&gt;Intel® Math Kernel Library (MKL) 10.2 (for Windows, Linux, Mac OS X)&lt;/a&gt;&lt;br style="font-family: verdana, sans-serif; padding: 0px; margin: 0px;" /&gt;&lt;a style="font-family: verdana, sans-serif; color: #0860a8; text-decoration: none; padding: 0px; margin: 0px; border: 0px initial initial;" href="http://software.intel.com/en-us/intel-cluster-toolkit/"&gt;Intel® Cluster Toolkit, Compiler Edition 3.2.1 (for Windows, Linux)&lt;/a&gt;&lt;br style="font-family: verdana, sans-serif; padding: 0px; margin: 0px;" /&gt;&lt;a style="font-family: verdana, sans-serif; color: #0860a8; text-decoration: none; padding: 0px; margin: 0px; border: 0px initial initial;" href="http://software.intel.com/en-us/intel-mpi-library/"&gt;Intel® MPI Library 3.2.1 (for Windows, Linux)&lt;/a&gt;&lt;/p&gt;
&lt;/span&gt;&lt;img src="http://feeds.feedburner.com/~r/ISNMulticore/~4/0yrbRReSCw4" height="1" width="1"/&gt;</description>
      <link>http://feedproxy.google.com/~r/ISNMulticore/~3/0yrbRReSCw4/major-software-tools-update-to-intel-compilers-and-libraries</link>
      <pubDate>Thu, 02 Jul 2009 12:05:13 -0700</pubDate>
      <comments>http://software.intel.com/en-us/articles/major-software-tools-update-to-intel-compilers-and-libraries#comments</comments>
      <guid isPermaLink="false">http://software.intel.com/en-us/articles/major-software-tools-update-to-intel-compilers-and-libraries</guid>
      <category>Parallel Programming and Multi-Core</category>
    <feedburner:origLink>http://software.intel.com/en-us/articles/major-software-tools-update-to-intel-compilers-and-libraries</feedburner:origLink></item>
    <item>
      <title>Q&amp;A from Webinar: Find Errors in Windows* C++ Parallel Applications</title>
      <description>&lt;strong&gt;Q1. Can you disable a single specific parallel region? &lt;br /&gt;&lt;/strong&gt;
&lt;blockquote&gt;
&lt;p&gt;A: The "Serialize Parallel Region" option of the Intel(R) Parallel Debugger extensions temporarily sets the OpenMP* omp_set_num_threads() environment variable to 1, thus forcing single threaded execution even on a multi-core system. This temporary change applies to the next parallel block or parallel region in your code relative to the current EIP or program counter location.&lt;br /&gt;&lt;br /&gt;Thus, yes - the "Serialize Parallel Region" option can be applied to a specific parallal region of your choice. You can do so by setting a breakpoint just before you enter the parallel region you would like to have executed as a single serial thread and then selecting the serialization option from the Intel(R) Parallel Debugger Extension menu inside Microsoft* Visual Studio. &lt;/p&gt;
&lt;/blockquote&gt;
&lt;br /&gt;&lt;strong&gt;Q2. Do the Parallel Debugger Extensions only support OpenMP* or also native Windows* threads or Threading Building Blocks?  &lt;/strong&gt;&lt;br /&gt;
&lt;blockquote&gt;A: Most of the Parallel Debugger Extension features like Thread Data Sharing Event Detection, Function Reentrancy Detection amd Serialize Parallel Region, rely on instrumentation of debug information and on the OpenMP* library. As such these features are currently only available for OpenMP* based threading. The one feature that is independent of the threading model used are the enhanced and highly configurable SSE register windows.&lt;/blockquote&gt;
&lt;br /&gt;&lt;strong&gt;Q3. Do the Intel(R) Parallel Debugger Extensions use similar instrumentations as the Intel(R) Parallel Inspector?  &lt;br /&gt;&lt;/strong&gt;
&lt;blockquote&gt;A: The debug symbol information instrumentation done by the Intel(R) C++ Compiler when the /debug:parallel option is set along with /Zi is different from the code instrumentations used by the Intel(R) Parallel Inspector for it's instrumentation assisted operating mode.&lt;br /&gt;The Intel(R) Parallel Debugger Extensions do not rely on executable code instrumentation, but rather on instrumentation of the symbol information used for debugging. As such the Parallel Debugger Extensions cannot statically anaylze the execution flow, but rely on a detectable event that may be of interest happening at real time during a debug session. At the same time, because only the debug information is instrumented there should only be very minimal performance impact on the execuatble if run outside the Microsoft* Visual Studio Debugger.&lt;/blockquote&gt;
&lt;br /&gt;&lt;strong&gt;Q4. Is the compiler option /Qpenmp required for use of the Intel(R) Parallel Debugger Extension?&lt;/strong&gt;
&lt;blockquote&gt;A: Yes, all enhanced parallelism features of the Intel(R) Parallel Debugger Extensions rely on OpenMP* based threading, except for the SSE register windows.&lt;/blockquote&gt;
&lt;br /&gt;&lt;strong&gt;Q5.  Do the Intel(R) Parallel Debugger Extensions require the use of the Intel(R) Compiler?&lt;/strong&gt;
&lt;blockquote&gt;A: Yes, the Parallel Debugger Extensions rely on debug info instrumentation added with the Intel(R) Compiler option /debug:parallel in conjunction with /Qopenmp. Therefore the full capabilities of the Intel(R) Parallel Debugger Extensions are only available when used with the Intel(R) Compiler.&lt;/blockquote&gt;
&lt;br /&gt;&lt;strong&gt;Q6. Can I use the Intel(R) Parallel Debugger Extensions to debug parallelism in the Intel(R) Integrated Performance Primitives and to serialize execution in them?&lt;/strong&gt;
&lt;blockquote&gt;A: In principle yes, BUT this would require rebuilding and relinking the Intel(R) IPP with symbol information and /debug:parallel. Since you are most likely taking the primitives from prebuilt libraries that you link into your project, this not really a supported usage model, although it may work in some cases depending on how the call to the Intel(R) IPP function of your choice is embedded in the rest of your application.&lt;br /&gt;The short answer thus is really no, with some exceptions.&lt;/blockquote&gt;
&lt;strong&gt;&lt;br /&gt;Q7.  Does the OpenMP* library have to be linked in statically? Can 3rd party OpenMP* libraries be used?&lt;/strong&gt;&lt;br /&gt;
&lt;blockquote&gt;A: The OpenMP* library can be linked in statically or dynamically into your application build for the use of the Intel(R) Parallel Debugger Extension. The OpenMP* library used by the Intel(R) C++ Compiler is really a standard OpenMP* library. However, there is the dependency on the debug information instrumentation using /debug:parallel. This instrumentation has only been tested and is only expected to work with the OpenMP* libraries provided with the Intel(R) Compiler.&lt;/blockquote&gt;
&lt;br /&gt;&lt;strong&gt;Q8. What is the main benefit of the SSE Register Window? Does it depend on OpenMP*?&lt;/strong&gt;
&lt;blockquote&gt;A: The SSE Register Window allows you to group the display of the register contents and display said contents in the exact way that you are using it in your parallelized loops, your structured arrays or other parallel structures. By doing this the highly configurable SSE Register Window provides you with the link between your data as it is used in your application and the way this very same data is actually stored and processed in the SSE registers.&lt;br /&gt;&lt;br /&gt;This can be quite valuable for understanding more complex heavily parallel multimedia or graphics code for instants.&lt;br /&gt;&lt;br /&gt;This feature does not rely on any instrumentation or any specific threading implementation. It is independent of OpenMP*. &lt;/blockquote&gt;
&lt;br /&gt;&lt;strong&gt;For additional questions please also refer to the Intel(R) Parallel Debugger Extension article and whitepaper at &lt;a target="_blank" href="http://software.intel.com/en-us/articles/parallel-debugger-extension/" title="Intel(R) Parallel Debugger Extension Article"&gt;http://software.intel.com/en-us/articles/parallel-debugger-extension/&lt;/a&gt;&lt;/strong&gt;&lt;img src="http://feeds.feedburner.com/~r/ISNMulticore/~4/7zhTJrhu6vc" height="1" width="1"/&gt;</description>
      <link>http://feedproxy.google.com/~r/ISNMulticore/~3/7zhTJrhu6vc/qa-from-webinar-find-errors-in-parallel-applications</link>
      <pubDate>Tue, 30 Jun 2009 16:56:46 -0700</pubDate>
      <comments>http://software.intel.com/en-us/articles/qa-from-webinar-find-errors-in-parallel-applications#comments</comments>
      <guid isPermaLink="false">http://software.intel.com/en-us/articles/qa-from-webinar-find-errors-in-parallel-applications</guid>
      <category>Parallel Programming and Multi-Core</category>
      <category>Intel® Compilers</category>
      <category>Intel® Parallel Composer Knowledge Base</category>
    <feedburner:origLink>http://software.intel.com/en-us/articles/qa-from-webinar-find-errors-in-parallel-applications</feedburner:origLink></item>
    <item>
      <title>Intel and IBM Collaborate to Boost Performance Lower Power Consumption</title>
      <description>&lt;span class="sectionHeading"&gt;Abstract &lt;/span&gt;&lt;br /&gt; &lt;br /&gt;Timely, trusted information is the currency of success at all levels of business. But increasing data volumes are making it more difficult to deliver that information. And as data volumes go up, so do the costs of data management. For more than a decade, IBM and Intel have collaborated to optimize enterprise solutions: Complete, cost-effective, performance-optimized stacks of IBM® Information Management software running on servers powered by Intel® processors. Our relentless pursuit of performance has led to some impressive results. Compared to what customers could purchase just over a decade ago, they can now benefit from over 600 times the transaction performance from IBM DB2® on Intel-based servers at nearly 99 percent less cost per transaction. &lt;br /&gt;&lt;br /&gt; &lt;span class="sectionHeading"&gt;Download Full PDF &lt;/span&gt;&lt;br /&gt; &lt;a href="http://software.intel.com/file/20463"&gt;&lt;br /&gt;Intel and IBM collaborate to boost performance lower power consumption&lt;/a&gt; [PDF 256kb]&lt;br /&gt;&lt;br /&gt; &lt;span class="sectionHeading"&gt;Customer Testimonials &lt;/span&gt;
&lt;p align="left"&gt;&lt;br /&gt; "Wherescape was founded  about 11 years ago in 1998 entirely for the purpose of helping customers  expedite the process of creating, building, and managing their data warehouses."&lt;br /&gt; &lt;strong&gt;Video Script&lt;/strong&gt;&lt;br /&gt; &lt;strong&gt;Mark Budzinski&lt;/strong&gt;&lt;br /&gt; &lt;strong&gt;VP &amp;amp; GM&lt;/strong&gt;&lt;br /&gt; &lt;strong&gt;WhereScape  USA, Inc.&lt;/strong&gt;&lt;/p&gt;
&lt;p align="left"&gt;&lt;em&gt;&lt;strong&gt;Data  Warehousing&lt;/strong&gt;&lt;/em&gt;&lt;/p&gt;
&lt;p align="left"&gt;"We had a customer last year  who purchased a bigger server for their data warehouse because they needed more  bandwidth for daily processing and couldn’t put it into their datacenter  because it wouldn’t physically fit into the room."&lt;br /&gt; &lt;strong&gt;Jason Laws&lt;/strong&gt;&lt;br /&gt; &lt;strong&gt;Chief  Architect&lt;/strong&gt;&lt;br /&gt; &lt;strong&gt;WhereScape  Inc.&lt;/strong&gt;&lt;/p&gt;
&lt;p align="left"&gt;"They say the most expensive  server you’re gonna purchase is the one that causes you to build your next  datacenter.  A lot of people are looking  to take their existing datacenter foot print, try and cost reduce it as much as  possible." &lt;br /&gt; &lt;strong&gt;Shannon  Poulin&lt;/strong&gt;&lt;br /&gt; &lt;strong&gt;Director,  Xeon Platform Marketing&lt;/strong&gt;&lt;br /&gt; &lt;strong&gt;Intel Corp.&lt;/strong&gt;&lt;br /&gt; &lt;br /&gt; &lt;span class="style2"&gt;&lt;strong&gt;Intel&lt;/strong&gt;® &lt;strong&gt;Xeon&lt;/strong&gt;® &lt;strong&gt;Processor 5500 Series&lt;/strong&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p align="left"&gt;The way that you do that is  you put in these new Xeon 5500 series servers that consume lower energy.&lt;/p&gt;
&lt;p align="left"&gt;&lt;em&gt;&lt;strong&gt;Energy  Savings&lt;/strong&gt; &lt;/em&gt;&lt;/p&gt;
&lt;p align="left"&gt;or the same energy as the ones they were  replacing but deliver more performance.&lt;/p&gt;
&lt;p align="left"&gt;&lt;em&gt;&lt;strong&gt;Intelligent  Performance&lt;/strong&gt;&lt;/em&gt;&lt;/p&gt;
&lt;p align="left"&gt;"The intelligent performance  of the chips saves energy by turning off processors when they’re not being  used. Power isn’t being used unnecessarily to run processors that are doing  nothing." &lt;br /&gt; &lt;strong&gt;Jason Laws&lt;/strong&gt;&lt;/p&gt;
&lt;p align="left"&gt;&lt;em&gt;&lt;strong&gt;Intel-IBM  Relationship&lt;/strong&gt;&lt;/em&gt;&lt;/p&gt;
&lt;p align="left"&gt;"We have a long history of working together of creating  unique innovation where we can get the best of DB2 working together with the  best of Intel. We have delivered a whole new level of innovation with DB2 9.7  on the Intel Xeon Processor 5500 Series." &lt;br /&gt; &lt;strong&gt;Berni Schiefer&lt;/strong&gt;&lt;br /&gt; &lt;strong&gt;Distinguished Engineer&lt;/strong&gt;&lt;br /&gt; &lt;strong&gt;IBM, Inc.&lt;/strong&gt;&lt;/p&gt;
&lt;p align="left"&gt;"The Xeon 5500 series, that  provides almost 80% better performance over the previous generation of processors  –producing outstanding results, lowering the cost of operation for our clients."&lt;br /&gt; &lt;strong&gt;Sal Vella&lt;/strong&gt;&lt;br /&gt; &lt;strong&gt;VP Development DB2&lt;/strong&gt;&lt;br /&gt; &lt;strong&gt;IBM, Inc.&lt;/strong&gt;&lt;/p&gt;
&lt;p align="left"&gt;"And we’ve been able to do  that at nearly a 50% improvement in performance per watt."&lt;br /&gt; &lt;strong&gt;Shannon Poulin&lt;/strong&gt;&lt;/p&gt;
&lt;p align="left"&gt;"We’ve shown not only that  you can achieve superb performance results by combining the DB2 product with  the Intel processor but we were able to do that with an absolute minimum amount  of tuning."&lt;br /&gt; &lt;strong&gt;Berni Schiefer&lt;/strong&gt;&lt;/p&gt;
&lt;p align="left"&gt;"We have a self-tuning memory manager that looks at the  system memory and says, where should I allocate it for best performance  depending on the kind of workload?  So  terrific technology automating things that normally the database administrator  would have to do themselves." &lt;br /&gt; &lt;strong&gt;Sal Vella&lt;/strong&gt;&lt;/p&gt;
&lt;p align="left"&gt;&lt;em&gt;&lt;strong&gt;Solution  Migration&lt;/strong&gt;&lt;/em&gt;&lt;/p&gt;
&lt;p align="left"&gt;"This migration is actually  pretty easy. We have a partner in China called NewSoft. The sizing to  build the solution was 25-person years which is pretty significant. We did it  over a weekend with one guy. That is how easy it is to get to DB2 9.7."&lt;br /&gt; &lt;strong&gt;Boris Bialek&lt;/strong&gt;&lt;br /&gt; &lt;strong&gt;Program  Director, Data Management Solutions&lt;/strong&gt;&lt;br /&gt; &lt;strong&gt;IBM, Inc.&lt;/strong&gt;&lt;/p&gt;
&lt;p align="left"&gt;&lt;em&gt;&lt;strong&gt;Compression  Technologies&lt;/strong&gt; &lt;/em&gt;&lt;/p&gt;
&lt;p align="left"&gt;"We are industry leading in terms of our compression  technologies and capabilities. In DB2 9.7 we’ve really extended that to a whole  new level.  The rule of thumb for a data  warehouse is that a third of the size of the database is in your data tables;  another third is in your indexes; another third is in temp space. So in 9.7  we’ve addressed the other two-thirds, really, of that triangle. We’ve  introduced compression for indexes and compression for temporary tables and  have gotten fantastic results."&lt;br /&gt; &lt;strong&gt;Richard  Hedges&lt;/strong&gt;&lt;br /&gt; &lt;strong&gt;Dir. of New  Development – DB2&lt;/strong&gt;&lt;br /&gt; &lt;strong&gt;IBM, Inc.&lt;/strong&gt;&lt;br /&gt; &lt;strong&gt; &lt;/strong&gt;&lt;br /&gt; "And when we did some tests with compression we  found the new DB2 9.7 and the new Xeon 5500 series processors were a lot faster  during compression on large tables."&lt;br /&gt; &lt;strong&gt;Jason Laws&lt;/strong&gt;&lt;strong&gt; &lt;/strong&gt;&lt;/p&gt;
&lt;p align="left"&gt;&lt;em&gt;&lt;strong&gt;Increased  Performance&lt;/strong&gt; &lt;/em&gt;&lt;/p&gt;
&lt;p align="left"&gt;Every test we did was faster. In fact some of the  tests they ran twice as fast.&lt;/p&gt;
&lt;p align="left"&gt;"It’s a huge cost savings for our clients, in many cases  resulting in millions of dollars of savings."&lt;br /&gt; &lt;strong&gt;Sal Vella&lt;/strong&gt;&lt;/p&gt;
&lt;p align="left"&gt;&lt;span class="style1"&gt;&lt;strong&gt;Intel&lt;/strong&gt;® &lt;strong&gt;Xeon&lt;/strong&gt;® &lt;strong&gt;Processor 5500 Series&lt;br /&gt; IBM DB2&lt;/strong&gt;® &lt;strong&gt;9.7&lt;br /&gt; Energy  Savings&lt;br /&gt; Intelligent  Performance&lt;/strong&gt;&lt;br /&gt; &lt;strong&gt;Compression  Technologies&lt;br /&gt; Ease of  Use&lt;/strong&gt; &lt;/span&gt;&lt;/p&gt;
&lt;p align="left"&gt;"And when you really consider what’s going on now  with Intel’s intelligent performance, you consider that with what IBM is up to with 9.7 DB2, goodness, this is not  business as usual. This is really game changing technology. That when  appropriately applied you can get the performance gains that are truly  remarkable but do it in such a way that you are managing your power  requirements and your other costs as well. "&lt;br /&gt; &lt;strong&gt;Mark Budzinski&lt;/strong&gt;&lt;/p&gt;&lt;img src="http://feeds.feedburner.com/~r/ISNMulticore/~4/u1sSDDOdKc4" height="1" width="1"/&gt;</description>
      <link>http://feedproxy.google.com/~r/ISNMulticore/~3/u1sSDDOdKc4/intel-and-ibm-collaborate-to-boost-performance-lower-power-consumption</link>
      <pubDate>Thu, 25 Jun 2009 12:55:12 -0700</pubDate>
      <comments>http://software.intel.com/en-us/articles/intel-and-ibm-collaborate-to-boost-performance-lower-power-consumption#comments</comments>
      <guid isPermaLink="false">http://software.intel.com/en-us/articles/intel-and-ibm-collaborate-to-boost-performance-lower-power-consumption</guid>
      <category>Parallel Programming and Multi-Core</category>
    <feedburner:origLink>http://software.intel.com/en-us/articles/intel-and-ibm-collaborate-to-boost-performance-lower-power-consumption</feedburner:origLink></item>
    <item>
      <title>June 30th Parallel Programming Talk - MS Parallel Extensions to .NET and MS Task Parallel Library</title>
      <description>&lt;span style="font-size: small;"&gt;&lt;span style="border-collapse: collapse; font-size: 13px; white-space: pre; -webkit-border-horizontal-spacing: 2px; -webkit-border-vertical-spacing: 2px;"&gt;&lt;span style="border-collapse: separate; font-size: medium; white-space: normal; -webkit-border-horizontal-spacing: 0px; -webkit-border-vertical-spacing: 0px;"&gt;
&lt;div style="font-family: Verdana, Arial, Helvetica, sans-serif; padding-top: 0px; padding-right: 15px; padding-bottom: 15px; padding-left: 10px; color: #000000; font-size: 11px; background-image: initial; background-repeat: initial; background-attachment: initial; -webkit-background-clip: initial; -webkit-background-origin: initial; background-color: #ffffff; background-position: initial initial; margin: 8px;"&gt;&lt;span style="font-family: Arial, Helvetica, sans-serif; font-size: 12px; font-weight: bold; "&gt;
&lt;h1 style="margin-top: 0px; margin-right: 0px; margin-bottom: 0px; margin-left: 0px; font-size: 12px; "&gt;On the June 30th Parallel Programming Talk Joe Duffy from Microsoft will discuss the MS Parallel Extensions to .NET and MS Task Parallel Library. Joe is a rock star among .Net C# developers. He is the lead developer and architect for Parallel Extensions to .NET. He is the author of two books: Concurrent Programming on Windows and Professional .NET Framework 2.0 We’ll be talking to Joe about his thoughts and experiences with threading applications for the Windows environment, especially with regards to the .NET Framework.&lt;/h1&gt;
&lt;h1 style="margin-top: 0px; margin-right: 0px; margin-bottom: 0px; margin-left: 0px; font-size: 12px; "&gt;&lt;a style="font-family: verdana, sans-serif; color: #0860a8; text-decoration: none; padding: 0px; margin: 0px; border: 0px initial initial;" href="Intel.com/software/tv"&gt;Tune is LIVE on June 30th at 8:00AM PST&lt;/a&gt;&lt;/h1&gt;
&lt;/span&gt;&lt;/div&gt;
&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;img src="http://feeds.feedburner.com/~r/ISNMulticore/~4/eVU2Q--lUM4" height="1" width="1"/&gt;</description>
      <link>http://feedproxy.google.com/~r/ISNMulticore/~3/eVU2Q--lUM4/june-30th-parallel-programming-talk</link>
      <pubDate>Fri, 19 Jun 2009 11:30:44 -0700</pubDate>
      <comments>http://software.intel.com/en-us/articles/june-30th-parallel-programming-talk#comments</comments>
      <guid isPermaLink="false">http://software.intel.com/en-us/articles/june-30th-parallel-programming-talk</guid>
      <category>Parallel Programming and Multi-Core</category>
    <feedburner:origLink>http://software.intel.com/en-us/articles/june-30th-parallel-programming-talk</feedburner:origLink></item>
    <item>
      <title>Research@Intel Day Showcases Parallel Programming</title>
      <description>June 18, 2009 was Research@Intel day. Many great hardware and software ideas were demoed at the event.  I think that you'll be most interested in the Immersive Connected Experience Zone where out software teams were presenting two key demos of two experimental Parallel Programming Tools, both were applied to optimize computer vision. The first was &lt;a style="font-family: verdana, sans-serif; color: #0860a8; text-decoration: none; padding: 0px; margin: 0px; border: 0px initial initial;" href="http://software.intel.com/en-us/articles/intel-concurrent-collections-for-cc/"&gt;Concurrent Collections&lt;/a&gt; for C++ which is a new language to describe parallel computations. The second is &lt;a style="font-family: verdana, sans-serif; color: #0860a8; text-decoration: none; padding: 0px; margin: 0px; border: 0px initial initial;" href="http://techresearch.intel.com/articles/Tera-Scale/1514.htm"&gt;Ct Technology&lt;/a&gt; that extends C/C++ to simplify data parallel programs. &lt;a href="http://software.intel.com/en-us/blogs/2009/06/19/research-at-intel-day-2009-tomorrows-ideas-today/"&gt;Read my blog post to learn more.&lt;/a&gt;
&lt;p&gt; &lt;/p&gt;&lt;img src="http://feeds.feedburner.com/~r/ISNMulticore/~4/6jxjD3ojMMI" height="1" width="1"/&gt;</description>
      <link>http://feedproxy.google.com/~r/ISNMulticore/~3/6jxjD3ojMMI/researchintel-day-showcases-parallel-programming</link>
      <pubDate>Fri, 19 Jun 2009 11:22:45 -0700</pubDate>
      <comments>http://software.intel.com/en-us/articles/researchintel-day-showcases-parallel-programming#comments</comments>
      <guid isPermaLink="false">http://software.intel.com/en-us/articles/researchintel-day-showcases-parallel-programming</guid>
      <category>Parallel Programming and Multi-Core</category>
    <feedburner:origLink>http://software.intel.com/en-us/articles/researchintel-day-showcases-parallel-programming</feedburner:origLink></item>
    <item>
      <title>High Performance XML Processing and Bulk Loading to Oracle System with Microsoft Integration Services</title>
      <description>&lt;p&gt;A common pattern when processing data electronically is parsing the data, applying certain rules, and then loading to destination systems.  Hand coding a data processing solution in 3GL (C#, C++, VB, Java*&lt;a name="_ftnref1" href="http://software.intel.com/common/tiny_mce/plugins/paste/blank.htm#_ftn1"&gt;*&lt;/a&gt;and so forth) requires substantial coding effort to develop and maintain the system.  In addition, handling large input files (XML or any other format) require careful considerations on efficiently processing the data.&lt;/p&gt;
&lt;p&gt;Microsoft* Integration Services addresses this problem by providing a powerful environment for visually building the solution with minimal coding effort.&lt;/p&gt;
&lt;p&gt;Another key factor that impacts scalability is the number of round trips to the database. One round trip per row to the database seriously limits the throughput of an application.  Processing data in batches by sending several rows worth of data in a single database round trip allows an application to scale efficiently.  However, bulk loading to Oracle* from Integration services framework today requires the use of third party components.  In this white paper, we are going to look at a solution option for building high throughput application to parse large XML files and perform bulk load to Oracle database.&lt;/p&gt;
&lt;p class="sectionHeadingText"&gt;XML Processing&lt;/p&gt;
&lt;p&gt;Typical 3GL approach to XML processing would involve understanding the schema and parsing the elements of interest from the XML instance.  While small-medium documents can be loaded as in-memory trees, large documents would require streaming or chunking to efficiently process the input.  Writing the code in 3GL would require understanding these important details and hand coding an appropriate solution.&lt;/p&gt;
&lt;p&gt;Integration services software on the other hand, hides the complexity involved in parsing an XML and exposes XML as in-memory relational table.  Large XMLs are mapped to in-memory table by transparently allocating memory for the rows in use and freeing up the memory once the batch of rows is consumed.&lt;/p&gt;
&lt;p class="sectionHeadingText"&gt;Oracle* Bulk Loading&lt;/p&gt;
&lt;p&gt;When an application needs to insert (and update) several rows of data, it is optimal to process several rows of data in one round trip. This bulk processing or fast load capability allows an application to scale efficiently.&lt;/p&gt;
&lt;p&gt;Performing bulk operation, also known as Array Binding, is relatively straight forward with ODP.NET drivers as described in this &lt;a href="http://www.oracle.com/technology/sample_code/tech/windows/odpnet/howto/arraybind/index.html"&gt;How to: Bind an Array&lt;/a&gt; to an ODP.NET Database Command article.&lt;/p&gt;
&lt;p&gt;Performing bulk operations in Oracle from Integration Services requires few additional steps and coding.  The rest of this paper discusses throughput numbers and a code sample on how to perform bulk operation through integration services.&lt;/p&gt;
&lt;p class="sectionHeadingText"&gt;Unit and Bulk Performance Characterization&lt;/p&gt;
&lt;p&gt;The "Customers" table available Oracle SH schema was used as a test bed for validating bulk insert using Integration Services.  This table has 24 columns of mixed numeric and varchar data types. &lt;/p&gt;
&lt;p class="sectionHeadingText"&gt;Input XML File&lt;/p&gt;
&lt;p&gt;The data to be loaded to Customers table was in XML format with each XML file having several rows of data. &lt;/p&gt;
&lt;p&gt;&lt;img title="Input_XML_File.JPG" src="http://software.intel.com/file/20086" alt="Input_XML_File.JPG" /&gt;&lt;/p&gt;
&lt;p class="sectionHeadingText"&gt;Performance&lt;/p&gt;
&lt;p&gt;The table and chart summarizes the performance difference between row-by-row processing and bulk load processing in integration services with Customers Data set.&lt;/p&gt;
&lt;p&gt;Please note that several factors influence the overall performance and depending on the number of columns and column length, appropriate batch size needs to be selected.&lt;/p&gt;
&lt;table border="1" cellspacing="0" cellpadding="0"&gt;
&lt;tbody&gt;
&lt;tr&gt;
&lt;td width="79" valign="top"&gt;
&lt;p&gt;&lt;strong&gt;Rows/File&lt;/strong&gt;&lt;/p&gt;
&lt;/td&gt;
&lt;td width="90" valign="top"&gt;
&lt;p&gt;&lt;strong&gt;File Size (MB)&lt;/strong&gt;&lt;/p&gt;
&lt;/td&gt;
&lt;td width="108" valign="top"&gt;
&lt;p&gt;&lt;strong&gt;Row-By-Row Insert (Seconds)&lt;/strong&gt;&lt;/p&gt;
&lt;/td&gt;
&lt;td width="148" valign="top"&gt;
&lt;p&gt;&lt;strong&gt;Row-By-Row Throughput (Rows/Second)&lt;/strong&gt;&lt;/p&gt;
&lt;/td&gt;
&lt;td width="106" valign="top"&gt;
&lt;p&gt;&lt;strong&gt;Bulk Insert Time (Seconds)&lt;/strong&gt;&lt;/p&gt;
&lt;/td&gt;
&lt;td width="106" valign="top"&gt;
&lt;p&gt;&lt;strong&gt;Bulk Load Throughput (Rows/Second)&lt;/strong&gt;&lt;/p&gt;
&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td width="79" valign="top"&gt;
&lt;p&gt;500&lt;/p&gt;
&lt;/td&gt;
&lt;td width="90" valign="top"&gt;
&lt;p&gt;0.52&lt;/p&gt;
&lt;/td&gt;
&lt;td width="108" valign="top"&gt;
&lt;p&gt;2.6&lt;/p&gt;
&lt;/td&gt;
&lt;td width="148" valign="top"&gt;
&lt;p&gt;192.31&lt;/p&gt;
&lt;/td&gt;
&lt;td width="106" valign="top"&gt;
&lt;p&gt;1.8&lt;/p&gt;
&lt;/td&gt;
&lt;td width="106" valign="top"&gt;
&lt;p&gt;277.78&lt;/p&gt;
&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td width="79" valign="top"&gt;
&lt;p&gt;1,000&lt;/p&gt;
&lt;/td&gt;
&lt;td width="90" valign="top"&gt;
&lt;p&gt;1.03&lt;/p&gt;
&lt;/td&gt;
&lt;td width="108" valign="top"&gt;
&lt;p&gt;4.1&lt;/p&gt;
&lt;/td&gt;
&lt;td width="148" valign="top"&gt;
&lt;p&gt;243.90&lt;/p&gt;
&lt;/td&gt;
&lt;td width="106" valign="top"&gt;
&lt;p&gt;1.8&lt;/p&gt;
&lt;/td&gt;
&lt;td width="106" valign="top"&gt;
&lt;p&gt;555.56&lt;/p&gt;
&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td width="79" valign="top"&gt;
&lt;p&gt;2,000&lt;/p&gt;
&lt;/td&gt;
&lt;td width="90" valign="top"&gt;
&lt;p&gt;2.07&lt;/p&gt;
&lt;/td&gt;
&lt;td width="108" valign="top"&gt;
&lt;p&gt;7.2&lt;/p&gt;
&lt;/td&gt;
&lt;td width="148" valign="top"&gt;
&lt;p&gt;277.78&lt;/p&gt;
&lt;/td&gt;
&lt;td width="106" valign="top"&gt;
&lt;p&gt;2.3&lt;/p&gt;
&lt;/td&gt;
&lt;td width="106" valign="top"&gt;
&lt;p&gt;869.57&lt;/p&gt;
&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td width="79" valign="top"&gt;
&lt;p&gt;5,000&lt;/p&gt;
&lt;/td&gt;
&lt;td width="90" valign="top"&gt;
&lt;p&gt;5.17&lt;/p&gt;
&lt;/td&gt;
&lt;td width="108" valign="top"&gt;
&lt;p&gt;14.8&lt;/p&gt;
&lt;/td&gt;
&lt;td width="148" valign="top"&gt;
&lt;p&gt;337.84&lt;/p&gt;
&lt;/td&gt;
&lt;td width="106" valign="top"&gt;
&lt;p&gt;3.3&lt;/p&gt;
&lt;/td&gt;
&lt;td width="106" valign="top"&gt;
&lt;p&gt;1,515.15&lt;/p&gt;
&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td width="79" valign="top"&gt;
&lt;p&gt;10,000&lt;/p&gt;
&lt;/td&gt;
&lt;td width="90" valign="top"&gt;
&lt;p&gt;10.33&lt;/p&gt;
&lt;/td&gt;
&lt;td width="108" valign="top"&gt;
&lt;p&gt;28.0&lt;/p&gt;
&lt;/td&gt;
&lt;td width="148" valign="top"&gt;
&lt;p&gt;357.14&lt;/p&gt;
&lt;/td&gt;
&lt;td width="106" valign="top"&gt;
&lt;p&gt;4.8&lt;/p&gt;
&lt;/td&gt;
&lt;td width="106" valign="top"&gt;
&lt;p&gt;2,083.33&lt;/p&gt;
&lt;/td&gt;
&lt;/tr&gt;
&lt;/tbody&gt;
&lt;/table&gt;
&lt;p&gt; &lt;/p&gt;
&lt;p&gt; &lt;img title="Time_to_Load.JPG" src="http://software.intel.com/file/20088" alt="Time_to_Load.JPG" /&gt;&lt;/p&gt;
&lt;p&gt; &lt;img title="Throughput.JPG" src="http://software.intel.com/file/20087" alt="Throughput.JPG" /&gt;&lt;/p&gt;
&lt;p class="sectionHeadingText"&gt;Code Approach&lt;/p&gt;
&lt;p&gt;A custom destination Script Component available under Data Flow Transformations was used for implementing the bulk insert logic.&lt;/p&gt;
&lt;p&gt;The destination script component, by default, provides three methods:&lt;/p&gt;
&lt;ol&gt;
&lt;li&gt;public override void PreExecute()&lt;/li&gt;
&lt;li&gt;public override void PostExecute()&lt;/li&gt;
&lt;li&gt;public override void Input0_ProcessInputRow(Input0Buffer Row)&lt;/li&gt;
&lt;/ol&gt;
&lt;p&gt;All these methods are automatically invoked by the integration services data flow pipeline during appropriate events:&lt;/p&gt;
&lt;p&gt;PreExecute - Preparing the custom destination component to consume data&lt;/p&gt;
&lt;p&gt;Input0_ProcessInputRow - Invoked for every row that arrives in the pipeline&lt;/p&gt;
&lt;p&gt;PostExecute - After all rows are processed, this method is invoked to perform cleanup.&lt;/p&gt;
&lt;p&gt;At this point, all that needs to be done is allocate buffers within this script component class and populate the buffers whenever a new row arrives. Once, the number of rows reaches the defined batch size,  stored procedure is invoked to pass the buffered data using array binding technique available in ODP.NET.&lt;/p&gt;
&lt;pre name="code" class="cpp"&gt;[Microsoft.SqlServer.Dts.Pipeline.SSISScriptComponentEntryPointAttribute]
public class ScriptMain : UserComponent
{
  
    private OracleConnection _conn;
    private OracleTransaction _tx;
    private int _rowCount;
    private int _rowsPerRoundTrip;
    private int _iterations;

    // Define buffers for all the columns
    private int[] countryId;
    private string[] custCity;  
    private int[] custCityId;
    ….
    public override void PreExecute()
    {
        base.PreExecute();
        _rowCount = 0;
        _rowsPerRoundTrip = &amp;lt;read from configuration variable&amp;gt;;
        _iterations = 0;

        string connectionString = &amp;lt;read from configuration variable&amp;gt;;
        _conn = new OracleConnection (connectionString);
        _conn.Open();

	  // Allocate space
        countryId = new int[_rowsPerRoundTrip];
        custCity = new string[_rowsPerRoundTrip];
        custCityId = new int[_rowsPerRoundTrip];
   …..
    }
// Make sure that the last batch of rows are processed and loaded to database
    public override void PostExecute()
    {
        base.PostExecute();
        if (_rowCount &amp;gt; 0)
        {
            LoadData();
        }

        _conn.Close();
    }

// Process the incoming rows and copy to buffer
public override void Input0_ProcessInputRow(Input0Buffer Row)
    {
        countryId[_rowCount] = Row.COUNTRYID;
        custCity[_rowCount] = Row.CUSTCITY;
        custCityId[_rowCount] = Row.CUSTCITYID;
        …..
  _rowCount++;

        if (_rowCount &amp;gt; _rowsPerRoundTrip - 1)
        {
            LoadData();
        }        
    }
// Function to invoke database stored procedure
private void LoadData()
    {
        _tx = _conn.BeginTransaction();

        OracleCommand cmd = new OracleCommand("Stored Proc Name", _conn);
        cmd.CommandType = CommandType.StoredProcedure;
        cmd.ArrayBindCount = _rowCount;

        OracleParameter pcountryId = new OracleParameter("pi_country_id", OracleDbType.Int32);
        pcountryId.Direction = ParameterDirection.Input;
        pcountryId.Value = countryId;
        cmd.Parameters.Add(pcountryId);
   ….
  cmd.ExecuteNonQuery();
        cmd.Dispose();

        _rowCount = 0;

  _tx.Commit();
}
// Oracle Stored Procedure definition
CREATE OR REPLACE PROCEDURE proc_insert_customer
       (pi_country_id           IN number,
        pi_cust_city           IN VARCHAR2,
        ...
        ) IS
BEGIN

insert into customers(cust_id, cust_first_name, cust_last_name,....)
   values (pi_cust_id,pi_cust_fname,pi_cust_lname,...);

END;
&lt;/pre&gt;
&lt;p class="sectionHeadingText"&gt;Conclusion&lt;/p&gt;
&lt;p&gt;In this paper, we saw how custom Oracle Bulk Processing capability can be incorporated in to Integration Services while leveraging integration services for parsing XML data and preparing the data for backend systems.&lt;/p&gt;
&lt;p&gt;This mix provides an efficient mechanism to build scalable applications on Intel® Platforms while reducing the time-to-market.&lt;/p&gt;
&lt;p class="sectionHeadingText"&gt;About the Author&lt;/p&gt;
&lt;p&gt;ChandraMohan Lingam (Chandra) is an Architect at Intel where he works for the Technology Development Group developing solutions to address Intel's manufacturing needs. Chandra has a MS degree from Arizona State University, Tempe and a Bachelors Degree in Engineering from Thiagarajar College of Engineering, Madurai, India.&lt;/p&gt;
&lt;p&gt;&lt;a href="http://software.intel.com/file/20084"&gt;Download article as a PDF file (130 KB).&lt;/a&gt;&lt;/p&gt;
&lt;br /&gt;
&lt;p&gt;*Other names and brands may be claimed as the property of others.&lt;/p&gt;&lt;img src="http://feeds.feedburner.com/~r/ISNMulticore/~4/CGHFmQ8kMN8" height="1" width="1"/&gt;</description>
      <link>http://feedproxy.google.com/~r/ISNMulticore/~3/CGHFmQ8kMN8/high-performance-xml-processing-and-bulk-loading-to-oracle-system-with-microsoft-integration-services</link>
      <pubDate>Wed, 17 Jun 2009 13:48:42 -0700</pubDate>
      <comments>http://software.intel.com/en-us/articles/high-performance-xml-processing-and-bulk-loading-to-oracle-system-with-microsoft-integration-services#comments</comments>
      <guid isPermaLink="false">http://software.intel.com/en-us/articles/high-performance-xml-processing-and-bulk-loading-to-oracle-system-with-microsoft-integration-services</guid>
      <category>Parallel Programming and Multi-Core</category>
    <feedburner:origLink>http://software.intel.com/en-us/articles/high-performance-xml-processing-and-bulk-loading-to-oracle-system-with-microsoft-integration-services</feedburner:origLink></item>
    <item>
      <title>Taming a Terabyte of XML Data</title>
      <description>&lt;span style="font-family: verdana, arial, sans-serif; color: #666666; font-weight: bold;"&gt;Enterprises today are struggling to manage the increasing volume of XML data they generate or consume. Intel and IBM have executed the industry's first terabyte XML database benchmark, based on a financial application scenario, which shows the feasibility of managing high volumes of XML data on cost-effective hardware.&lt;/span&gt;
&lt;div&gt;&lt;span style="font-family: verdana, arial, sans-serif; color: #666666;"&gt;&lt;strong&gt;&lt;br /&gt;&lt;/strong&gt;&lt;/span&gt;
&lt;div&gt;&lt;span style="font-family: verdana, arial, sans-serif; color: #666666;"&gt;&lt;strong&gt;By:&lt;/strong&gt;&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span style="font-family: verdana, arial, sans-serif; color: #666666;"&gt;&lt;strong&gt;&lt;span style="color: #000000; font-weight: normal; font-family: verdana, arial, sans-serif;"&gt;&lt;a style="color: #5c81a7;" href="http://www.ibm.com/developerworks/data/library/dmmag/DBMag_2009_Issue1/DBMag_Issue109_TamingTerabyte/index.html#author"&gt;Matthias Nicola&lt;/a&gt; (&lt;a style="color: #5c81a7;" href="mailto:mnicola@us.ibm.com?subject=Taming%20a%20Terabyte%20of%20XML%20Data"&gt;mnicola@us.ibm.com&lt;/a&gt;), Senior Software Engineer, IBM Silicon Valley Lab&lt;/span&gt;&lt;/strong&gt;&lt;/span&gt;&lt;/div&gt;
&lt;span style="font-family: verdana, arial, sans-serif;"&gt;&lt;a style="color: #5c81a7;" href="http://www.ibm.com/developerworks/data/library/dmmag/DBMag_2009_Issue1/DBMag_Issue109_TamingTerabyte/index.html#author"&gt;Agustin Gonzalez&lt;/a&gt; (&lt;a style="color: #5c81a7;" href="mailto:agustin.gonzalez@intel.com?subject=Taming%20a%20Terabyte%20of%20XML%20Data"&gt;agustin.gonzalez@intel.com&lt;/a&gt;), Senior Staff Software Engineer , Intel Corporation&lt;/span&gt;&lt;/div&gt;&lt;img src="http://feeds.feedburner.com/~r/ISNMulticore/~4/G495Cx7_xUg" height="1" width="1"/&gt;</description>
      <link>http://feedproxy.google.com/~r/ISNMulticore/~3/G495Cx7_xUg/taming-a-terabyte-of-xml-data</link>
      <pubDate>Fri, 12 Jun 2009 12:50:54 -0700</pubDate>
      <comments>http://software.intel.com/en-us/articles/taming-a-terabyte-of-xml-data#comments</comments>
      <guid isPermaLink="false">http://software.intel.com/en-us/articles/taming-a-terabyte-of-xml-data</guid>
      <category>Parallel Programming and Multi-Core</category>
    <feedburner:origLink>http://software.intel.com/en-us/articles/taming-a-terabyte-of-xml-data</feedburner:origLink></item>
    <item>
      <title>Developer Training</title>
      <description>&lt;!--page break--&gt; 
&lt;hr /&gt;
&lt;div class="sectionHeading"&gt;Training on Parallel Programming for the Multi-Core World&lt;/div&gt;
&lt;p&gt;Release the power of Multi-Core processors through our Multi-Core training series. Understand how to architect, design, develop and debug software for Multi-Core processors.&lt;/p&gt;
&lt;!--page break--&gt; 
&lt;hr /&gt;
&lt;div class="sectionHeading"&gt;Online Training&lt;/div&gt;
&lt;ul&gt;
&lt;li&gt;Take our popular &lt;a href="http://software.intel.com/en-us/sites/college/coursedisplay.php?id=1"&gt;&lt;strong&gt;Moving to Multi-Core&lt;/strong&gt;&lt;/a&gt; online course for free and be able to:        
&lt;ul&gt;
&lt;li&gt;Develop and maintain threaded applications more efficiently&lt;/li&gt;
&lt;li&gt;Thread applications for good performance on systems with and without Hyper-Threading&lt;/li&gt;
&lt;li&gt;Use threading tools to debug and optimize threaded applications&lt;/li&gt;
&lt;/ul&gt;
&lt;/li&gt;
&lt;/ul&gt;
&lt;ul&gt;
&lt;li&gt;View our new series of parallel programming training videos and downloadable courseware: &lt;strong&gt;&lt;a href="http://software.intel.com/en-us/videos/three-things-you-must-teach-module-1-recognizing-potential-parallelism"&gt;Three Things you must teach about Parallelism&lt;/a&gt;&lt;/strong&gt; 
&lt;ul&gt;
&lt;/ul&gt;
These modules, developed by Intel Software College Architect &lt;a href="http://software.intel.com/en-us/blogs/author/clay-breshears/"&gt;Clay Breshears&lt;/a&gt;, cover basic content that any professor should teach when introducing parallel programming. While not designed specifically for engineers, this content should be of use for anyone seeking to understand the basicis of parallel programming on multi-core machines.&lt;/li&gt;
&lt;/ul&gt;
&lt;ol&gt;
&lt;li&gt;Recognizing Parallelism&lt;/li&gt;
&lt;li&gt; Shared Memory and Threads&lt;/li&gt;
&lt;li&gt;Programming with OpenMP &lt;/li&gt;
&lt;/ol&gt; 
&lt;ul&gt;
&lt;li&gt;&lt;a href="http://software.intel.com/en-us/videos/a-visual-guide-to-key-concepts-in-threaded-programming-Common-problems-and-how-to-solve-them/"&gt;A visual guide to key concepts in threaded programming – Common problems and how to solve them&lt;/a&gt; Dr. Clay Breshears, senior parallel architect, Intel Software College, takes us through common threading problems and suggests how to plan for and solve them. Dr. Breshears also discusses a number of useful design patterns, illustrates how they work and suggest when they are most applicable to your applications. &lt;/li&gt;
&lt;/ul&gt;
&lt;ol&gt;
&lt;p&gt; &lt;/p&gt;
&lt;/ol&gt; 
&lt;ul&gt;
&lt;li&gt;&lt;a href="http://software.intel.com/en-us/videos/a-gentle-introduction-to-parallel-software-or-enough-with-the-theory-lets-see-some-parallel-code/"&gt;A Gentle Introduction to Parallel Software or Enough with the Theory, Let's See Some Parallel Code&lt;/a&gt; Tim Mattson, Principal Engineer, Intel Corporation, introduces some of the best APIs and interfaces to allow you to build parallelism into serial code. &lt;/li&gt;
&lt;/ul&gt;
&lt;ol&gt; &lt;/ol&gt; 
&lt;ul&gt;
&lt;li&gt;Take our three-part online Moving to Multicore series of courses 
&lt;ul&gt;
&lt;li&gt;&lt;a href="http://learn.intel.com/portal/scripts/training/courses/course.aspx?coursemasterid=8259"&gt;Module 1- Programming with Win32* Threads&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="http://learn.intel.com/portal/scripts/training/courses/course.aspx?coursemasterid=8536"&gt;Module 2- Correcting Threading Errors with Intel(R) Thread Checker &lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="http://learn.intel.com/portal/scripts/training/courses/course.aspx?coursemasterid=8767"&gt;Module 3- Tuning Threaded Code&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;/li&gt;
&lt;p&gt; &lt;/p&gt;
&lt;li&gt;Take our &lt;a href="http://learn.intel.com/portal/scripts/training/courses/Course.aspx?CourseMasterId=8466&amp;amp;LanguageId=1&amp;amp;Location=courselinkincatalog"&gt;Multithreading Quickstart: Application Threading for Java* and .NET* Programmers&lt;/a&gt;&lt;/li&gt;
&lt;p&gt; &lt;/p&gt;
&lt;li&gt;&lt;a href="http://software.intel.com/en-us/articles/getting-started-with-parallel-programming-for-multi-core//"&gt;Online parallelism and multi-core resources&lt;/a&gt; - Aaron Tersteeg, our Parallelism Community Manager chooses his favorite geting started content&lt;/li&gt;
&lt;p&gt; &lt;/p&gt;
&lt;li&gt;&lt;a href="http://software.intel.com/en-us/videos/multi-threading-for-game-developers-an-overview-lindbergwerth/"&gt;Multi-threading for Game Developers - An Overview&lt;/a&gt; -- Two Intel senior engineers discuss how to conceptualize parrallelism within a complex computer Game&lt;/li&gt;
&lt;p&gt; &lt;/p&gt;
&lt;li&gt;&lt;a href="http://software.intel.com/en-us/intel-sdp-home/"&gt;Learn More about Intel Parallel Tools&lt;/a&gt;&lt;/li&gt;
&lt;p&gt; &lt;/p&gt;
&lt;/ul&gt;
&lt;p&gt;If you are a Faculty member looking for Academic Course content, please visit our &lt;a href="http://software.intel.com/en-us/articles/courseware-access"&gt;&lt;strong&gt;Academic Community content site&lt;/strong&gt;&lt;/a&gt;.&lt;/p&gt;
&lt;p&gt; &lt;/p&gt;
&lt;p&gt; &lt;/p&gt;
&lt;table border="0" cellspacing="0" cellpadding="0" width="100%"&gt;
&lt;tbody&gt;
&lt;tr&gt;
&lt;td width="40%" valign="top"&gt;
&lt;h2 style="border-bottom:1px solid #BABABA;border-color:#BABABA;color:#000000;font-size:12px;font-weight:bold;margin-bottom:4px;padding-bottom:4px;"&gt;Other Resources&lt;/h2&gt;
&lt;p&gt;&lt;em&gt;Articles:&lt;/em&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;a href="http://software.intel.com/en-us/articles/8-simple-rules-for-designing-threaded-applications"&gt;Clay's 8 rules of designing Multi-threaded Apps&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="http://softwaredispatch.intel.com/?lid=163&amp;amp;t=4"&gt;Get a headstart with Dr. Dobbs magazine&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="http://software.intel.com/en-us/articles/intel-multi-core-university-initiative-charges-ahead"&gt;The Intel Multi-Core University Initiative&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;em&gt;Case Studies:&lt;/em&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;a href="http://softwarecommunity.intel.com/isn/downloads/ISI_2007_Havoc_online.pdf"&gt;Case Study: How Havok Optimized Game Code&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="http://softwarecommunity.intel.com/isn/downloads/ISI_Issue_9_MainC_online_051707.pdf"&gt;Case Study: How MainConcept Capitalized on New Hardware Platforms&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="http://softwarecommunity.intel.com/isn/downloads/Pixar.pdf"&gt;Case Study: How Pixar Multi-threaded Renderman*&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt; &lt;/p&gt;
&lt;/td&gt;
&lt;td width="5%"&gt;&lt;/td&gt;
&lt;td width="40%" valign="top"&gt;
&lt;h2 style="border-bottom:1px solid #BABABA;border-color:#BABABA;color:#000000;font-size:12px;font-weight:bold;margin-bottom:4px;padding-bottom:4px;"&gt;Participate in online discussions on developer topics on &lt;a href="http://software.intel.com/en-us/tv/"&gt;ISN TV&lt;/a&gt;&lt;/h2&gt;
&lt;a href="http://software.intel.com/en-us/articles/intel-academic-community-webinar-series"&gt;&lt;strong&gt;&lt;span&gt;Live and archived events&lt;/span&gt;&lt;/strong&gt;&lt;/a&gt;

&lt;/p&gt;
If you have ideas for a webinar, or if you would like to suggest a colleague or yourself as a guest host, please let us know through a comment below or &lt;a href="mailto:paul.f.steinberg@intel.com"&gt;email me directly&lt;/a&gt;.&lt;/td&gt;
&lt;/tr&gt;
&lt;/tbody&gt;
&lt;/table&gt;
&lt;p&gt; &lt;/p&gt;&lt;img src="http://feeds.feedburner.com/~r/ISNMulticore/~4/MkqsCktpDpU" height="1" width="1"/&gt;</description>
      <link>http://feedproxy.google.com/~r/ISNMulticore/~3/MkqsCktpDpU/developer-training</link>
      <pubDate>Wed, 10 Jun 2009 14:02:22 -0700</pubDate>
      <comments>http://software.intel.com/en-us/articles/developer-training#comments</comments>
      <guid isPermaLink="false">http://software.intel.com/en-us/articles/developer-training</guid>
      <category>Parallel Programming and Multi-Core</category>
      <category>Developer Training</category>
    <feedburner:origLink>http://software.intel.com/en-us/articles/developer-training</feedburner:origLink></item>
  </channel>
</rss>
