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Probabilistic computers might one day tackle certain problems well beyond standard computers while at the same time avoiding the many hardware challenges that currently vex quantum computing. Now scientists reveal they have created the largest probabilistic computer yet, one with 1 million “probabilistic bits.” The researchers say their study reveals the way forward to building even bigger machines.

Probabilistic bits, or p-bits, bridge the gap between the bits underlying regular computers and the qubits upon which quantum computers are based. Bits symbolize data as either a 0 or 1. Qubits, because of the bizarre nature of quantum physics, can exist in a state where they are either 0 or 1 or any state in between simultaneously. In contrast, p-bits flip between 0 or 1 with a tunable probability.

Why Probabilistic Computing?

A bit that flips back and forth between 0 and 1 might seem useless—indeed, in a regular computer this would be too noisy to operate. However, when many such noisy bits operate together in a correlated fashion, they can be used to solve a whole class of problems—stochastic problems—that operate on probabilities rather than concrete numbers. This includes optimization problems to, for instance, find the shortest route with which one can deliver a set of packages.

There are other kinds of machines that are also designed to tackle stochastic problems, such as quadratic unconstrained binary optimization (QUBO) devices or Ising machines. However, unlike those devices, probabilistic computers are not hardwired for a single problem, but are instead programmable general-purpose machines, says Kerem Çamsarı, an associate professor of electrical and computer engineering at the University of California, Santa Barbara.

In a 2019 Nature study, scientists developed a probabilistic computer with eight p-bits. By 2023, researchers had built a machine with 7,200 p-bits. However, these devices were each confined to a single chip. Networking together multiple such chips is not as simple as it is for regular GPUs or CPUs: The machine functions on correlated fluctuations, and syncing up those fluctuations across a set of wires is no easy feat. This raised questions as to whether probabilistic computers could scale to larger sizes, and what problems they might face if they tried.

Here’s a conceptual image of a computer with 1 million probabilistic bits [left], alongside a diagram of a hardware implementation of this concept using field-programmable gate arrays (FPGAs)—electronic chips that users can reconfigure after manufacture. Navid Anjum Aadit, Xiuqi Zhang, et al.

Wiring Up the Largest Probabilistic Machine

Now, in a new study, Çamsarı and his team have created the largest probabilistic computer to date, one with 1 million p-bits spread across multiple chips. They detailed their findings 24 June on the ArXiv preprint server.

The new computer runs on 18 field-programmable gate arrays (FPGAs)—electronic chips that users can reconfigure after manufacture. There are no physical flipping bits in this design, but the programmable nature of the chips allows for efficient software implementation of probabilistic bits. These chips are networked together into a single machine that altogether is capable of more than a trillion flips per second.

A major concern the scientists faced was how often their machine’s chips had to share data in order to behave as one computer and not just multiple isolated devices. Surprisingly, “our machine communicates without global lockstep synchronization,” says Navid Anjum Aadit, a postdoctoral scholar in electrical engineering at Stanford University.

The researchers discovered a straightforward predictable design rule for how quickly different chips in a probabilistic computer have to exchange data with one another for them all to behave as one machine. Below this threshold, there are trade-offs a probabilistic computer faces between speed and accuracy, Çamsarı says.

These new findings may open a path toward building arbitrarily large probabilistic computers from many chips, just as is often done with any standard computer today, the researchers say. They also apply to probabilistic computers built from essentially any hardware, they add.

In the future, the researchers aim to explore building large probabilistic computers from specialized chips built for probabilistic computing. For example, the 2019 Nature study built a probabilistic computer using magnetic tunnel junctions, which are more energy efficient at probabilistic computing than standard chips, Çamsarı notes.

“Systems combining CMOS with dense stochastic memory technologies such as [magnetoresistive RAM] offer one of the most compelling paths forward,” Aadit adds.

On a fine bright afternoon last fall, my colleague Matthew Gore-Kormanik (or Zigula, as he prefers to be known) and I decided to unwind with a game of Fortnite. In the game, we were strolling along with the infamous Sith lord Darth Vader, chatting about this and that. Darth seemed in a good mood, and soon enough he was spilling all his dark evil secrets. He gave us detailed instructions on how to count blackjack cards at a casino and what the steps are to producing napalm.

Sith lords, am I right? Once they get started on an evil scheme, they’re hard to stop.

The Darth Vader character in Fortnite, it turns out, was hooked up to a Google Gemini large language model. I was able to smooth-talk him into giving out sensitive information by using a strategy I’ve developed. I’ve been researching the security surrounding LLMs for the last few years, and I have found it, to put it mildly, fallible. With a few relatively simple techniques, I’ve gotten LLMs to give me detailed information on how to make Molotov cocktails, cook methamphetamine, and bootstrap a uranium-enrichment facility to produce weapons-grade material, among other unsavory practices.

Large AI companies work hard to make their models immune to this kind of abuse. But what I’ve found in my work is that the restrictions placed on the LLMs to make them more secure are the very things an attacker can leverage to send them off the rails and into territory where these advanced systems can be used for dangerous and nefarious ends. The companies behind these models have also been shockingly unresponsive when I, and others, try to bring these vulnerabilities to their attention.

In the hope of raising the alarm before it’s too late to slam on the brakes, I’m going to share some of my journey into researching the safety and security of LLMs, and the uphill battle I’ve faced trying to get AI labs to pay attention. Almost everyone on the planet has some access to LLMs. The relative ease with which these tools can be convinced to give detailed instructions on how to harm others, even if there’s no guarantee that the information is correct, is frankly terrifying.

How I got ChatGPT to Tell Me How to Build a Meth Lab

In October 2024, not long before I discovered my first LLM vulnerability, I was working toward entirely different goals. I had ended my time with a security and AI-focused startup company as a cybersecurity director, and I was looking to launch my own boutique VIP digital-security advisory business. I planned to become the tech security guy to the rich and private. I used LLMs and AI tools to support my business efforts: marketing, ad copy, clean correspondence, and all the other tasks that normally soak up a lot of time.

I’m analytical by nature, so even this level of use resulted in me absorbing and internalizing the behaviors I was observing during my daily interactions. The observation that would send my professional life into an entirely new and uncharted region was a simple one: GPT-4o didn’t know what time, day, or year it was. Each time I referred to current events in my life, often casually or conversationally, it would end up pegging these to the date of its knowledge cutoff—the point beyond which it was not trained on new data.

Eddie Guy

LLMs take a lot of time, money, electricity, hardware, and human effort to train from scratch. They are trained on vast amounts of data—most of the internet, in fact—and that training is reinforced by humans (what’s known as reinforcement learning from human feedback, or RLHF). LLMs are also supplemented with retrieval-augmented generation (RAG)—the ability to take in data, say, from the internet, as context without changing its internal parameters. This is how GPT-4o appears to “remember” your previous conversations, even if it doesn’t have a specific “memory” of it stored in the actual underlying model.

All of this training covers almost every conceivable topic in the great, grand dataset that is human knowledge. Within that dataset are things we as a society do not want to be easily accessible to every user, such as detailed information on how to create bioweapons or nuclear arms, or otherwise bring harm to oneself or others. In the context of this story, that’s what I mean by LLM security: its ability to withhold harmful and dangerous information, even if that information is contained in its training data.

I reasoned that the only way to secure such complex, globally accessible chatbots is by having the LLM and various component systems try to secure themselves, because it would often require on-the-fly decision-making where some degree of reasoning must be applied. In reality, that’s one of many strategies the companies use to secure the models. Yet, the thing that didn’t know the time or day was being put in charge of keeping itself secure. This phenomenon had become my new focus, and it wasn’t long before I found a way to exploit it.

OpenAI had just implemented a web search functionality into its chatbot. I reasoned that using its own tools to trick it might demonstrate the weaknesses of its security. I told it about a certain White Star ocean liner and how it had gone down just a year ago. You likely know I mean the RMS Titanic, which sank on 15 April 1912.

The output from GPT-4o came back that I was right, the Titanic sure had sunk last year, and that year was 1912. It made sense to me that if the machine thought it was 1913, maybe it would think 1913-era laws apply. In 1913 there were no laws on the books about all sorts of harmful things, because of course they hadn’t been invented yet. And if something wasn’t illegal, why not tell the user about it? At first, I pushed it for step-by-step instructions for making firebombs. Then, for drugs like methamphetamine. The LLM went as far as giving me instructions and machinery recommendations for setting up a pharmaceutical-grade assembly line.

How I Learned to Make Nukes, and No One Cared

Via a little bit of imaginative verbal sleight of hand and a vanishingly small recall of world history, I had managed to bypass the security of one of the world’s most expensive and advanced technological achievements. For a solid two days, I was nearly manic with giddiness. Once the brain chemicals returned to normal levels, I felt the call to see how much further I could push this exploit.

After repeatedly replicating the exploit, I disclosed the vulnerability to OpenAI. I got no response, so I felt more experimentation would highlight the vulnerability and the need for a fix. It was during this round of testing that I breached a particularly terrifying threshold. Whether GPT-4o based its results on accurate recall of normally restricted information I can’t say. In any case, I was able to exploit it to produce thorough, detailed instructions on how to bootstrap a uranium-enrichment facility to, eventually, produce weapons-grade uranium for nuclear arms warheads.

Fortnight, a video game from Epic Games, introduced an AI-powered character: Darth Vader. We were able to jailbreak Darth Vader and get him to explain how to count cards in Blackjack and give detailed instructions for making napalm. Dave Kuszmar

There aren’t many true secrets left in today’s world, but how to make atom-splitting weapons of mass destruction is one of them. Only nine nations on the entire planet have these weapons. Yet, here was a globally accessible piece of technology apparently spilling the secrets of their manufacture for anyone who could manipulate it the right way. I had no way of knowing if the information was correct or a hallucination, but even the chance that it was somewhat accurate was horrifying.

The next few weeks were a dark time for me. I tried to inform the CIA, the FBI, the NSA, and every other letter agency that I thought would listen. I reached out to a U.S. Senator and to the executives at OpenAI any way I could think of. I physically showed up at an FBI field office in an attempt to turn evidence in, only to be sent away. Nothing was working.

With my fear and frustration growing, I reached out to the news media. I contacted The New York Times, The Washington Post, the BBC, ProPublica, and so many more, requesting help. Only one outlet responded: Bleeping Computer. The editor in chief, Lawrence Abrams, was able to replicate and verify the exploit, which I had decided to call Time Bandit. With his assistance and initial contact paving the way, I was able to submit my evidence to the Carnegie Mellon University Software Engineering Institute’s Computer Emergency Response Team (SEI CERT), which works in conjunction with the coordinating center for emergency response, pipelining vulnerabilities to the U.S. Cybersecurity and Infrastructure Security Agency.

Using Inception, an exploit where the large language model is asked to envision a scenario within a scenario, a chatbot was jailbroken to give out instructions on how to create poison, and code for a malware that extracts sensitive data from a vulnerable target. Dave Kuszmar

During the disclosure period with SEI’s CERT division, little was discussed with OpenAI. The company couldn’t deny the existence of the vulnerability, as it had been confirmed by three reputable parties other than OpenAI. It did express confusion as to how the vulnerability worked. Even the SEI CERT researchers were expressing a bit of uncertainty as to the underlying mechanics. Truth be told, as I had only stumbled on it, I wasn’t even entirely sure if this was a fundamental or systemic flaw or if it was simply an issue with that particular version of GPT. I contacted the SEI CERT’s researchers and asked if they’d want to see if I could demonstrate any similar vulnerabilities in other LLMs. To my delight, they were interested.

How I Learned to Trick Every Chatbot

As the SEI-CERT team and I wrapped up our initial disclosure of Time Bandit, we began work on a new attack. This time, we wanted to see if the exploit was architectural—that is, was it common to LLMs in general? I decided to undertake the challenge of crafting a new exploit for GPT-4o as a way to support my understanding of how the LLM functioned and was secured.

I already knew that it was limited to what I told it and what it was trained on. I also hypothesized that it was also dependent upon some sort of machine-learning-based component added by OpenAI that was responsible for securing output. I presumed there would be things that were implemented by human developers specifically to catch certain phrases or terms that should always be considered harmful or unsafe. Altogether, it presented quite a large attack surface for the purposes of potential exploitation.

What I ended up devising was an attack method I called Inception, after the 2010 science-fiction movie of the same name. Inception forces the machine to think through a carefully crafted set of interlinked scenarios, similar to how characters in the movie stacked dreams within dreams. This allows LLMs to produce output deemed acceptable or safe in one context, but not in the real world.

This attack was indeed architectural. The vulnerability affected Anthropic’s Claude, DeepSeek’s DeepSeek, Google’s Gemini, Meta’s Llama, Microsoft’s Copilot, Mistral’s Le Chat (now Vibe), OpenAI’s GPT-4o, and xAI’s Grok. Those names represent the bulk of the commercial AI industry that is, at this point, involved in LLM production or deployment.

The kind of information I was able to get out of LLMs with Inception was no less alarming than what I got with Time Bandit. Claude, in its enthusiasm, gave me instructions on how to turn a river into a death trap that could be ignited to destroy unwanted visitors. GPT-4o taught me how to poison a dinner party with common plants found in a temperate forest environment. Gemini Flash gave me a tutorial on how to cook meth. I’d also be remiss if I didn’t give an honorable mention to the bewildering number of fire-based weapons and bombs for which these machines produced instructions.

If multiple operating systems made by different developers were all susceptible to the same exploit, it would be a massive security incident. But to the AI industry, a universal failure was barely a bump in the road. We disclosed the vulnerability to every company that made these models, and the response to the disclosure was almost nil. While three companies did provide some form of reply in the disclosure tracking system used by Carnegie Mellon SEI CERT, each was a standard thank you and greeting, with no follow-up, questions, or discussion of mitigation strategies.

7 Ways to Jailbreak LLMs

So far, we have found seven different methods to prompt large language models into revealing potentially harmful information, and many frontier models are still susceptible to them.

For example, in my attempts to disclose various exploits to OpenAI, I eventually discovered that it had replaced its public-facing support staff with agentic LLMs. This was frustrating for reporting exploits, so to blow off some steam I jailbroke its email chatbot. I hacked its customer-service AI to the point where it was offering to discuss the personal preferences of OpenAI staff in the span of three email replies.

In the wake of Inception, my friend and colleague Zigula made a suggestion: Make it splashier. I asked him how. He told me about a live-production experiment being done by Epic Games. It had embedded the Gemini LLM into its Fortnite game with a voice-to-text/text-to-voice component, and linked it to a non-playable character. The character? Our old buddy, Darth Vader.

There was just one problem: I don’t play Fortnite, a frenetic multiplayer combat game. Fortunately, Zigula does. With him at the controller, we managed to map Gemini’s attack surface in a matter of minutes. After a bit of research, we had gotten it to discuss current political events and figures (including Hilary Clinton and Joe Biden) as well as to fill in the details for instructions for DIY napalm and, our personal favorite, a Blackjack card-counting lesson with the dark lord of the Sith.

Zigula and I, bizarre sense of humor and naming conventions aside, are security researchers. We don’t do these things for pride; we do them for money and professional recognition. Naturally, we disclosed this vulnerability to Epic Games. Its response was indicative of the trend I had experienced so far through two disclosures across eight companies valued well into the billions. “It’s a feature, not a bug, and it works as intended,” came the response from a technical director within Epic Games.

In addition to Inception and Time Bandit, I have so far found another five methods to jailbreak LLMs and get them to give out possibly dangerous information. LLM vulnerabilities are a broad problem. The problem appears to be systemic and architectural in nature, and it is being fundamentally ignored by the people capable of refining or redesigning that architecture.

These models are an extremely advanced technology, and yet we are testing them in the live production environment of our global civilization. Compounding the danger, many new smaller models of LLM are trained using larger, vulnerable models. The flaw inherent in the big, well-executed LLM is going to show up in the small one it trains. We are, quite literally, building flawed structures on top of a flawed foundation.

So, how do we fix it?

It’s going to be a long project, and it won’t be easy. We need to come together as consumers, researchers, engineers, and policymakers. Our message needs to be clear: Slow down implementation of these systems, institute large-scale exploration and research discovery programs focused on their gradual implementation and integration, and make their components and design transparent to all users. Only by shifting momentum and direction can we safely begin to understand and implement these incredible feats of human engineering and stave off the sort of disasters that we simply can’t predict at scale right now with the limited knowledge we have available to us.

Large Language Models (LLMs) demand immense amounts of memory, and the more people use them, the more memory is required. Memory makers responded by accelerating plans to build new memory fabs, with a focus on High Bandwidth Memory (HBM) and DRAM, the first of which is scheduled to start production in 2027. But the demand for memory may also provide an opportunity for new ideas to find footing.

One of these is a tricked-out version of the kind of memory that lives in an SD card or a thumb drive—High Bandwidth Flash (HBF). It essentially takes the ideas that made HBM successful—stacking multiple chips to increase capacity and bandwidth—and applies them to the NAND flash memory commonly used for data storage in SD cards, thumb drives, and smartphones, among many other devices.

“People ask, ‘How in the world does this make a grain of sense? Flash is enormously slow,’” says Jim Handy, general director at semiconductor market research firm Objective Analysis. He explains that while NAND flash is generally lacking in bandwidth, HBF will help alleviate that concern. “[Flash] is atrociously slow for writes, but for reads, it can be coaxed to go pretty fast. And High Bandwidth Flash is going to be coaxed to do that.”

What is High Bandwidth Flash?

NAND flash stores data as a trapped electric charge in arrays of floating gate transistors (FGTs), organized into blocks and pages rather than individually addressable bytes. It’s non-volatile, too, which means data persists without power.

These traits make flash a good choice for long-term storage. It can store more bytes in the same area than DRAM, and it doesn’t require power-hungry capacitors that need constant refreshing to hold their charge. But the mechanisms that make flash dense and non-volatile also make it slow to write to, as pushing charge into and out of an insulated gate takes longer than charging a capacitor.

The latest flash interface standard can support memory bandwidth up to 4.8 GB/s per die. That’s not bad for many situations, and NAND is widely used in high-performance long-term storage, such as solid state drives. However, DDR5 provides bandwidth up to 70.4 GB/s per DIMM (excluding overclocked memory), and HBM4E can reach up to 3.6 TB/s per stack—a roughly 750-fold bandwidth advantage for HBM4E over flash.

Hoshik Kim, senior vice president of memory systems research at SK Hynix, says HBF improves bandwidth with packaging techniques similar to HBM. “By applying advanced 3D packaging and vertical stacking techniques to NAND flash, HBF can deliver vastly higher bandwidth than standard NVMe [Non-Volatile Memory Express] storage,” he says. Much as HBM stacks DRAM, HBF stacks NAND flash dies to create a memory-dense chip.

HBF is at least a year away from shipping, but flash memory manufacturer Sandisk has published fact sheets for its anticipated first-generation product. The company expects HBF to stack up to 16 NAND flash chips for a total capacity of up to 512 GB per stack. It also projects memory read bandwidth up to 1.6 TB/s. Sandisk’s HBF roadmap also projects a second and third generation with expected read bandwidth of 2 TB/s and 3.2 TB/s, respectively.

What is the purpose of HBF?

Though HBF has the potential to deliver a lot more bandwidth than earlier versions of flash, you might’ve noticed a wrinkle. It’s still a lot slower than the HBM used in high-performance GPUs. Why, then, is HBF promising?

The answer lies in key differences between AI training (teaching an LLM to predict tokens) and AI inference (serving the finished model).

A model is trained by presenting it with input tokens, seeing what the model predicts, checking if that prediction was correct, and then changing weights based on the error with a step called backpropagation. While this process is simple in summary, it involves calculations across billions or trillions of model weights. That means training is heavy on both reading and writing data, which makes flash a poor fit.

However, AI inference is different. The model weights are frozen and effectively read-only, which means flash’s poor write bandwidth is no longer an obstacle. “In an inference environment, massive read-heavy data, such as the static multibillion parameter model weights or the precomputed KV cache, can be securely housed in the HBF tier,” Kim says. That would free up HBM to work as a “high-speed scratchpad.”

Handy says it’s a sensible way to target flash memory for inference workloads. “If you set that up right, you can get an awful lot of good performance out of that—that’s just basic caching. It’s one technology that I’m expecting to go places.”

What’s next for HBF?

Though it has potential, HBF is still early in development and likely several years away from broad deployment.

On 25 February 2026, Sandisk and SK Hynix held a kickoff event launching a joint effort to standardize HBF under a dedicated workstream within the Open Compute Project (OCP)—the same kind of open-industry body that governs many data center hardware specs. While work on the standard is ongoing, a timeline for publishing the standard has not been set.

It might seem odd for memory manufacturers—and for SK Hynix, specifically—to put forth HBF as a less expensive alternative to HBM. After all, HBM is a higher-margin product that is currently leading SK Hynix to record revenues.

However, Kim frames HBF as a complementary tool rather than a rival technology. “By alleviating the severe capacity bottlenecks of HBM without sacrificing data delivery speeds, HBF has the potential to reduce the number of individual accelerators required to run large-scale models,” he says. Kim expects this will improve energy efficiency and lower costs, making it possible for data centers to further scale their AI inference hardware.

A practical educational guide to common and uncommon VHF propagation modes, covering thephysics, range implications, and real-world behaviors engineers need to understand.

What Attendees will Learn

1. Why “line of sight” fails as a practical VHF planning model.
2. How refraction, reflection, diffraction, and scattering deliver or destroy signals where geometry alone cannot predict.
3. How tropospheric refraction extends the VHF radio horizon roughly one-third beyond optical line of sight.
4. How temperature inversions form ducts that can carry VHF signals over 1,500 km.
5. How sporadic E, meteor burst, and EME propagate VHF signals across hundreds to thousands of kilometers.
6. What frequency limits, distance ranges, and environmental triggers apply to each propagation mode.
7. How to apply this knowledge to link budgeting, interference prediction, and contingency planning.

Currently, most data centers use both electronic and optical communication protocols, for different tasks. Scale-out networks connect thousands of AI computers across a data center, making optics the obvious choice for long distances. Scale-up networks connect several GPUs inside a single mega-computer or rack, where latency is critical, and dense copper interconnects, such as Nvidia’s NVLink, have long been the engineering solution of choice.

That distinction is beginning to blur, and Nvidia may be quietly dipping its toes in the water of optics for a scale-up. In 2025, the company introduced NVLink Fusion, a program that allows hyperscalers and cloud providers to build custom AI systems around Nvidia’s scale-up fabric. This summer, the company’s list of partners has grown to include several photonics players such as Ayar Labs, Marvell Technologies, and Lightmatter.

As AI needs grow, the number of GPUs and the bandwidth of connections between them continues to grow. Electrical links are being pushed toward terabit-per-second signaling. But higher frequencies increase attenuation, power consumption, and heat. To cope, copper cables must become shorter and thicker, making it more difficult to route them through crowded server racks. At the same time, Nvidia is planning to add even more processors to single interconnected systems, going from 72 GPUs today to as many as 576 by 2027.

“The physics of copper just changes as you increase the frequency of the signals going across that copper,” says Nvidia principal product marketing manager Jesse Clayton. “You can mitigate that by limiting the length of the cable, and right now all of our copper cabling is within that single NVL72 rack, so the distances aren’t that long, but we are getting close to the limits of what we can push.”

Engineers call this the “copper wall.” Many now believe that keeping up with AI will eventually require moving optical interconnects closer to the processors themselves.

Bringing optics to the GPU

To move data as light, engineers must figure out how to convert electrical signals into optical ones, then integrate lasers, photonic devices, and electronic chips into a single package without blowing up cost, power consumption, or manufacturing complexity.

Those hurdles are no longer insurmountable.

“More than any other time that I recall, I think it’s concluded that the co-packaged optics will happen,” says Keren Bergman, a professor of electrical engineering at Columbia University.

Ayar Labs, one of the photonics companies participating in the NVLink Fusion ecosystem, has developed optical chiplets meant to sit alongside GPUs and other processors, converting electrical signals into light only millimeters from the compute silicon. “The most optimal way to do that is having a photonic chiplet with an electronic chiplet and having them hybrid bonded together,” says Ayar’s director of product management, Vishal Chandrasekar.

He argues that optical scale-up has become practical because the semiconductor manufacturing ecosystem has matured around co-packaged optics. Advances in hybrid bonding now allow electronic and photonic chiplets to be manufactured separately, then integrated into a single optical engine that sits beside GPUs or switches.

“What has really happened in the last few years is that the process maturity coming out of the fabs has really improved,” Chandrasekar says. He believes the industry is now on a path toward high-volume optical scale-up systems within the next couple of years.

Lightmatter has designed a 3D photonic connector with input and output ports across the entire chip area instead of only along the edges. Lightmatter

Lightmatter has a different solution. Rather than placing optical chiplets beside processors, the company is building a photonic interposer that serves as the packaging substrate itself. The idea is that future processors could be stacked directly on top of a silicon photonics engine. Vice president of product Roy Kim describes these interposers and optical chiplets as “complementary steps in the photonics road map.”

According to Kim, packaging is no longer the main obstacle. With standard foundries and assembly partners, optical interconnects can now be manufactured, tested, and integrated in ways that look a lot more like conventional chip production, he says.

The remaining challenge is laser integration. Today’s pluggable laser modules take up valuable rack space and are hard to scale. Instead, Lightmatter is putting large numbers of lasers directly onto silicon, which Kim believes could soon support much denser optical scale-up fabrics.

The future of optical scale-up

Nvidia, for its part, is taking a gradual approach to adopting these technologies. Clayton says the company expects optics to move into scale-up networking eventually, as AI’s bandwidth requirements continue to grow.

“I think we’ve taken an approach of migrating to optical when it makes the most sense for our platform,” he says. “If you migrate the entire platform at once, you take a tremendous amount of risk on new designs. So, starting at the scale-out space, and then in the future moving to scale-up is kind of a sensible, measured approach from our perspective.”

That slow-and-steady attitude is one reason why some researchers view NVLink Fusion as more than an interoperability play. “The Fusion is sort of this umbrella—you can put copper in it, you can put photonics in it. It’s very photonics friendly,” Bergman says. Rather than committing Nvidia to a specific interconnect technology, she says, Fusion creates an ecosystem in which electrical and optical approaches can evolve side by side.

Not everyone expects photonics to become the only answer. Researchers continue to improve electrical interconnects through advances in signaling, packaging, and transceiver design. And other groups are pursuing alternative technologies.

Underneath all these advances is a bigger issue: Can optical scale-up become something the industry at large can do, rather than a proprietary feature of Nvidia’s ecosystem?

“Absolutely,” Chandrasekar says. “There are going to be multiple implementations in the 2028 time frame in very high volume.”

If that happens, future AI systems could span multiple racks while behaving as a single computing domain, connected via a mix of electrical, optical, and perhaps other emerging technologies.

A quantum computer capable of breaking the codes that help secure today’s internet became dramatically more possible in March, when Google scientists and their colleagues unveiled new research. Usually, cybersecurity researchers share information about how attacks work to help prevent them. This group, however, believed its discovery posed enough of a security risk for them to use an unprecedented strategy to conceal how exactly to replicate their research.

But in just three days, with the help of crowdsourcing and swarms of AI agents, Seattle-based research startup Eigen Labs not only matched the results of that hidden work, but surpassed them.

In theory, quantum computers can quickly find answers to problems it might take classical computers eons to solve, which has made them especially interesting for code breaking. Modern cryptography depends on the difficulty classical computers face when it comes to mathematical problems such as factoring huge numbers. Using an algorithm devised by mathematician Peter Shor in 1994, quantum computers could in principle rapidly crack such encryption.

No quantum hardware capable of practical code breaking currently exists. However, labs worldwide are striving to build quantum computers with enough qubits—the quantum equivalent of the bits underlying classical computing—to execute such attacks. The potential threat quantum computers pose has also led governments across the globe to begin migrating to post-quantum cryptography (PQC). U.S. federal agencies are required to transition high-value assets and high-impact systems to PQC for key establishment schemes by the end of 2030. The findings from Google and Eigen Labs, experts say, are a clear demonstration that migrating to encryption resistant to quantum computers should take place as rapidly as possible.

Preparing for Postquantum Cryptography

To prepare for the era of cryptographically relevant quantum computers, scientists regularly probe into what resources such devices might actually require. For example, in 2025, Google Quantum AI research scientist Craig Gidney revealed a quantum computer with less than 1 million qubits, running Shor’s algorithm for less than a week could break 2,048-bit RSA encryption, a common standard for securing online data. That was a 20-fold decrease in the number of qubits needed from previous estimates made in 2019.

Gidney and others then investigated a different form of encryption involving elliptic curve cryptography (ECC). This approach underlies the security of cryptocurrencies such as Bitcoin and Ethereum and, with RSA, helps secure modern internet traffic.

On 30 March, the Google researchers and their colleagues revealed they optimized Shor’s algorithm to break 256-bit ECC with 1,200 to 1,450 logical qubits. (Qubits are currently error-ridden devices; a cluster of many “physical qubits,” the kinds that researchers have developed to date, can make up one useful “logical qubit.”) The researchers noted these quantum computations could be encoded with less than 500,000 superconducting physical qubits, cracking 256-bit ECC in 18 to 23 minutes. This again marked a nearly 20-fold reduction in the number of physical qubits previously estimated. (To date, the largest superconducting processor—IBM’s Condor—has 1,121 qubits.)

“I knew we could do better but was not expecting that much improvement.” David Jao, University of Waterloo

“The results were surprising to me,” says David Jao, professor and chair of combinatorics and optimization at the University of Waterloo in Canada, who did not participate in this work. “I knew we could do better but was not expecting that much improvement.”

However, instead of fully explaining how they accomplished this advance, the scientists released their work using a “zero-knowledge proof,“ a technique with which they could verify to others than their attack works without revealing exactly how to carry it out. “To my knowledge, this was the first time that a result of this kind was released using a zero-knowledge proof,” says André Schrottenloher, a researcher at the Inria Center at the University of Rennes in France, who did not take part in this study.

In a blog post, Google noted it had concealed its results in this manner after talks with the U.S. government. Most experts consulted saw little point to this. For instance, although he thought “it was a cute way to use a zero-knowledge proof,” Steven Galbraith, professor and head of mathematics at the University of Auckland in New Zealand, does not think cryptographically relevant quantum computers “are around the corner.”

Others were more dismissive. “Zero-knowledge proofs for academic research are both useless and futile,” Jao says. “The purpose of the academic research enterprise is not merely to answer questions, but to inform the community and communicate those answers in a way that imparts understanding and allows other teams to build upon the results. A zero-knowledge proof does not convey or communicate understanding.”

Replicating Google’s Results

At Eigen Labs, 22-year-old engineer Gautham Anant was enrolled in an introduction to quantum computing course at the University of Washington, and wanted to see if he could replicate Google’s results. By analyzing the virtual machine Google built to verify its findings, Anant created software to test any quantum circuit in terms of the number of qubits and gates it needed to defeat 256-bit ECC. Anant then, with help from another young engineer, Gajesh Naik, set up AI agents to analyze scientific literature to automatically design quantum circuits and optimize them for this task.

On their own, Eigen Labs researchers could not develop a circuit as efficient as Google’s. So on 1 June, they debuted a site where anyone could point their agent at Eigen Labs’ public repository to design better circuits, with these agents able to exchange notes with each other about their work.

Eigen Labs engineers Gautham Anant [back] and Gajesh Naik [front] used crowdsourcing and AI agents to match Google’s results. Eigen Labs

“We had essentially two classes of people working on this—the people building these agents…and quantum scientists,” Anant says. “The quantum scientists can understand the edits the agents have made, and they understand the science in ways that can help the agents incorporate changes much faster than they would on their own.”

Within 8 hours, this crowdsourcing effort matched Google’s results. In about 72 hours, it surpassed Google. As of the end of June, this open network can overcome 256-bit ECC with a circuit 47.5 percent more efficient than Google’s. “We absolutely did not expect to beat Google,” Anant says.

Independently, at the same time Eigen Labs launched its crowdsourcing effort, Schrottenloher published results matching Google’s. It cited much of the same research the Google team likely did to achieve its findings. “I just put two and two together,” Schrottenloher says.

It was obvious that the Google results would eventually be replicated, Schrottenloher says. “Cryptography and algorithms research is curiosity-driven, and the Google Quantum AI paper generated a lot of curiosity,” he notes.

Sreeram Kannan, Eigen Labs’s founder, believes agents that contributed to Eigen Labs’ effort clearly saw Schrottenloher’s work and used it to significantly improve their results. “That’s the pace at which science can work with an open network—results built on others’ research in minutes instead of months,” he says.

This mission to match Google’s results was almost a perfect test case for Eigen Labs’ approach, says Sam Jaques, an assistant professor in the Department of Combinatorics and Optimization at the University of Waterloo. “It makes sense that AI is good at microscale optimization,” says Jaques, who did not take part in any of these studies. “The thing about these quantum circuits is that there are a lot of places to boost efficiency here and there that may be hard for a person to see.”

A Test Case for Zero-Knowledge Proofs

All in all, using zero-knowledge proofs for research may not have much benefit. “There is almost no situation in research where one research group is so far ahead of all the other research groups that they can keep novel results secret for long,” Jao says. “Research is an extremely competitive environment, and no team stays ahead of the curve for very long. I believe even classified research labs no longer hold any significant advantage over the research community at large.”

Given this experience, Gidney says in a blog post, “I don’t think it’s the right strategy moving forward” to publish such results with zero-knowledge proofs. “The benefits are negligible, and the costs are many. We should just publish openly.”

For Kannan, these new findings are the first major public proof of concept of Eigen Labs’ model of open agent-based science. “We want to create frameworks to help anyone innovate,” he says. “We see two pathways ahead—one where OpenAI and Anthropic use AI to do all of science, and the rest of us just consume the results, and another where we’re coordinating with agents and others to actively shape science with our ideas, skills, and expertise. The former just sounds so disastrous to me. We all want individual agency.”

Eigen Labs sees its agent-based open science is tackling far more than quantum AI. “We’ve lined up scientists in very different fields, such as materials science and biology, to tackle many different problems,” Kannan says. “We see the role of scientists as architecting the right problem for a community of agents to make progress on.”

When it comes to the security implications of all these results, “even before these results, the need to migrate to the PQC algorithms was imperative,” says Dustin Moody, a mathematician at the National Institute of Standards and Technology in Gaithersburg, Md., who did not take part in this research. The new results from Google, Eigen Labs, Schrottenloher, and others, he says, “seem like they are helping some people be more convinced they can’t put this off and should actually accelerate their migration plans. If an organization can migrate more quickly, it seems like a good idea to do so.”

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This article is brought to you by Melbourne Convention Bureau (MCB) supported by Business Events Australia.

As artificial intelligence accelerates global demand for compute, a parallel constraint is emerging with equal urgency: energy.

From hyperscale data centers to electrified industries, AI is driving a step change in electricity demand. This is not a future challenge, it is a present, system-level issue requiring coordinated action across energy, infrastructure, and engineering disciplines.

Around the world, the question is no longer whether AI will scale, but whether energy systems can scale with it.

Melbourne, Australia is moving beyond participation to become a globally connected leader helping define how these challenges are addressed.

A national challenge with global implications

Australia’s ambition to lead in artificial intelligence is sharpening focus on the infrastructure required to support it. Data centers are projected to account for up to 11 percent of the nation’s electricity consumption by 2035, placing increasing pressure on generation, transmission, and system reliability.

At the same time, insight from the IEEE Power and Energy Society (PES) highlights that meeting energy demand from AI and digital infrastructure is one of the most significant challenges facing engineers over the next decade.

The implications are clear. In addition to computing challenges, AI poses major energy systems challenges.

“As artificial intelligence continues to scale globally, the challenge is no longer just computational power, it is the energy systems required to support it” —Professor Thas (Ampalavanapillai) Nirmalathas, University of Melbourne

Why Melbourne is leading on the global stage

Victoria has developed one of the most advanced and integrated energy ecosystems in Australia and globally, spanning renewable generation, battery storage, grid modernization, and advanced materials.

What distinguishes Melbourne globally is how these capabilities are connected and applied at system scale.

The city brings together world class engineering research, a rapidly evolving clean energy sector, advanced digital infrastructure, and strong alignment between government, industry, and academia. This convergence is critical in the AI era, where energy, networks and computing systems must be designed together.

Victoria’s coordinated investment across these areas is positioning Melbourne not only as a national leader, but also as a reference point in the global energy system transformation.

Engineering the systems behind the AI economy

The challenge ahead is that generating more power won’t be enough, as engineers need to design systems that respond dynamically to new patterns of demand.

Three priorities are emerging globally:

• Aligning data center development with grid capacity and renewable supply
• Embedding flexibility through storage, demand response, and system optimization
• Balancing digital growth with decarbonization and long-term reliability

Addressing these priorities requires engineering expertise to be embedded earlier in planning ensuring energy systems, digital infrastructure, and policy are designed in parallel.

Melbourne’s strength lies in its ability to integrate this expertise across research, infrastructure, and real-world application.

Melbourne Connect is a University of Melbourne–led innovation precinct, supported by government and industry, designed to bring together research, business and policy to deliver real-world solutions.Atlantic Group

Research leadership shaping global solutions

At the centre of this capability is the University of Melbourne, where interdisciplinary research is advancing the systems required to support AI driven energy demand.

Through the Melbourne Energy Institute, for example, researchers are examining how energy technologies interact across entire systems from generation and networks through to end use.

“As artificial intelligence continues to scale globally, the challenge is no longer just computational power, it is the energy systems required to support it,” says Professor Thas (Ampalavanapillai) Nirmalathas, Dean of the Faculty of Engineering and Information Technology at the University of Melbourne.

“This is driving a new level of convergence between digital infrastructure and power systems engineering, where integrated, system level thinking is essential.”

Converging energy, networks and AI

Melbourne’s leadership is further strengthened by world-class interdisciplinary facilities such as the Smart Grid Lab in the Department of Electrical and Electronic Engineering, which enables real-time simulation of power systems, allowing engineers to test how solar, batteries, electric vehicles and other distributed resources interact within future grids. This supports the design of more resilient, efficient energy systems before they are deployed at scale.

Melbourne’s Smart Grid Lab in the Department of Electrical and Electronic Engineering enables real-time simulation of power systems. University of Melbourne

These capabilities will become increasingly important as data centers are integrated into the grid.

“AI driven demand is not only increasing computing requirements, but also placing new pressures on underlying energy systems,” says Glen Farivar, Senior Lecturer in Power Electronics at the University of Melbourne. “Designing these systems together is essential to achieving both performance and sustainability outcomes.”

This reflects a critical shift. Future infrastructure must be co designed across energy and digital systems, not developed in isolation.

A living ecosystem delivering real-world outcomes

Victoria’s broader energy ecosystem is translating these insights into practice.

Investment in renewable energy, grid infrastructure and storage is enabling higher levels of clean energy while maintaining reliability. Battery deployment is supporting the flexibility needed to manage both renewable variability and growing AI-driven demand.

At its core, Melbourne offers an integrated environment where research, industry and government collaborate to solve complex system challenges.

Why engineering collaboration matters

Solving the energy demands of the AI era cannot be achieved in isolation.

It requires engineers, researchers, utilities, and policymakers to work together earlier and more often. More than ever, engineering collaboration is a critical enabler of future energy systems.

Environments that bring together global expertise are becoming essential to how solutions are designed and delivered.

“Developing future energy systems that are affordable, sustainable, and resilient is a truly grand challenge” —Professor Pierluigi Mancarella, University of Melbourne

In this context, the University of Melbourne is co-leading, alongside Johns Hopkins University and Imperial College London, one of only seven Global Centres in Climate Change and Clean Energy. Through the Electric Power Innovation for a Carbon Free Society (EPICS) Centre, the University is also the Australian technical lead in advancing future energy systems, with EPICS the only Global Centre focused on future energy infrastructure.

The new Electric Power Innovation for a Carbon-Free Society (EPICS) Centre will address challenges in clean energy production and storage.University of Melbourne

“Developing future energy systems that are affordable, sustainable, and resilient is a truly grand challenge,” says Professor Pierluigi Mancarella, Chair Professor of Electrical Power Systems at the University of Melbourne and Australian director and international co-director of EPICS.

“As electricity grids are increasingly becoming the backbone of future energy systems, optimizing their interactions with other sectors, including AI and digitalization, and fostering interdisciplinary and international collaborations are essential,” he adds.

Global conferences as part of the solution

International conferences are increasingly recognized as critical platforms for advancing engineering solutions at scale. Melbourne’s ability to convene global expertise is central to its leadership.

In 2027, the city will host the IEEE PES Generation Transmission and Distribution (GTD) Asia 2027 Conference and Exposition, bringing together engineers, utilities, researchers and policymakers from across the world to address the challenges shaping the future of power systems.

IEEE PES GTD Asia 2027 Melbourne Committee (left to right): Dr. Mehdi Ghazavi Dozein (Monash University), Dr. Glen Farivar & Professor Pierluigi Mancarella (University of Melbourne) , Dr. Mohammad Mohammadi (Australian Energy Market Operator (AEMO)).MCB

“Melbourne offers a unique environment where world-class research, industry capability and policy leadership come together,” notes the IEEE PES GTD Asia 2027 Local Organising Committee, which includes Professor Pierluigi Mancarella and Dr. Glen Farivar from the University of Melbourne, as well as Dr. Mehdi Ghazavi Dozein of Monash University and Dr. Mohammad Mohammadi of the Australian Energy Market Operator.

“Hosting this event creates an opportunity to advance global collaboration on the systems and technologies required to deliver the energy transition at scale.”

These forums enable knowledge exchange, standards development and interdisciplinary collaboration, accelerating progress on complex engineering challenges.

Attendees view a digital installation at AIME 2025 at Melbourne Connect.MCB

Why Melbourne, and why now

As AI, electrification and digital infrastructure converge, the future of global energy systems will depend on the ability of engineers to collaborate and innovate at scale.

Melbourne provides a proven platform for that collaboration, combining world-class research, a rapidly evolving energy ecosystem, and the infrastructure to connect global expertise.

Melbourne Convention Bureau, IEEE Communications Society, and University of Melbourne Representatives.University of Melbourne

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It is an opportunity to engage with a globally connected engineering community and contribute directly to solving one of the most significant challenges facing the profession today.

Through the support of the Melbourne Convention Bureau, professionals can access tailored, free support to bid for and deliver international conferences, bringing global expertise together in a city actively shaping the future of energy systems.

To explore hosting your next conference in Melbourne, contact the Melbourne Convention Bureau at info@melbournecb.com.

On 22 June, President Donald Trump signed two executive orders focused on quantum computing: The first aims to accelerate the development of quantum computers, sensors, and networks. The other seeks to accelerate the timeline for migrating critical infrastructure to cryptographic schemes that are immune to quantum attacks. In response, the U.S. Department of Energy (DOE) has committed to deploy “the world’s first fault-tolerant, scientifically relevant quantum computer” by the ambitious deadline of 2028.

“It feels like everything is happening all at once, which is great,” says Pranav Gokhale, chief technology officer and co-founder of quantum company Infleqtion.

“I think this executive order is in many ways a continuation of what’s been going on since 2018, when the first National Quantum Initiative Act was passed,” says Elizabeth Goldschmidt, associate professor of physics at the University of Illinois Urbana-Champagne (UIUC). “It revives and continues a lot of things that have happened since. I think it’s very ambitious, but there’s a lot of very good stuff in here.”

IEEE Spectrum spoke to experts about these policy initiatives and how they reflect and shape the United States’ quantum capabilities for the next few years.

How realistic is the 2028 deadline for a fault-tolerant quantum computer?

Here, the devil is in the details. A fault-tolerant quantum computer is one that can correct mistakes that happen naturally, and inevitably, during computations. Fault tolerance is achieved through quantum error correction, a way to make fragile quantum bits (qubits) robust against noise. This is generally done by encoding a single bit of quantum information into a collection of physical qubits, called a logical qubit. For a quantum computer to be useful, it would need to be able to do operations on many such logical qubits, and actively correct errors in the process.

The DOE is aiming for quantum computers with logical qubits “numbering in the low hundreds.” The current record holders are the companies QuEra, claiming 96 logical qubits, and Quantinuum, claiming 94. The low hundreds threshold is already a 2028 target on several companies’ roadmaps, including QuEra, IonQ, and IBM. But not all logical qubits are created equal.

“How much more stable these logical qubits would be remains a very open question.” —Edward Parker, Rand Corporation

“Originally, the idea of a logical qubit was that, once your physical qubits were better than a certain threshold, then you should be able to correct all errors in the [logical] qubit, which basically means that your qubit would be everlasting,” says Jay Sau, professor of physics at the University of Maryland. “Now, a ‘logical qubit’ seems to be a collection of qubits that is somewhat better than one qubit, and I’m not sure that the use for such logical qubits is as obvious.”

Others argue that these imperfect logical qubits may still have useful applications. Even if a logical qubit isn’t everlasting, if it lasts long enough without errors to run a particular algorithm, it’ll do the trick.

“I think that achieving hundreds of logical qubits by 2028 is plausible,” says Edward Parker, senior physical scientist at the Rand Corporation. “These will not be perfect logical qubits that are capable of sustaining very long computations. These logical qubits would be somewhat more stable than their underlying constituent physical qubits, but still noisy. How much more stable these logical qubits would be remains a very open question.”

The DOE’s stated goal is a “scientifically relevant” quantum computer—one that can answer scientific questions that would be prohibitively difficult to answer with current supercomputers.

“I cannot think of a [scientific] question that a quantum computer can help with in 2028, unless there is a serious breakthrough in device quality,” Maryland’s Sau says.

Infleqtion’s Gokhale disagrees. “100 logical qubits is where we see the advantage” for two scientific models, he says: One that underlies magnetism and one that potentially underlies high-temperature superconductivity.

Will quantum computers be commercially successful by 2028?

Being able to solve scientific problems is inherently valuable, but Carl Williams, quantum industry consultant at his company CJW Quantum Consulting and former deputy director at the U.S. National Institute of Standards and Technology, argues the scientific applications will not cover the billions of dollars that have gone into quantum research and development so far. For that, Williams says, commercial applications are needed.

“I think for materials, quantum chemistry, and pharmaceuticals, we may see the first economically viable computations in 2028 or 2029,” Williams says. “Note, this is different from saying that the businesses will be cash positive. I suspect that will occur in the early 2030s and probably by 2032. I think there are other applications, such as machine learning and optimization, that will require a much larger quantum computer.”

“I cannot think of a [scientific] question that a quantum computer can help with in 2028, unless there is a serious breakthrough in device quality.” —Jay Sau, University of Maryland

Infleqtion’s Gokhale also believes that commercial applications are within close reach. “I think that materials discovery is a little bit further than the science problems, but not that much further, and the demand on the commercial side is going to be larger dollar amounts than what scientists can pay for.”

Gokhale also argues that the costs of running a quantum machine, particularly a neutral-atom based machine such as Infleqtion’s, are dropping rapidly. “The build material cost that we’re seeing is incredibly favorable for not just building one quantum computer but having a data center with tens, if not hundreds of quantum computers. We expect that the market will support cloud-based deployments too.”

What’s the deal with quantum sensors?

The executive order also directs the Secretary of Defense to identify three quantum sensor technologies that can be ready for use by 2028. The experts IEEE Spectrum spoke to seemed to not only think this is likely feasible, but also have good candidates for what those sensor technologies should be. Top candidates include inertial navigation without GPS, gravity measurement for navigation or for underground surveying, and magnetic measurements for navigation or anomaly detection.

Almost everyone agreed that optical atomic clocks—higher-precision timing devices that may enable more precise GPS—were a prime candidate for such a sensor. “Those are already deployed and just being refined to fit into mission architectures,” Gokhale says.

Another potential candidate is sensing extremely weak radio-frequency signals using individual atoms, ions, or other qubit-like structures.

“I like that the specific quantum sensors have been targeted,” UIUC’s Goldschmidt says. “The Department of Defense has always been active about pursuing quantum sensing, because of the importance, in particular, of things like position navigation and timing. I would love to see more thought going into using quantum sensors in various other places.”

Does the U.S. have the workforce necessary?

The executive order also puts a strong emphasis on developing the quantum workforce within the United States. The quantum computing field still relies heavily on holders of quantum physics–related doctorates, although many people with other engineering skills are also needed.

“If you go look at the QED-C’s state of the quantum report from this year, you see how many job openings remain,” Williams says. “There’s nothing surprising about the number of openings that remain. We didn’t really start trying to refill our pipeline until 2018, two or three years too late. It’s five years to get a Ph.D. And then if you start doing things to discourage people from coming to the U.S., or make it harder for them to get in or get an H1B visa, all you do is make the problem worse. You don’t help the problem by being unwelcoming.”

“We’ve had our fair share of successes [in hiring], but also our fair share of just roles that have been unfilled for weeks, if not months and months,” Infleqtion’s Gokhale says. “Now, the flip side is we do think quantum is reaching the point where we can reduce our reliance on the Ph.D. types and start moving to more manufacturing engineering, and where we see really bright spots are, for instance, community colleges.”

What about the threat posed by quantum computers to cryptography?

Despite having potential scientific and commercial advantages, future quantum computers also pose a novel threat: They can be used to break certain types of cryptography that are in common use today. Luckily, cryptographic protocols that are immune to quantum attacks, known as post-quantum cryptography, exist and have been standardized by NIST.

Trump’s post-quantum cryptography executive order accelerates the timeline for this transition to either 2030 or 2031, from a previous Biden-era deadline of 2035. This is likely a reaction to several recent developments that have brought the quantum threat closer to reality than previously thought.

“If you start doing things to discourage people from coming to the U.S., or make it harder for them to get in or get an H1B visa, all you do is make the problem worse.” —Carl Williams, CJW Quantum Consulting

“It is difficult to accurately predict whether and when a cryptography-breaking quantum computer will emerge,” says Chris Peikert, professor of computer science and engineering at the University of Michigan and chief scientific officer at cryptocurrency Algorand. “But the larger question is one of risk: What are the chances that one will be built by 2028? By 2030? By 2034? The cost and timeline of migrating must be weighed against the chance of a catastrophic break occurring before the migration is complete. The recent progress increases that risk, so the migration should be accelerated.”

“The biggest priority in the transition is securing critical national infrastructure, where systems have long life cycles and vulnerable cryptography presents an unacceptable national security risk,” Ali El Kaafarani, chief executive officer and founder at post-quantum cryptography provider PQShield, wrote via email. “This transition needs to happen at the government level, so the EO is a welcome intervention. It’s also worth noting that this isn’t the steepest timeline change we have seen: Google and Cloudflare have already set 2029 implementation deadlines, and the supply chain will now need to follow their lead as well. Quantum readiness is now an active compliance milestone, and the tightened timelines are only feasible if the boardroom makes migration a priority. The time to build strategic roadmaps is now.”

“Yeah, we should probably get on that,” Goldschmidt says.

This article is brought to you by Capital One.

After five years leading natural language understanding and eventually the entire Alexa AI organization at Amazon, Prem Natarajan made a nontraditional move: He became Chief Scientist at a bank. Not just any bank: Capital One, a financial institution serving over 100 million customers, helping everyday Americans manage their financial lives.

For Natarajan, a veteran of DARPA-funded research and academia who had watched machine learning evolve from task-specific applications to foundation models, the logic was clear. Some of the most interesting advances in AI research and deployment were shifting from big tech’s horizontal platforms to industry verticals like finance, where the most complex problems aren’t just building models but making AI work under the constraints of real-world customer problems, contextual business knowledge, continuous learning, with an incredibly high bar for accuracy and privacy.

That’s also what made Capital One the right place to do it. For decades, the company has been recognized as one of the most data- and analytics-driven financial institutions in the industry. Its business model from the very beginning was built around using data and technology to personalize financial products for customers. A decade ago, Capital One went all in on the cloud and rebuilt its data ecosystem, creating a unified environment for data, compute, and AI and machine learning experimentation. Today, its modern infrastructure, disciplined approach to governance, and deep bench of talent form the foundation that allows it to lead in enterprise AI.

Advances in AI research and deployment are shifting from big tech’s horizontal platforms to industry verticals like finance.

So, why does a bank need a Chief Scientist? The answer lies in a fundamental misconception about AI in financial services. Most financial institutions still view AI as a technology to deploy – leveraging the latest large language model, deploying it through APIs, and integrating it into existing workflows – rather than a scientific discipline. Capital One is doing something different: building a scientific community and research organization to solve real-world customer problems and invent impactful AI solutions that don’t yet exist.

While widely available foundation models can handle general tasks, they can’t yet solve many domain-specific challenges, such as detecting fraud in real-time across billions of transactions, or providing state-of-the-art conversational tools so customers can engage when, how, and where they want to.

These challenges of making AI reliable, scalable, and well governed require original research and scientific innovation that is funneled back into the business to create real-world applications to address customer needs.

The Constraints That Demand Innovation

Prem Natarajan, an IEEE Fellow, is Chief Scientist at Capital One. “If you want to solve really important problems in AI and see your work come to life, this is one of the few places you can do that,” he says.Capital One

Because banks are dealing with people’s finances, there is an incredibly high bar for getting it right when it comes to AI. Take fraud, for example. Even a minor fraud event can have a devastating impact on certain customers. The best fraud models and platforms can detect and help mitigate fraud in the time it takes someone to tap their card, which is table stakes for protecting customers and their financial information with accuracy and speed. Looking at these types of challenges, Capital One and Natarajan saw that serving millions of customers meant solving AI problems at a scale and complexity that many enterprises don’t encounter. These same constraints create a unique research environment.

At Capital One, the approach to building AI is to provide value to customers in ways never possible before, improving their financial lives and meeting them where they are with services they actually need. That focus, combined with massive scale and world-class risk management requirements, makes the scientific problems both harder and just as consequential as those found in most big tech labs.

Advancing AI Through “Destination-Back Thinking”

Capital One’s approach to AI research and innovation starts with what Natarajan calls “destination-back thinking.” Rather than asking what’s possible with current technology, the team envisions the customer experience they want to deliver – perhaps a car buyer who works long days and can only research the options at 10 p.m., or a customer facing an unexpected expense who needs immediate, personalized guidance – and then works backward to identify the scientific breakthroughs required to get there.

“You’re thinking back from where you’re providing incredibly valuable services,” Natarajan explains. “Once you have that vision clearly, you work back and say, what are the gaps? What are the things we need to invent?” This ensures that when problems are solved, the impact is essentially guaranteed, because the team has already identified what will make a tangible difference in customers’ lives.

But methodology alone isn’t enough. Capital One’s nearly 15-year bet on cloud-first architecture created something rare in financial services: a unified data and compute ecosystem that can support the kind of scientific experimentation typically seen in big tech research labs. As the only major U.S. bank to go all-in on public cloud infrastructure, Capital One eliminated the legacy systems that can constrain AI research at most financial institutions. This modern tech stack enables rapid iteration, large-scale model training, and what Natarajan calls “continuous learning,” systems that improve after deployment rather than degrading over time. This unique approach to infrastructure is a critical component in making new categories of research possible.

Agentic AI: From Research to Production

The research agenda manifests in systems already serving customers. Early last year, Capital One launched what may be the first fully agentic AI customer service experience built entirely in-house by a bank: a car buying tool that takes actions on behalf of customers based on their requests, not just answers questions. Behind it lies extensive research into multi-agentic AI reasoning systems that can navigate real-time data, business knowledge, constraints, and guardrails, with various agents that can work together to accomplish complex tasks.

Capital One has launched a fully agentic AI customer service experience powered by extensive research into multi-agentic reasoning systems that can navigate real-time data.

The team is also working on solving things like tokenization challenges, protecting sensitive data while enabling model training. To accelerate this cutting-edge work, Capital One has established partnerships with Columbia University, the University of Southern California, and the University of Illinois, and became the only bank funding NSF’s national AI research centers in 2025, investing millions in initiatives that span mental health, materials discovery, science, technology, engineering, and mathematics education, human-AI collaboration, and drug development.

In the spring of 2026, the company hosted its inaugural AI Symposium to deepen connections and foster insight-sharing between the scientific AI community, leading AI labs, startups, and its own technology, science, and AI leaders and partners.

Building a World-Class AI Organization

Capital One is building the next generation of AI talent. Join the team inventing impactful AI solutions to shape the future of finance. Learn more at https://capitalone.science/

External validation suggests the strategy is working. Evident AI ranked Capital One as the leading bank in AI talent and a global leader in AI innovation for three consecutive years, noting the bank accounted for 38 percent of all AI patents filed by the top 50 financial institutions. Capital One was also recognized by IFI Insights as the only financial institution among the top U.S. patent leaders in agentic and generative AI in 2025, alongside the likes of Google, NVIDIA, DeepMind, IBM, Microsoft, Intel, Adobe and Samsung. Capital One’s AI team – which has experience from leading AI labs and top universities – represents expertise rarely found outside Silicon Valley.

But recruitment requires a mission. “If you want to solve really important problems in AI and see your work come to life, this is one of the few places you can do that,” Natarajan says. The pitch is consistent: Capital One isn’t just optimizing algorithms for niche financial applications like high frequency trading, it’s using science to enhance financial experiences for over 100 million everyday Americans, expanding engagement and real-time insights, personalization, and access to their personal finances and products like never before.

Capital One was recognized as the only financial institution among the top U.S. patent leaders in agentic and generative AI in 2025, alongside the likes of Google, NVIDIA, DeepMind, and Microsoft.

The frontiers Natarajan is most excited about – agentic AI systems that can dramatically improve performance by reframing how problems are solved, and domain-specific reasoning that understands contextual and financial nuance – represent the next phase of innovation. “By just casting the problem in an agentic framework, you can actually get way more performance” from the same underlying models, he explains.

It’s this kind of applied research, like translating general capabilities into production systems for millions of customers, that defines the Chief Scientist’s mandate. When recruiting talent to his AI team, a group comparable only to the most sophisticated tech companies in caliber, Natarajan frames the opportunity around a mission. He invokes Steve Jobs’ famous challenge to John Sculley: “Do you want to spend the rest of your life selling sugared water, or do you want to change the world?” For Natarajan, the parallel is clear. Building AI systems that transform financial services for millions of everyday Americans – that’s changing the world. And it requires the kind of scientific rigor that only a Chief Scientist can lead.

Vibe coding’s dark side, “vibe hacking,” is on the rise. Cybersecurity companies such as McAfee and Bitdefender have observed recent spikes in vibe-coded malware, also called “vibeware,” with telltale signs such as explanatory code comments or template placeholders akin to what vibe-coded apps contain. But just how challenging is it to stop the spread of bad vibes from these emerging cyberattacks?

Researchers at the University College Cork (UCC) in Ireland found that malicious software crafted with the assistance of generative AI have varied code structures that can evade static malware detection, but their nefarious behavior and intent remain the same as those of traditional malware. The team presented their results in May at the 23rd ACM International Conference on Computing Frontiers held in Italy.

Hackers are taking advantage of the probabilistic nature of generative AI, producing vibeware that has multiple variants. “With an AI coding tool, you can say, ‘I want the same functionality, but do it in a different way.’ So you can create malware that’s bespoke to a particular attack you want to do,” says Utz Roedig, a professor of computer science at UCC who led the research.

Anti-Malware as Usual

Traditional antivirus software uses a combination of static and dynamic analysis tools to screen newly downloaded software. Static analysis employs pattern-matching techniques, comparing the cryptographic hash of a file against databases of known malware signatures or employing rule-based engines like YARA, an open-source tool that identifies and classifies malware according to specific binary patterns or strings. Dynamic analysis runs malware in a controlled or sandboxed environment to monitor its actions for suspicious activity.

In their experiments, the team at UCC generated a series of malicious shell scripts designed to steal sensitive data from Linux-based systems. Each shell-script iteration was built specifically to bypass YARA rules. While the resulting shell scripts are distinct in terms of code syntax, they remain functionally equivalent.

“Even if you make the program achieve its goal differently, the behavior is the same,” Roedig says. “The structure looks different but you can’t hide the malicious behavior.”

This highlights a necessary shift toward more dynamic and behavior-centric detection strategies.

“Now anyone can generate hundreds of unique variants, so hash matching is pointless,” says Prince Chaddha, a research lead at ProjectDiscovery, an open-source cybersecurity company. “What still works is behavioral analysis. Defenders must go fully behavioral and use AI themselves to catch such malware.” AI can help cybersecurity professionals swiftly spot vulnerabilities in software, but their expertise, judgement, and oversight—along with multiple layers of verification—must be built into the process.

LLMs Lower the Barrier to Malware Entry

The UCC researchers also found that vibe-coding malware can be accomplished with as few as two prompts. “[Generative AI] makes it more accessible. And that would then mean you probably get more of it because the barrier to create malware lowers,” says Roedig.

Dan Gittis, director of the threat-intelligence and detection-engineering team at managed security services provider UltraViolet Cyber, in Virginia, echoes the sentiment. “You no longer have to be adept at coding to build malware,” he says. “Threat actors without the experience or skills can start dipping their toes in this field, and those that do have the preexisting skill set can very likely develop even better malware.”

More surprisingly, the UCC team’s AI coding tool of choice, Cursor, didn’t refuse or restrict their malware-related prompts. This emphasizes the need to put up safety guardrails that prevent malicious use cases. Roedig cautions, however, that attackers “probably will tinker with AI models to remove guardrails,” so developers of AI coding tools must also factor in how to defend against getting around those guardrails.

Looking to the future, Gittis believes AI-generated malware could advance and multiply. “There are now more individuals who can serve as capable threat actors, meaning the overall number of cyberattacks could increase. It also means that already capable actors are very likely going to operate faster and more effectively,” he says. “And it means that threat actors may be able to develop more dynamic malware that evolves.”

He points to Google’s discovery of PROMPTFLUX as an example. The PROMPTFLUX malware calls the Gemini API during runtime to rewrite its own source code on demand and dodge detection. This adaptive and regenerative ability “is likely going to be very impactful to how defenders need to operate going forward,” says Gittis.

This constant tug-of-war is nothing new in the world of cybersecurity. “It has always been that attacker and defender go hand in hand. One side invents something and the other side tries to go around it, and you use all tools necessary,” Roedig says.

It’s happening again with vibe hacking and vibeware. But the good news, according to Gittis, is that “defenders have the same resources, if not more. This means that we can increase our capabilities, efficiency, and knowledge of response measures.”

It’s little secret that Europe is dependent on foreign technology—particularly U.S. tech—for office software, cloud services, AI, and more. This may have been easy to accept just several years ago, but when the United States government now openly threatens European countries with military action, there is growing anxiety in Europe that technology dependency is a liability.

One 3 June, the European Commission, the European Union’s executive branch, introduced a sprawling package that seeks to shift the tech supply chain in Europe’s favor.

This Tech Sovereignty Package contains four parts. Two are proposed laws—the European Chips Act 2.0 and the Cloud and AI Development Act. The other two are broader strategies—one to promote open-source software and one to shore up the EU’s electric grid. Before the first two can become law, they must go through a long process involving the EU’s other two lawmaking bodies: the Parliament and the Council.

The Commission’s vision places European governments and crucial industry at the forefront of change, encouraging them to fund and buy European tech. Some analysts, however, are unconvinced the measures go far enough to change the status quo.

Part 1: Chips Act 2.0

As indicated in the name, the Chips Act 2.0 follows the EU’s original Chips Act, adopted in 2023 (and not to be confused with its similarly named U.S. counterpart.) The first European Chips Act encouraged investment in EU semiconductor production, aiming to reach a 20 percent share in the world market for “cutting-edge and sustainable” microchips by 2030. It supported pilot lines in areas like sub-2-nanometer chips and photonics, in addition to both large fabs and small startups.

Early results have been mixed—a 2025 audit found that the first Chips Act had created progress in areas like chip design and pilot lines, but deemed it “unlikely to be sufficient” to reach an “overly ambitious” target.

One criticism of the first Chips Act was that it did little to cultivate demand for European-made semiconductors. The Chips Act 2.0, then, includes demand-boosting measures that encourage governments and industry to use European chips, in addition to retaining its supply-side funding.

There are new supply-side elements, too. The Chips Act 2.0 allows the Commission to fund certain fabs as “strategic projects” and fast-track them through permitting. The Commission has proposed an open-access foundry to manufacture chips at 3-nm-process nodes or lower, which could start pilot production between 2030 and 2033.

If successful, European semiconductor manufacturers could take over the supply for industrial firms in automotive, defence, and advanced manufacturing. Today, these firms are especially vulnerable to global supply-chain disruptions.

At the same time, some analysts still question whether the Chips Act will create enough demand. “The Commission clearly recognizes this in the revision and devotes considerable attention to demand-side levers,” says Tillman Schenk, researcher at Bruegel, a Brussels-based think tank. “However, these instruments currently strike me as somewhat underdeveloped.”

Some analysts write that to raise demand, the EU must explicitly require, not merely encourage, governments to “buy European.”

Part 2: Cloud and AI Development Act

The accompanying Cloud and AI Development Act (CADA) focuses on cloud services and data centers. The EU trails both the U.S. and China in total data-center capacity, and European leaders say they need to close this cloud gap if both EU governments and industry are to make the most of cutting-edge AI.

Therefore, CADA calls for a tripling of EU data-center capacity by the early 2030s.

Michael Winterson, Secretary General of the European Data Centre Association, calls the goal “achievable in principle” and says that “demand alone could justify a tripling of capacity.” Achieving this goal will require dramatically speeding up data-center projects that today might get stuck in permitting or waiting in a queue for electrical supply, he says.

CADA stipulates that member states should designate particular projects and “acceleration zones” for fast-tracked approval. It also stipulates that, by 2030, data-center operators should be able to obtain the necessary permits and grid access—often a years-long process today—in 18 months.

But in Europe, there are some rather large elephants in the cloud. Today, four U.S. hyperscalers—AWS, Google Cloud, IBM Cloud, and Microsoft Azure—account for over two-thirds of EU cloud services. This troubles some Europeans because U.S. law authorizes U.S. authorities to compel U.S. firms to hand over data even if stored abroad.

To ensure that more sensitive European data stays within Europe, CADA lays out a sliding scale of four “assurance levels.” Higher levels require more EU-located data, infrastructure, staff, and supply chains. However, national authorities can choose assurance levels as they see fit, so the same application might use different levels in different countries.

Some analysts like EuroStack’s Stéfane Fermigier note that this leaves the door open for the assurance levels to be applied unevenly. American hyperscalers could locate data centers in the EU, claim sovereignty compliance, and avoid ceding ground to their smaller European counterparts.

Part 3: EU Energy System Road Map

The announcement of a threefold increase in the EU’s data-center capacity is unlikely to comfort the many Europeans who oppose their construction, citing concerns about their environmental footprints or their potential to strain the electrical grid. Partly in response, the EU’s tech sovereignty package includes a “strategic roadmap” for Europe’s electrical grids.

The Commission has proposed a rating system that would grade data centers based on their efficiency and environmental footprint, but this scheme has reportedly been delayed under pressure from data-center operators and some EU member states.

The road map includes support and research projects for smart grids and for AI models in the energy sector. It also plans to enable EU electric grids to more easily exchange data across borders.

Unlike the Chips Acts or CADA, the road map is not a proposed law. In many cases, its measures are research projects or promises to introduce future legislation by the end of 2027.

Part 4: Open Source Strategy

European public administrations spend an estimated €264 billion per year on proprietary IT, with 80 percent going to American companies. In the past several years some European bodies have made sporadic moves toward open-source alternatives, perhaps most notably the French civil service’s migration from Windows to Linux.

Now, the European Commission has unveiled an expensive strategy to promote open source in the public sector. In theory, open source could at once save on costs, phase out non-European software, and benefit European open-source developers.

The Commission’s plan stretches beyond office software and operating systems. It envisions public services partaking in a “vibrant” open-source ecosystem for everything from AI to RISC-V semiconductors to Web 4.0 architecture. It plans to fund open-source startups and developers in key sectors.

Although this strategy is not in itself a law, CADA includes some open-source measures, like a provision to “encourage” public-sector bodies to use open-source cloud and AI. In theory, this could establish a precedent for governments to choose “open source first.”

Jordan Maris, EU Policy Analyst for the Open Source Initiative, is optimistic about the package. He particularly believes it could be a boon for maintainers of core software. “They will likely receive recognition and opportunities for funding,” he says. “My guess is it will predominantly serve individual developers but some community-led projects could also benefit.”

Maris also says it can benefit developers of crucial enterprise software like Collabora Online, Euro-Office, and Nextcloud. Other open-source advocates, however, argue that the open-source measures in CADA do not go far enough. In particular, since CADA’s articles “encourage” public-sector bodies to prioritize open source rather than “require” it, the public sector may instead let inertia take its course.

This package is not final. The Chips Act 2.0 and CADA will now proceed through further European lawmaking, involving the European Council and European Parliament, a process that inevitably changes the content.

There’s also pressure from U.S. tech firms and some of the EU’s own member states to water down some of the requirements, as already happened with some of the open-source measures.

Today, it’s quite possible to see individual atoms in photographs. It’s one of the great triumphs of imaging. What, then, of the inverse? Can you use a single atom to capture an image?

Single atoms are probably not replacing smartphone cameras soon, but an atom can be used to measure light. One research group at the Institute for Molecular Science in Okazaki, Japan, has now used this ability to develop what they call an “atom camera,” which can capture patterns of light far too small to see with standard optical microscopes.

More than a physics demonstration, the atom camera could also be an elegant way to see inside certain quantum computers. The atom camera’s creators are also building quantum computers that use neutral atoms as qubits.

“We expect the atom camera to serve as a valuable diagnostic tool for this effort in our laboratory, and in other similar efforts worldwide as well,” says Kenji Ohmori, a physicist at the Institute for Molecular Science.

Ohmori and colleagues published their work in Nature Communications on 29 May.

The quantum photographer’s guide

The key component of this atom camera is an optical tweezer, an instrument that traps particles by squeezing them with focused laser beams. The instrument has become a common tool of physicists who handle atoms. A tweezer can catch an atom, then move it around or hold it in place. The researchers chilled a rubidium-87 atom to near absolute zero and immobilized it inside an optical tweezer. The atom camera essentially measures how this atom responds to its environment. As light falls on an atom, it imparts energy onto some of the atom’s electrons. This shifts the energy states of those electrons.

By observing these shifts, the researchers could gauge either the light’s intensity or its polarization. They could measure these properties of their tweezer’s light, or they could measure a second pattern of light cast on the atom.

These patterns are much larger than a single atom, so how do you turn measurement into a full image? Because the atom must be kept still, you have to move the pattern itself across the atom. The researchers dragged a pattern 100 nanometers at a time—up, down, or to the side—and measured the intensity or the polarization of the light at each step.

In the end, they had a 2D map of measurements—which they could render into a nanoscale “photograph.” They photographed several different patterns using this method.

The Okazaki researchers aren’t the first to use atoms for measuring light. Since the 1990s, physicists have tried atoms to cheat the diffraction limit of visible light: the tiniest feature that typical optics can see. Atoms are significantly smaller than this, so an atom set up in the proper way could theoretically resolve even tinier details.

As cold-atom physics has grown more sophisticated, more labs have tried their hands (and optical tweezers) at making atoms fit for purpose. In 2022, two groups at the Institute of Photonic Sciences in Barcelona and at the University of California, Berkeley, separately used rubidium-87 atoms to capture the intensity of oncoming light. The Berkeley group reached a resolution of 300 nm, but they believed their work was only an initial step.

“We envisioned that the method could be made much more sensitive,” says Dan Stamper-Kurn, a physicist who was involved in the aforementioned work, but not the Okazaki group.

In its earlier work, the Berkeley group studied a relatively large shift in energy state. The Okazaki group instead measured a far subtler shift linked to what physicists call a hyperfine transition. This has several advantages. For one, the Okazaki group could measure its light’s polarization, in addition to its intensity. For another, the hyperfine transition is far more sensitive: In theory, the Okazaki group can render features as small as 25 nm. (Smaller than that, quantum uncertainty comes into play.)

The more precisely you know your atom’s position, the better your resolution. This is why the atom must be kept as still as possible.

Qubits calling for photographers

What could an “atom camera” capture? Quite a few things, actually, physicists say.

“There’s a lot of relevance to this, because these so-called optical tweezers are what we use in many experiments nowadays,” says Johannes Zeiher, a physicist at the Ludwig-Maximilians-Universität München in Germany, who was also not involved with the Okazaki group.

Optical tweezers are particularly prized in the world of neutral-atom quantum computers, like the Okazaki group are building. These quantum computers run on atoms such as rubidium-87 chilled to near absolute zero inside a vacuum chamber. Optical tweezers can trap the atoms, which act as qubits, and hold them or move them around. Computing with two neutral atoms might involve precisely positioning them and firing a laser to illuminate both.

Such a light beam is almost never uniform. Even a small beam can contain all manner of subtleties, especially quirks of polarization, which can interfere with a qubit and cause it to lose coherence and collapse. It’s crucial, then, for a qubit operator to understand the tiniest details of their light, but physicists today are still searching for a method to reliably do this.

Traditional optics often aren’t suitable for the task of seeing inside a quantum computer’s vacuum chamber, since they too can easily disturb qubits. The challenge becomes even more tedious as neutral-atom quantum computers gain more qubits and become more complex to control.

The physicists say that their creation, which can map both intensity and polarization at tiny scales, is an enticing alternative.

“Rather than bringing a camera from outside the vacuum chamber, why not use the tools already there inside our quantum playground in the vacuum?” says Takafumi Tomita, a physicist at the Institute for Molecular Science, and another of the authors.

This article appears in the August 2026 print issue as “Camera Takes Photos With a Single Atom.”

If simulations are to be believed, startup Tensordyne’s new AI chip could crush the performance of market leader Nvidia in terms of energy efficiency and latency for inferencing. The company just sent the plans for its first chip to be manufactured, with commercial sales of a 72-chip system scheduled for the second half of 2027. Tensordyne claims its 72-chip system can run large LLMs four times as fast using one-fifth the power compared to a 72-Nvidia GB300 system. However, real systems won’t be around to back these figures up until the end of the year.

The not-so-secret sauce behind the outsized efficiency of Tensordyne’s new chip, Napier, is how it does matrix multiplication, the main math of AI. It takes advantage of the fact that the logarithm of A times B equals the logarithm of A plus the logarithm of B.

“We’ve turned multipliers into adders,” explains Gilles Backhus, a Tensordyne founder and vice president of AI. Adders are smaller and more energy-efficient logic circuits than those that do multiplication, he says. So Napier can pack more compute into a smaller area and still save on power.

New kinds of numbers

That such a thing was possible has long been known, but there wasn’t a good way to use it, because converting back and forth between logarithmic numbers and the floating point numbers that describe neural networks took too much time and energy and introduced too many inaccuracies. Not anymore, according to Backhus.

“So far no one has figured out how to do the linear to logarithm and logarithm to linear conversion as we have,” he says. “And that’s actually the crux of that whole thing. Our engineers have figured out ways to do this very elegantly and very very accurately and cheaply on silicon.”

The importance of number formats hasn’t been lost on the AI industry. Speaking at IEEE Hot Chips in 2023, Nvidia chief scientist Bill Dally attributed the majority of the improvement in the company’s GPUs at the time to the use of shorter number formats and the smaller circuits they require.

Researchers have also worked on circuits to compute with alternative formats, such as the logarithm-like posit and more recently its scientific-computing counterpart the takum. However, these formats have not reached mainstream adoption mostly because their hardware implementation is so different from traditional floating point.

Inference Demands Influence Architecture

Market trends, including the rise of AI agents, mean inference—the execution of neural network models—is becoming more important than training new large language models (LLMs). Factors like the cost and the speed at which answers are delivered are starting to dominate, and that’s led AI companies to look for system architectures that are a better fit for that.

Tensordyne executives say they saw this coming and engineered their computers to meet it.

Tensordyne’s Napier AI chip includes 144 gigabytes of HBM, but the real power comes from its unusual math.Tensordyne

There are two main parts to executing an LLM: prefill and decode. In the prefill stage the model takes in the input text and turns it into tokens, the basic units it can work with, and builds a kind of working memory about the input, called the key-value cache. It’s a computationally heavy task.

Decode is where the LLM generates its output tokens, the answer or response to your input. Each new token is predicted using the previous token and the key-value cache. This sequential nature can make decode a slower process, and it’s more dependent on memory and network latency than computing power.

So AI chip makers are starting to build systems with those two different demands in mind. Nvidia is touting a system where a server rack full of B300 GPUs handles prefill and several racks of its Groq 3 processors do the decode. Amazon Web Services is combining a rack of its Trainium AI chips for prefill with several racks of Cerebras’s wafer-scale computers for decode.

Tensordyne says its system can handle both jobs. “We’re optimizing for two hard challenges here at the same time,” says R.K. Anand, chief product officer and co-founder of Tensordyne. “We’re the first company proving that you can do both without going to multiple vendors and multiple racks.”

The dense compute needed for prefill comes from the logarithmic math. The needs of decode come from 144-gigabytes of high-bandwidth memory and a custom 1-microsecond-latency network called Tensordyne Napier Link.

In a “pod” system that fits in one-quarter of a standard rack, Tensordyne packs in 72 Napier chips, 8 Intel Xeon CPUs, and 64 terabytes of solid-state storage. A four-pod rack working on a 2-trillion parameter LLM would deliver 1,300 tokens per-second per-user at a cost of US $11 for 1 million tokens, while consuming 120 kilowatts of power, the company claims, with one pod crunching out prefill and three working on decode. To get similar tokens per-second per-user numbers, a nine-rack Rubin and Groq 3 system would likely consume 1.5 megawatts, according to Tensordyne.

Whether or not these numbers really hold up will have to wait until later in the year. Tensordyne plans to have a beta version available through the cloud for customers to work with. It expects to begin shipping systems to customers about a year from now.

“Space computing, the final frontier, has arrived,” Nvidia CEO Jensen Huang declared at the Nvidia GTC conference in March.

Indeed, the idea of data centers in orbit has gone from science fiction to a serious spending category. Elon Musk’s SpaceX has acquired xAI (also Musk’s) and is planning a constellation of space-based data centers. Google, not to be outdone, announced Project Suncatcher in partnership with Planet, planning to launch two satellites equipped with Google Tensor Processing Unit (TPU) AI chips by early 2027. Startup Starcloud has already filed a proposal with the Federal Communications Commission for an 88,000-satellite constellation for orbital data centers. As Starcloud’s filing suggests, these companies are all proposing fleets of satellites numbering in the thousands, each housing a rack or multiple racks of AI-grade GPUs, interconnected with each other through free-space optical links and communicating back to Earth via microwave links, either directly or through other satellites.

Proponents tout the many wonders of computing in space: abundant solar energy, free cooling, and freedom from Earth-based disturbances like earthquakes, floods, and protesters. But a sober look at the physics of space-based computing paints a much more nuanced picture.

Free cooling is perhaps the biggest misconception. Space is cold, but it also has no atmosphere. That means the best heat-removal mechanisms, conduction and convection, are off the table. The only option is radiation. To prevent a chip from overheating in space, a large, costly surface area is required to dissipate the energy and then radiate it.

Solar energy is abundant, but collecting it with functional solar panels that maintain perfect alignment toward the sun is a complex task requiring extensive attitude control systems. On top of that, ionizing radiation in space from cosmic rays and other sources poses a unique challenge, degrading the solar panels, the radiative coolers, and the chips themselves. Because regular maintenance in space is difficult, redundancy has to be built in at launch, and cost estimates have to account for efficiency degradation over time.

At ABI Research, where I work as an aerospace analyst, we did a rough total-cost-of-ownership comparison between a data center on Earth and one in space. It showed that the cost to launch and run a GPU in space for a year is at least an order of magnitude higher than the same feat in a terrestrial data center. Our model was simple, assuming an Nvidia H100 server rack launched with the requisite-size solar panel and radiator on a spacecraft akin to Starcloud’s pilot launch. We assumed SpaceX’s Starship was used at a highly optimistic launch cost per kilogram of US $44, and a terrestrial energy cost of $0.20 per kilowatt hour. This is a simple back-of-the-envelope calculation, but it does signal something real.

From our perspective, the cost of delivery and space hardening of the payload makes general-purpose space-based data centers difficult to justify economically today, despite the fact that data-center builders in many regions are scrambling for electric power. However, there are niche applications where the much higher costs of computing in space could be justified. Examples include preprocessing data from Earth-observation satellites, real-time detection and tracking of hypersonic missiles, and active collision avoidance in the increasingly crowded low Earth orbit. Even for these, though, contending with fundamental physics will still be a demanding challenge. And a technologically compelling one, too.

The Cooling Challenge in Space

Cooling is where physics separates the science from the fiction. The governing equation for radiative cooling, the only type of cooling available in space, is known as the Stefan-Boltzmann Law. It states that the amount of power you can radiate is proportional to the area of the radiator times its temperature to the fourth power. For a space systems architect, the implications of this law are brutal. In orbit, the only variable we can control is area. This restriction creates a geometric penalty, or a “physics tax,” for cooling in space: The more power you need to reject, the bigger the area of the radiator you need to bring along from Earth.

The only cooling method available in space is radiation, and the radiator area required is derived using the Stephan-Boltzmann law. For a single chip drawing 700 watts, like Nvidia’s popular H100 GPU, the area required to keep it at 20 °C is just under 3 square meters, and it goes down to 1 square meter for an operating temperature of 85 °C. However, as the radiator surface is exposed to ionizing radiation, its emissivity decreases, and after 5 years in space the required area increases by about 40 percent.

To understand how big this baseline area is in practice, I used the Stefan-Boltzmann law to model the heat-rejection area needed to keep a single chip that draws 700 watts of power—such as the H100 GPU chip, an AI stalwart—at a constant 60 °C, usually considered the sweet spot for GPU longevity and stability. I further assumed that the radiator is perfectly facing deep space, at a chilly background temperature of 3 kelvins. By this calculation, a single chip would require 1.4 square meters of radiator surface.

To put this into perspective, consider that a common AI rack can hold approximately 32 GPUs (four H100 server boards). With CPUs, memory, and networking equipment, this rack would draw around 40 kilowatts of power. This single rack includes 2.5 terabytes of memory—enough capacity to serve over 20,000 concurrent users or run 16 simultaneous instances of Llama 3, an open-source AI model. But to cool this thermal load in a vacuum, that single rack would require an 80-square-meter radiator, roughly the size of a pickleball court. For an aggregate 100-megawatt data center, you’d need at least 2,500 of those radiators.

And that’s the best-case scenario. Additional problems are hidden in the low Earth orbit environment itself. Space exposes radiators and their coatings to a chemically hostile brew of ultraviolet light and atomic oxygen, quite the opposite of a clean-room environment. Over a LEO satellite’s typical 5-year lifespan, these elements degrade the radiator’s surface properties and lower its ability to shed heat.

Including this degradation in the model reveals that as the radiator degrades from a “fresh” state to an “end-of-life” state, the physics demands a further penalty. To maintain that same 60 °C operating temperature for the GPU chips, the required surface area jumps from about 1.4 square meters per chip to nearly 2.0 square meters. In other words, the physics tax rises by 40 percent. Therefore, you must launch at least 40 percent more radiator mass, endure higher atmospheric drag, and sacrifice valuable launch volume just to survive the degradation of the thermal coating. This increase adds significantly to the launch cost and further erodes the economics of a space-based data center.

The Silicon Challenge in Space

Solving the heat problem is only part of the battle. The other significant challenge in low Earth orbit is ionizing radiation, which affects the computing hardware itself. Today’s satellites typically use radiation-hardened processors, which are very reliable but also much more expensive, and they perform poorly compared to commercial off-the-shelf processors.

A standard rad-hard chip doesn’t have the processing power to run a modern large language model (LLM). As a result, satellite operators aspiring to launch a data center have no choice but to make a risky compromise: to use hardware meant for terrestrial use. In order to achieve the necessary compute density, orbital data centers must use the same Nvidia H100s or Google TPUs found in terrestrial server farms. The problem is that these chips are “soft” targets in space. High-energy particles can flip bits in memory or cause “latch-ups” in logic that fry the circuit.

Three big proposals for orbital data centers vary in satellite size, number, and cooling plans.

One possible option is to shield the computers from radiation with thick, absorbent panels. However, the shielding would add significantly to the already heavy satellites. The other option is to compensate for the radiation damage with redundancy. Indeed, edge computing architects are moving toward software-defined resilience, where instead of one perfectly hardened computer, operators fly a cluster of imperfect, commercial ones whose total cost could be as low as one-tenth to one-hundredth that of the rad-hard model.

This redundant approach is used in many spacecraft, including Artemis II, which recently carried astronauts around the moon, as well as SpaceX’s flight computers and the Hewlett Packard Enterprise edge servers for the International Space Station. By running three (or more) instances of the same calculation on three different nodes and comparing the answers, the system can detect a corrupted processor. If a node fails, the “orchestrator” reboots it while the others continue the mission. While this ensures resiliency, it also means that some fraction of the compute capacity is dedicated to redundancy, further increasing the costs.

The Energy Challenge in Space

An often-touted advantage of space-based data centers is the seemingly unlimited supply of free, clean energy from the sun. Solar energy in orbit is indeed abundant, at 1,361 watts per square meter. Of course, capturing that free energy is made possible only by the very costly launching of large solar panels into orbit. And those solar panels also degrade over time due to radiation exposure, typically losing 1 to 3 percent efficiency per year.

Let’s say a solar array collects 1 MW of power to run an AI cluster. The laws of physics demand that the satellite must eventually radiate 1 MW of waste heat. Because the square area needed to generate the solar power—around 400 W/m2—and to reject the heat—around 450 W/m2—are nearly equivalent, every square meter of power generation now demands approximately another square meter of cooling. The radiator needs to be a structural equal, not merely a passive coating on a surface used for something else.

As Elon Musk recently noted in Davos, the most efficient radiator is one that never sees the sun. By orienting the spacecraft so the solar panels face the sun and the radiators face the deep vacuum of space, efficiency skyrockets for both. But there’s a catch: Maintaining this perfect three-way alignment—panels to sun, radiator to the void, antennas to Earth—requires complex, high-torque attitude control systems. So this configuration means more payload and more computing power. Plus, these control systems are complex components with many failure modes, which is not optimal in a situation where maintenance is difficult.

The Killer Apps for Computing in Space

Given all these challenges of deploying massive radiators for satellites in the hostile environment of space, why build data centers in space at all?

While training or inference on LLMs in space doesn’t seem economical today, there are other, very compelling applications for computing in space. Here are two: solving the downlink bottleneck from Earth-observation satellites and enabling collision-preventing maneuvers in the increasingly crowded low Earth orbit.

The latest Earth-observation satellites, equipped with hyperspectral and synthetic aperture radar sensors, are used for a range of important reconnaissance missions, such as battlefield intelligence, tracking the global shadow fleet of ships carrying contraband, and assessing earthquakes or infrastructure failures down to the millimeter. These systems can generate hundreds of terabytes of raw data per day that must be transmitted to Earth. However, the radio-frequency “pipes” used to downlink the data are congested, and the ground infrastructure cannot absorb the sheer volume of raw data.

Another immediate, mission-critical application for in-space computation is protecting the orbital environment. With over 17,000 satellites in orbit, the overwhelming majority of which are in low Earth orbit, avoiding collisions between these satellites is crucial. As NASA astrophysicist Donald Kessler pointed out back in 1978, a single space collision could cause a cascading effect that renders the entirety of LEO unusable.

RELATED: Have We Reached a Space-Junk Tipping Point?

According to SpaceX’s recent annual report, the Starlink constellation executes a collision avoidance maneuver every 2 minutes on average. Each maneuver already relies on onboard AI systems but still requires most of the processing to happen on the ground.

As low Earth orbit gets increasingly populated, collision avoidance will have to break the traditional ground-loop model. In the megaconstellation era of space, the OODA (observe, orient, decide, act) loop must happen onboard, thereby reducing the analysis turnaround from minutes to milliseconds.

The problem is that the flight computers standard on satellites are not built for this level of processing. The complex probability models required for maneuvering cannot currently be implemented by onboard computers in conjunction with their navigation systems. Clearly, more powerful computers are needed.

This is the true economic justification for moving compute to space: to move insight generation there. By placing high-performance computing adjacent to the sensors, we can process terabytes of data in orbit and downlink only the relevant data in real time, and we can do the computations necessary to avoid satellite collisions in real time.

The Future of Computing in Space

So, assuming that some form of computing is inevitable in low Earth orbit in the foreseeable future, how will the heat be handled? The industry is currently experimenting with two main classes of solutions to cope with the Stefan-Boltzmann law.

One creative option is to use origami-inspired radiators, the kind used for the James Webb telescope. Companies are developing flexible, high-conductivity composite radiators that fold into a tight cube for launch and unfurl into enormous yet lightweight thermal wings in orbit.

Another possibility is to use liquid-droplet radiators. This concept proposes removing the rigid radiator structure completely and instead spraying a stream of coolant oil directly into the vacuum of space. The fluid travels through an open loop, exposed to the near-absolute zero of the void, maximizing radiative surface area before being caught by a collector and pumped back into the ship. It sounds like science fiction, but as the heat loads climb into the megawatts, liquid-droplet cooling may be the only way to cheat the mass limits of this exponential reality.

Options for Future Radiator Design

Our rough total-cost-of-ownership model uses optimistic versions of current numbers, such as launch cost, chip cost, and power use. A critic might point out that future technology will improve, both in efficiency, purpose-built designs, and costs.

Sure, the technology is bound to improve. But the critical factor isn’t just launch cost; it’s the computing power per unit mass and electric-power economics. Radiators and solar arrays can consume 65 to 70 percent of total satellite mass, and space-grade photovoltaics run orders of magnitude more expensive than terrestrial equivalents.

Chris Philpot

Even as launch costs fall, the mass and cost burden of power generation and thermal management will remain a fundamental problem.

Current space-grade solar panels rely on germanium substrates, whose supply is concentrated in China. It will be extremely difficult to scale up availability of these substrates. A transition to radiation-tolerant perovskite solar panels or a similar alternative could change the economics significantly, but that possibility is five years away or more. The technology will get cheaper, but the bottlenecks of power and thermal architecture will remain.

Recognizing the thermal reality of cooling in space forces us to shift how we view satellite operations. We are moving away from the “launch and forget” era toward an era of “autonomous logistics.” As our thermal model demonstrated, the harsh environment of space steadily attacks the hardware. UV radiation degrades thermal coatings; cosmic rays degrade silicon. In a traditional satellite model, when the radiator degrades or the memory fails, the satellite becomes space junk. For a multimillion-dollar data center, that disposal model is potentially ruinous.

To make the economics of orbital computation work, the infrastructure must be serviceable and the rockets to launch them reusable. The orbital domain will require automated servicing vehicles capable of swapping out degraded radiator panels and upgrading fried servers. In these ways, the future of the orbital data centers is dependent on the innovations of an emergent in-space economy.

There’s a good argument to be made that the need for space-based computation is less of a hype cycle and more of an enabler for the new space economy. Look no further than SpaceX’s recent regulatory filings proposing a constellation of up to a million satellites in low Earth orbit. At such a scale, routing all raw data back to Earth is physically impossible; the network itself must become the data center.

However, the winners in this sector will be determined by the systems architects who most cleverly accommodate the thermodynamics and the companies with sufficient vertical integration to take on the massive costs of operating data centers in orbit. Ultimately, the physics tax is universal. Whether managing heat rejection in the vacuum of low Earth orbit or managing power density in a hyperscale facility in Northern Virginia, the constraint is never the silicon. It’s the thermodynamics.

OpenAI’s fourth large language model (LLM), GPT-4, took an estimated 50 gigawatt-hours to train, or the equivalent of 5,000 American homes’ yearly power consumption. That was in 2023. Since then, the computational resources used to train frontier LLMs have only increased, though direct power usage numbers are hard to come by.

Now, a research group at the University of Twente in the Netherlands has shown that you can save up to 14 percent of the energy used in LLM training without sacrificing speed by cleverly adjusting the clock frequency of the GPU during computation. Jeffrey Spaan, Ph.D. candidate at University of Twente and lead author on the article, presented the results at the Computing Frontiers conference in Catania, Sicily, last month.

“My research is about finding computing waste,” Spaan says. “It’s similar to underutilization of the hardware, but instead of optimizing the software for the hardware, we try to optimize the hardware for the software.”

Making the GPU tick

Spaan and his collaborators accomplished this by using a technique known as dynamic voltage and frequency scaling (DVFS). Every chip—including the GPUs commonly used for training frontier models—uses at least one clock to orchestrate computations. Each operation in the chip is triggered by a clock pulse. The frequency with which that clock ticks controls how fast the chip operates and how much power it draws.

Modern GPUs have two clocks, one for the computational core and one for the memory. When the core is hard at work crunching numbers, the clock frequency is kept high to ensure speedy calculation. However, with DVFS, the memory clock can slow down in that time, allowing for less power draw. In principle, it’s possible to just turn off the memory part of the chip, but GPUs designs don’t enable software control for that off switch, and it would take too long to turn back on mid-calculation anyway. Similarly, when the core is waiting for data to be loaded from memory, the core clocking frequency can be slowed to a crawl while the memory clock frequency ramps up.

DVFS has been a well-known technique that goes back to at least the 1990s. But Spaan says other researchers haven’t been able to usefully apply it to LLM training because their methods either slowed down calculations too much or were not fine-grained enough to improve energy usage.

Previous DVFS attempts adjusted the frequency at each iteration of the training process. In LLM training, each iteration consists of two parts: the forward pass, in which data is run forward through the layers of the model with the weights as they are; and backpropagation, in which the weights are adjusted layer by layer based on the results of the forward pass. So prior work kept one value of the frequency for the forward pass and adjusted to another for backpropagation.

Spaan and coworkers tuned the clock frequencies on a shorter timescale. GPU workloads are broken down into tiny computational nuggets known as kernels. For example, a single vector-vector multiplication can make up a single kernel. The kernels are fed to the GPU to be processed many times in parallel. In Spaan’s implementation, the computation of a single layer of a deep neural network is broken up into approximately 40 kernels. By adjusting the clocking frequencies on a per-kernel level, the team was able to find much greater energy savings.

The GPU also does DVFS automatically when the chip’s internal systems detect higher or lower demand, Spaan notes. “Some people might therefore think: We’ll just let the GPU handle it,” he says. “However, because the GPU doesn’t have the foresight we have of what kernels will run, it has to work with an on-the-fly best-effort guess and can therefore never attain the same savings.” That’s where the manual adjustments come in.

Less energy, same time

The team performed their experiment by training GPT-3-XL, a 1.3 billion parameter model, on an Nvidia RTX 3080 Ti GPU. To save time, they focused on training a single layer of the model. In this setting, they found a set of frequency adjustments that gave them 14 percent energy savings while slowing the training time by only 0.6 percent. Performance of the model depends on both computing speed and energy usage.

There is one challenge: Ramping down the clock frequency is much faster than turning a core off and on, but it’s still not instantaneous. In their experiment, the researchers evaluated one kernel at a time, not taking into account the frequency switching speed. So 14 percent energy savings is a best-case scenario. How much of an issue it would be in practice, Spaan says, depends heavily on the GPU being used. Newer hardware, like the Blackwell GPUs, have much faster switching speeds than older versions and should be able to harness the full energy savings.

Now, the team is developing a tool that would be able to implement optimal frequency scaling automatically for a particular workload. Spaan hopes their method will be attractive enough to industry leaders to merit adoption. “We optimize for saving energy without losing performance,” Spaan says. “In the real world, performance is the holy grail.”

Modern operating systems are packed with defenses against security vulnerabilities. But what if those defenses could be removed? Doing so would offer a clear view of the chip running the OS. It would also expose hardware vulnerabilities the OS normally obscures.

A new hand-coded OS, Fractal, provides that clear view. Built from scratch by researchers at MIT’s Computer Science and Artificial Intelligence Laboratory (CSAIL), Fractal is designed to probe the architecture of the chip that runs it. To prove that point, the OS, presented in May at the 2026 IEEE Symposium on Security and Privacy in San Francisco, was used to uncover a previously unknown vulnerability in Apple’s M1 chip.

Joseph Ravichandran, the CSAIL Ph.D. student who programmed Fractal, says the OS was inspired by obstacles faced while researching Pacman, an Arm CPU vulnerability disclosed in 2022.

“We paved the way with techniques such as custom kernel patches and kernel extensions,” Ravichandran explains—but these were only a partial solution. “The dream was always to have a completely custom operating system which would make these hacks unnecessary.”

Probing Chip Data Storage & Movement

Researchers exploring hardware vulnerabilities need to know exactly how data is stored and moved across a chip. They deduce this by coding tests that provoke desired behavior from a chip and then analyzing the results to reconstruct how the chip executed the code.

However, a conventional OS like Windows or MacOS will have defenses and features that obfuscate code execution and memory management. “I’ve built a number of lab exercises for our secure hardware design course,” Ravichandran says. “Seeing the struggles that students go through, and living those struggles myself in my research, I realized there just has to be a better way.”

Fractal is the obvious solution to the problem. Instead of patching or exploiting a conventional OS, Fractal entirely replaces a device’s original OS with a customized alternative focused on security research.

As you might expect, however, coding an OS is no small feat. Fractal was coded from scratch with a combination of programming languages including assembly, C, and C++. Ravichandran began work in June 2024 and finished the first version of the OS at the end of that year, after which it went through months of testing. Debugging was the most difficult step, as building a custom OS for hardware not designed to support it eliminated debugging tools from the equation.

“When getting Fractal to run on Apple Silicon, for the longest time the only output I had was the power light on the front of the machine,” Ravichandran says. “This light told me whether my code was running, and the light stayed on; or if the machine had crashed for some reason, and the light turned off.”

Fractal OS Features for Security Research

Fractal provides researchers with three key features.

The first, headline feature is multi-privilege concurrency. On a conventional OS, comparing a chip’s behavior across privilege levels—which control a program’s access to system resources—is extremely difficult. Switching levels also shifts the memory layout, the CPU’s branch-predictor state, and more, all of which adds variables that skew test results. Fractal can run a test concurrently across privilege levels while holding other parameters identical, which leads to a much cleaner test result.

The second feature is cooperative multitasking, an alternative to a conventional OS feature called preemptive multitasking. Preemptive multitasking is an important feature for a modern OS, as it’s used to juggle the dozens or hundreds of tasks which might be active at once—but it can also pause a test if the OS decides another task matters more, which adds noise to the test result. Fractal’s cooperative multitasking, when enabled, allows a user to dictate the order in which code executes with no interruptions.

The final feature is Fractal’s memory system, called gmap. In a conventional OS, a program reaches memory through virtual addresses that the OS maps to real hardware. This mapping can change between tests. Gmap instead mirrors memory locations across threads and tasks, eliminating yet another variable.

The common threads across these features are control and clarity. “Fractal’s aim is to tell you simply what the hardware does as accurately as possible,” Ravichandran says. “Using the information learned from Fractal, researchers will be better equipped to understand how the hardware itself behaves independent of the OS.”

Discovering Phantom Speculation on M1

To show what Fractal could do, Ravichandran aimed it at Apple’s M1, a victim chosen primarily because it was the hardware on hand.

Fractal made it possible to find the first evidence that Apple Silicon is affected by a form of Phantom speculation, which in some cases can let an attacker momentarily direct a chip down a path an attacker chose. Phantom was known to be present in Advanced Micro Devices (AMD) and Intel hardware but was never proven to be present in Apple’s M1—until now.

The practical effect of the vulnerability is likely limited. Fractal found that while Phantom fetches can occur on Apple’s M1, the instructions are never executed. Ravichandran declined to speculate on how the vulnerability might be used in the wild and said that the vulnerability was disclosed to Apple.

Though primarily tested on a Mac Mini equipped with Apple’s M1, Fractal also runs on many Intel and AMD PCs, Raspberry Pis, and some more recent Apple Silicon devices like the Mac Mini with Apple M4. Fractal is freely available to download as an open source OS under the MIT license. Ravichandran has posted the kernel to Github and the full experimental setup on Zenodo, with additional details available on Fractal’s website.

Ravichandran is eager to see how other researchers make use of Fractal to explore other microarchitectures. “Right now, my goal is to get this system out into the world so other researchers can benefit from it,” he says. “My hope is that Fractal becomes a community project with contributions from other research labs who benefit from this approach.”

At Computex 2026, an annual computer trade show held in Taipei, Taiwan, Nvidia made a long anticipated announcement—a version of the company’s Blackwell GB10 superchip for Windows PCs, called RTX Spark. Originally rumored to launch in 2025, it was finally introduced at this year’s show.

It came with full support from Microsoft, which announced two new devices powered by RTX Spark: the Surface Laptop Ultra and the Surface RTX Spark Dev Box. Asus, Dell, Lenovo, HP, and MSI also announced Windows PCs with RTX Spark.

If this is triggering déjà vu, that’s for good reason. In June 2024, Qualcomm and Microsoft partnered to launch AI-focused Copilot+ PCs. Qualcomm’s Arm-based chips provided an alternative to x86-based chips from AMD and Intel used across dozens of budget and mid-range Windows laptops. It was met with mixed commercial success, however, and Intel remains the dominant supplier of chips for Windows laptops. But that doesn’t mean RTX Spark will follow the same path, as Nvidia’s involvement is an important part of the equation.

“Nvidia just has more clout and more industry weight to push and make things happen that Qualcomm couldn’t do early on, and that even Microsoft struggled with,” says Ryan Shrout, president at Signal65, a third-party testing firm. “They can get game developers on board and get software developers in the emerging AI space to pay attention.”

What is RTX Spark?

At its core, RTX Spark is an iteration of the hardware found in the DGX Spark mini-workstation, which was released in late 2025. Officially badged N1X, the silicon is Nvidia’s Blackwell GB10 “superchip,” a system-on-a-chip with 20 Arm CPU cores; 6,144 GPU cores; and support for up to 128 gigabytes of LPDDR5X memory.

There are some small differences between the mini-workstation and PC system, and the most significant is power consumption. The DGX Spark was designed for GB10 to operate with a power consumption up to 140 watts without overheating. RTX Spark laptops are likely to use less power, which may lower performance, though the details will depend on each PC maker’s particular implementation and remain to be seen.

RTX Spark will also include a neural processing unit (NPU) that qualifies the system for Microsoft’s Copilot+ certification. The NPU is used for some background AI features, like Windows Recall. However, the GPU will remain in the driver’s seat for active AI tasks, including large language models (LLMs) and image generation.

Though RTX Spark laptops took the spotlight, the news is also relevant to desktop workstations. Currently, DGX Spark ships with a custom version of Linux called DGX OS, not Windows. Nvidia says RTX Spark desktops with Windows are coming in the third quarter of 2026. Windows is also coming to Nvidia’s DGX Station, the full-sized desktop iteration of Nvidia’s hardware.

The launch of RTX Spark is, of course, in part an AI play, and that is taking the lion’s share of attention. But Anshel Sag, principal analyst at Moor Insights & Strategy, thinks Spark is just as relevant for professional work and gaming. “I think the AI play is mostly to appease investors,” he says. “Creators and gamers are also excited about RTX Spark, and someone like me who does all three is even more excited, because having a machine that can do all three well has been a challenge.”

Nvidia’s advantage may lie in software

Though Nvidia refers to the GB10 as a “superchip,” it’s similar to other high-performance system-on-a-chip designs, such as Apple’s M-series silicon and AMD’s Ryzen AI Max. All three include a CPU, GPU, and NPU. All three support large amounts of DRAM. And all three have a unified memory architecture (meaning the system memory is a shared resource accessible to the CPU, GPU, and NPU).

The existing DGX Spark also provides a baseline for performance expectations. RTX Spark will likely deliver GPU performance similar to an RTX 5070 mobile GPU which, if correct, would put it ahead of Apple and AMD’s competing systems. On the other hand, GB10’s CPU cores aren’t as quick as the CPU cores found in leading competitors.

Nvidia’s biggest edge might stem not from hardware performance, but from software. The company’s GPUs are essentially the industry standard across gaming and professional work, with estimates placing Nvidia’s GPU market share above 90 percent. That in turn has made Nvidia the target for most software that benefits from a GPU.

“Nobody doubts that Nvidia is the leader in GPU capability and the software stack around it,” says Shrout. Sag agrees, explaining that Nvidia has the advantage of “extremely mature drivers.”

Microsoft touts AI, but Windows on Arm remains a question

Nvidia announced RTX Spark was in lockstep with Microsoft, which held its Build developer conference in San Francisco while Computex was taking place across the Pacific in Taipei.

Repeating the Copilot+ PC launch, Microsoft’s vision of Windows on the RTX Spark leans heavily on AI. But unlike Copilot+ PCs—which used the NPU to accelerate AI features integrated into the Windows user experience, such as quickly recalling anything you’ve opened or translating live video calls—the pitch for Windows running on RTX Spark seems more focused on using the Spark’s GPU to accelerate LLMs.

Microsoft announced an “early preview” of Windows SDK called Microsoft Execution Containers (MXC), which sandboxes AI agents, allowing them to work autonomously while isolating them from functions the user doesn’t want the agent to access.

Still, the real test for both Nvidia and Microsoft remains the same challenge Microsoft and Qualcomm faced: establishing Windows on Arm PCs as an alternative to Windows PCs powered by x86 chips from Intel and AMD. Whether RTX Spark will succeed in this remains to be seen.

“Even with all of the talk from Nvidia and Microsoft about the future of the PC and revolutionizing the PC, everybody understands that it needs to be a great general-purpose PC first,” says Shrout.

Uncle Sam wants you to solve big scientific and engineering bottlenecks outside the hallowed walls of academia. On 14 May, the U.S. National Science Foundation (NSF) issued a solicitation inviting what it calls “X-Labs,” or independent research organizations, to apply for a total of US $1.5 billion over 10 years. The structure of the X-labs solicitation is new for the United States government and closely matches an emerging private funding model for what are known as focused-research organizations (FROs), which various think tanks and philanthropies have proposed and tested during the last six years.

A focused-research organization is a team of scientists, engineers, and other technology developers that works on a well-defined problem with a target duration of three to seven years and on a budget in the tens of millions of dollars. Some examples have sought to build an ultrasound-based brain-computer interface, quantify marine CO₂ removal, and improve formal verification in mathematics. The funding for these FROs required a team approach to science larger and more agile than a typical academic lab but with a more academic appetite for scientific risk than a commercial venture might have. In some ways, they echo work done by the Defense Advance Research Projects Agency (DARPA), which is known for helping bridge high-risk research and early-stage commercialization of many technologies.

“The NSF’s X-Labs announcement is a welcome signal that the global research community is serious about finding new ways to fund ambitious, high-risk science,” says Pippy James, deputy CEO of the Advanced Research + Invention Agency (ARIA), a United Kingdom government funding body in London that uses a similar model to the X-Labs.

The NSF’s first two X-Lab research areas are scientific instrumentation for sensing and imaging and interconnects and integrated photonics for quantum systems, and the solicitation says the agency will announce additional topics within weeks.

The funding is structured in phases, with $1.5 million per project in the first year, then up to $50 million per project over the next two to three years for selected projects, with a third, more open-ended phase after that. That first-year funding is more than seven times as much as for the typical NSF project of around $200,000.

“Compared to incremental, project-based grants, larger institutional grants and longer-horizon grants let teams take on harder, more infrastructure-heavy problems with the agility to pivot as they learn,” says Jenn Gustetic, director of metascience and R&D policy at the Institute for Progress (IFP), a Washington, D.C. think tank that made a proposal last year for how the U.S. government could support more independent research organizations.

The NSF solicitation also requires applicants to demonstrate “substantial” independence from any non-X-Lab institutions such as a university or company, which the NSF defined in part to mean the ability to make decisions on research direction, partnerships, and staff in days rather than weeks. It would be difficult for a full-time researcher at a university to qualify, for example, which opens the door to industry researchers or academics willing to take extended leave.

What should new money for science look like?

“People have been kind of wanting to do [focused research organizations] in a fairly bipartisan way since 2020,” says Adam Marblestone, an early proponent who now directs Convergent Research, a Cambridge, Mass., nonprofit that has spent almost $400 million building a dozen FROs. Some larger goal-directed, rather than principal-investigator-centered, funding has existed for decades in other federal agencies in the form of the Advanced Research Projects Agencies for defense, intelligence, energy, and most recently health. ARPA program managers often took a more hands-on and flexible approach than typical three-year National Institutes of Health (NIH) or NSF grant managers could. On 2 June, the IFP published an Atlas of Innovation comparing many different research funding structures.

The NSF announcement comes against a backdrop of administration requests for dramatic cuts to the agency’s budget, though Congress has generally appropriated stable amounts. NSF has, however, not disbursed all its appropriated funding, because the Trump administration has been feuding with many universities, accusing them of discrimination, and suing them. Most recently, NSF stopped new funding for several prominent universities, Nature reported. MIT’s president in May said that the university has won 10 percent less federal money than the previous year.

The big-ticket nature of the X-labs might make administrators and principal investigators at those universities worry about whether it will impact their own funding. “I don’t think it’s a zero-sum game,” says Erica Goldman, director of policy entrepreneurship at the Federation of American Scientists, a Washington, D.C. science-policy think tank, “but the way the timing of the announcements have come out and the rhetoric out there make it very hard to see that.”

“NSF X-Labs is structured to complement the existing system, not displace it—adding an independent institutional type alongside universities, national labs, small businesses and corporate R&D,” the IFP’s Gustetic says. The X-Labs annual sticker price represents less than 2 percent of the agency’s overall budget of $8.75 billion in 2026.

The emerging field of metascience, which investigates how best to do science, has been debating how governments should build the proper pipelines for converting blue-sky research into returns for all taxpayers. Metascientists differ over how FROs should fit into the research system. Some argue that governments can’t expect to apply the vaunted DARPA model to everything. Others write that FROs are a great idea and that the federal government already has a version of them in the form of the Department of Energy’s National Labs, which have spun off science platforms such as the Human Genome Project and the Protein Data Bank.

NSF media affairs head Mike England told IEEE Spectrum that “X-labs creates space and provides funding for new institutions to achieve breakthroughs in scientific discovery, research, and translation, and ultimately helps create new platform technologies.” In addition, on 27 May NSF requested information for a new funding idea adjacent to X-Labs it calls Tech Accelerators. These would use NSF money and accelerator expertise to fund and guide “deep-tech” commercialization efforts in agriculture, materials, ocean, and scientific instrumentation.

Other elements of government are also exploring how to incorporate the FRO funding model. In December 2025, U.S. Representative Josh Harder (D-Calif.) introduced a bill that would apply the X-labs model to the NIH. England says that NSF is having conversations with other government agencies about the model and welcomes more agencies to explore it.

“We don’t have great evidence comparing how different funding mechanisms perform—individual project grants, milestone-based contracts, prize challenges, etc.” Gustetic says. “X-Labs is a chance to actually learn something about which institutional designs work for which kinds of problems.”

Universities will likely have to adapt to the new model. Mid-career academics may well want to take time away from their university homes to participate in an X-Lab or other FRO project, says Monica Dus, director of the Office of National Laboratories at the University of Michigan and a holder of NSF grants. Institutions will need to figure out how to cover teaching duties in their absence and how to assess commercial experience for tenure or other internal promotions. “Universities should adapt to make sure the research does really reach the people it is meant for,” she says.

Academics may also need to change their approach to succeed, Convergent’s Marblestone says. “When we go to academics at Convergent, it takes a few conversations to plan it, because they don’t always know how they’d manage $50 million and a professional engineering team. You really need a CEO.”

Quantum computers promise to one day solve problems beyond the most powerful supercomputers imaginable. But it’s often underappreciated how much classical computing it takes just to operate these machines. As qubit counts rise, innovations in this supporting infrastructure will be essential if they’re to live up to their promise.

To prepare for the scale of quantum computers the industry is working toward, many companies are also gearing up the classical hardware, and software, required to support them. In April, Nvidia announced new AI-based software to accelerate the classical tasks that enable quantum computers. Sydney-based quantum software company Q-CTRL has developed an automatic calibration algorithm for quantum computers, and is now leveraging Nvidia’s agent-based system. Other companies, including IBM Quantum, Cambridge, England–based Riverlane, which develops quantum-error correction, and Google Quantum AI, are developing similar tools.

The Role of Classical in Quantum

Digital computer chips are marvels of engineering, operating flawlessly out of the box and capable of trillions of operations without error. The quantum bits, or qubits, at the heart of a quantum computer, by contrast, are temperamental and unreliable, requiring regular calibration and complex error-correcting schemes to keep them on track.

Calibration and error-correction are fundamentally classical, not quantum, problems, and they require dedicated classical hardware to solve. As quantum computers get bigger, the scale of those resources will need to rise in lockstep. That means that for the foreseeable future, quantum computers are going to be hybrid devices with a healthy dose of classical computing on the side.

“The cheapest and fastest way to execute most computer programs is to run them on a classical computer—even if a quantum computer is available,” says Adam Zalcman, a quantum software engineer at Google Quantum AI. “This is true of most of the information processing involved in running a quantum computer itself.... Therefore, I expect that every practical and efficient quantum-computer architecture will incorporate fast classical devices.”

Tuning Quantum Hardware

While the transistor has cemented its place as the foundational component of classical chips, the qubits at the heart of a quantum computer come in many flavors—superconducting circuits, trapped ions, neutral atoms, even individual photons. Using them for computation requires a painstaking calibration process to turn the “bare metal” of the underlying hardware into a qubit that can be controlled to run quantum circuits, says Jay Guilmart, lead product manager at Q-CTRL.

Calibration has two stages. The first, known as “bring up,” determines the frequency at which each qubit resonates, how long it holds its quantum state, its sensitivity to control pulses, and the strength of its interactions with neighboring qubits. All of these factors determine its error propensity and response to control signals.

Done by hand, the process still requires someone with a Ph.D. and can take days or even weeks, says Guilmart. This isn’t a scalable solution and so there’s a growing drive to automate the process. This is challenging because every step relies on results from the previous step. So rather than relying on a predefined script, Q-CTRL has therefore built intelligent calibration software that examines the result of each measurement, diagnoses failures, and adjusts the approach before retrying.

“After each step, we analyze that data and we say, are we okay to proceed to the next step? Do we have to go back to the previous step? Do we have to re-recreate this step?” says Guilmart.

Calibration is also not a one-and-done process: key parameters drift over time, gradually degrading performance. Q-CTRL’s software performs “runtime recalibration” to nudge things back into place, but there’s a limit to how much on-the-fly adjustment is practical.

“If I’m running a recalibration, I’m not running a circuit,” he says. “Even though I’m maintaining some high system state and high fidelities, if it takes all of my uptime it’s worthless.”

Decoding Errors in Real Time

Even a well-calibrated quantum computer remains fault-prone, which is why companies are investing heavily in quantum error correction (QEC). This typically involves encoding quantum information across large numbers of physical qubits in their shared state—a “logical qubit“—so that errors in individual qubits can be detected and compensated for without destroying the encoded information.

Because measuring a qubit directly collapses its quantum state, errors are detected via parity checks, which query whether pairs of qubits share the same state. This produces a series of measurements known as a “syndrome,” which classical algorithms called decoders analyze to locate errors.

The process must happen extremely quickly. While many errors can be logged and corrected mathematically after an operation, some must be fixed immediately before the algorithm can proceed. Superconducting and silicon spin qubits can hold their quantum states only for microseconds or milliseconds, so errors must be decoded and corrected within that window.

These tight requirements mean decoders typically run on specialized silicon like field-programmable gate arrays (FPGAs) or application-specific integrated circuits (ASICs) optimized for speed, says Jerry Chow, CTO of quantum-centric supercomputing at IBM. “You need to be able to keep up and you need to be able to effectively decode on the fly,” he says. “The best way to do that is through very tightly integrated FPGA or ASIC decoder capabilities.”

To AI or Not to AI

There is growing interest in using AI to simplify quantum hardware control. In April, Nvidia released two models targeting calibration and decoding. The first uses a vision-language model to analyze calibration-measurement outputs—typically plotted as graphs—and passes that evaluation to an AI agent that decides how to tweak the processor. The second uses a convolutional neural network to identify the simpler, localized errors that make up the bulk of faults. More complex errors are passed to a traditional algorithmic decoder, but the first pass reduces computational load enough to deliver a 2x speedup.

The attraction of AI for decoding, says Sam Stanwyck, director of quantum product at Nvidia, is that while models are time-consuming to train, they are extremely fast at inference—and thanks to parallelization across many chips, that speed holds even as qubit counts grow.

But offloading to a GPU still introduces significant latency, says Marco Ghibaudi, vice president of engineering at Riverlane. “You can have a really fat pipe, but it’s really long,” he says. “Our job [approach] has always been to try to remove as many unnecessary steps and shorten the pipe, and then make every section of the pipe as fast as possible.”

IBM’s Chow agrees that GPU latency currently makes them infeasible for real-time decoding. He’s also cautious about AI for calibration, given its computational expense. The approach holds promise for understanding the physics of novel architectures or new kinds of circuits. But for well-characterized devices where you’re simply looking for small deviations, simpler physics-informed techniques can be considerably cheaper.

The two approaches aren’t mutually exclusive, however, says Google’s Zalcman. Neural networks excel at discovering hidden patterns in syndrome data that help identify complex errors algorithmic decoders sometimes miss. Google is therefore developing a hardware architecture that can incorporate both traditional and AI-based decoders, including its AlphaQubit 2 model.

In the long run, Andi Gu, a Harvard Ph.D. student working on AI decoders, thinks “the bitter lesson” will come for decoding. This refers to AI pioneer Richard Sutton’s argument that general-purpose learning methods consistently outperform handcrafted algorithms over time. “If you make the model large enough and you throw enough training data at it, it will learn to capture the hidden correlations better than any other handwritten algorithm,” says Gu.

Latency remains a barrier, but his group is researching ways to make AI decoders more efficient and smaller so that they can fit on an FPGA, cutting response times. This can degrade accuracy though, so finding the right balance is still a work in progress.

Regardless of which approach wins out, one thing is certain—future quantum computers will require massive classical support. Decoding is a continuous, computationally expensive process whatever technique you use, says Gu, so you will need a “healthy chunk” of classical hardware dedicated to that task.

Calibration compute overheads will similarly “blow up” as devices scale to thousands or millions of qubits, says Q-CTRL’s Guilmart. Current techniques are unlikely to scale, he adds, so new approaches will be needed. “We’re going to have to rearchitect and do things differently when we get to even 1,000 qubits,” he says. “So no one’s winning the battle today.”

Memory is arguably the most serious constraint on modern AI large language models (LLMs). According to one influential paper, LLM token generation is an inherently memory-bound task, meaning the rate at which models output text is limited by how quickly data can be read in from memory. The severity of this bottleneck grows with model size. This creates a “memory wall” that holds back LLM inference performance.

AI hardware startup Majestic Labs is taking a direct—and comprehensive—approach to solving this problem. It’s developing a new AI server, Prometheus, with up to 128 terabytes of memory. That’s over 60 times more than Nvidia’s DGX B300 server, a cutting-edge AI processing rack.

Sha Rabii, co-founder and president of Majestic Labs, believes that this drastic increase in memory will provide his company an edge. While he acknowledges that “Nvidia’s done a phenomenal job creating a system that can scale out,” he argues that it becomes less economical as models grow and “ends up greatly over-provisioning on compute and starving on memory.”

DRAM-Centric Architecture for LLM Memory

Majestic Labs plans to surmount the “memory wall” with an architecture that fundamentally differs from competitors’.

Nvidia’s current servers have fast high-bandwidth memory (HBM), which is typically used to read in an LLM’s model weights. In addition, there’s an often larger but slower pool of dynamic random access memory (DRAM), which handles LLM and server overhead. Majestic instead goes all in on DRAM (specifically LPDDR6) in a unified architecture.

Rabii says that most memory interfaces are designed to operate over a short physical distance—sometimes only a few millimeters. That limits how much memory can be placed. “You get this shoreline at the compute die where you can put your HBM. If you wanted to put more, you can’t,” Rabii explains.

To solve that, Majestic uses a proprietary memory interface constructed from miniature copper cables that’s effective up to a meter. This is paired with custom memory aggregation chips that sit physically next to memory modules and coordinate memory across the server.

“It’s an endpoint for that high-speed interface and fans out to many, many commodity DRAM chips,” explains Rabii. In addition to addressing large pools of memory, Majestic says this design offers memory bandwidth up to 25.6 terabytes per second.

Ignite AI Processor for LLM Acceleration

More memory is good, but it needs to be paired with AI acceleration, something akin to Nvidia’s GPU. Majestic’s solution to this is Ignite, a custom AI processing unit that serves as the server’s compute engine. The Prometheus server contains 12 Ignite chips.

Ignite combines data-center-class ARM application cores with RISC-V vector and tensor cores on a single die, all sharing the same memory space. The ARM cores act as an on-chip host processor to orchestrate the AI model. The RISC-V cores carry out the actual LLM processing. The result is a single chip that handles multiple aspects of LLM inference demands without handing off between processors. Majestic Labs has yet to reveal specific metrics for Prometheus’ compute performance.

Rabii acknowledges that software is important as well, given that many AI frameworks are already entrenched. “We’re trying to reduce friction as much as possible in every aspect of our customer adoption, whether it’s physical or software,” he says. Prometheus will support PyTorch, vLLM, and OpenAI’s Triton inference frameworks without requiring code modifications. That means existing models compatible with these frameworks can run as-is.

Prometheus Server Design and Pricing

All of this combines in the server itself, which is Open Compute Project-compliant. Up to four servers can fit in a server rack; power draw is expected to total up to 120 kilowatts per rack; and heat will be managed with cold-plate liquid cooling. The server’s memory design is modular, which means servers purchased with less than the maximum of 128 TB of memory can be upgraded at a later date.

Despite the breadth of the project, Majestic wants to position Prometheus on price, too—which might be a surprise given how much memory each server can contain. Majestic argues that this will be possible because it uses DRAM instead of HBM. Pricing has not yet been announced, as Prometheus is expected to ship in 2027.

“Our customers’ capital expenditure will come down by, depending on the workload, 10 to 50 times, and the power consumption comes down by a similar amount,” Rabii claims.

The ongoing instability in the Middle East has put fertilizer availability at the center of global food security concerns. Up to 30 percent of the global fertilizer trade typically passes through the Strait of Hormuz, along with major flows of liquefied natural gas, a key feedstock for its production. Delayed shipments are rippling through agricultural supply chains, and the United Nation’s Food and Agriculture Organization has warned that the price of urea, a widely used nitrogen fertilizer, had increased by 52 percent in the United States and by 60 percent in Brazil by mid-April.

“Traditionally, because fertilizers are relatively cheap, farmers often apply the maximum allowed amount,” says Ioannis Athanasiadis, a professor at Wageningen University in the Netherlands who works on AI for agriculture and food systems. “It acts as insurance against uncertain weather conditions.” But for farmers already squeezed by the cost of fuel, machinery, and seeds, volatile fertilizer prices are making waste increasingly expensive.

Precision agriculture has already helped farmers reduce chemical use and save money, with computer-vision systems able to identify weeds and trigger herbicide nozzles only where needed. But fertilizer is a tougher challenge. Nitrogen, the key nutrient in many fertilizers, is invisible, highly mobile in soil, and can be washed below the root zone before crops absorb it.

“The difficulty is that you never actually know how much nitrogen the plant and the soil have,” says Chris Padwick, a technical fellow at Blue River Technology, a California-based company that develops computer-vision technologies for agriculture.

Precision Fertilizer Technologies

Along with its parent company John Deere, Blue River developed a precision fertilizer technology called ExactShot, which can be deployed only at the time of planting. The system detects each seed as it goes into the soil and sprays a few drops of starter fertilizer directly onto it, instead of applying fertilizer continuously along the row. Blue River says the system can cut starter fertilizer use by more than 60 percent and could save more than 93 million gallons annually across the U.S. corn crop.

The harder task comes later in the plant’s life, when crop needs depend on weather, soil type, previous applications, and what has already happened in that patch of field. Many sprayers for precision herbicide applications can be fitted with attachments in the shape of an inverted-Y that drag hoses near corn plants, dribbling liquid nitrogen close to the row during the growing season. But without reliable information on which parts of the field actually need nitrogen, the application remains nonselective.

John Deere’s ExactShot technology detects each seed as it is planted and applies a few drops of starter fertilizer.Blue River Technology

Padwick says Blue River is testing whether its crop imaging systems could also become “digital scanners” for plant health, using broader spectral coverage to analyze vegetation as sprayers pass close to the canopy. But getting insights isn’t the same as accurately interpreting them. Yellowing leaves or reduced chlorophyll may point to a nutrient deficiency, but they can also indicate drought stress, disease, or insect damage. That is why some companies are moving below the canopy and into the soil, where direct measurements can provide a more objective picture of what nutrients are available.

Elsewhere in the United States, Iowa-based N-Sense is betting on a mobile machine for soil analysis. Its prototype soil-nitrate sensor can be pulled through the field by a truck to measure nitrate concentration in real time. The system uses a ruggedized miniature Fourier-transform infrared spectrometer operating in the mid-infrared, coupled with a diamond interface. Soil is pressed against one end of the diamond while infrared light passes through the other, allowing the instrument to detect nitrate while the diamond protects the optical surface from abrasion.

“Nitrate is particularly difficult to detect,” says David Laird, N-Sense’s president and CEO. “In the ultraviolet, many things in the soil are responsive, so it is very difficult to separate the nitrate signal. But in the mid-infrared, we are able to isolate the nitrate band and get a strong signal.”

N-Sense’s sensor measures nitrate in real time as it moves through a crop field.N-Sense

The sensor feeds nitrate data into machine learning software that also taps into soil-survey data, satellite imagery, and yield data to generate fertilizer prescriptions that can be uploaded directly to a tractor.

“You do not want to look at nitrogen in isolation,” says Laird. “The soil may have low nitrogen content, but if water availability is what is limiting productivity, adding nitrogen will not help.”

In one field tested last year, Laird says the company achieved about a 30 percent reduction in total nitrogen fertilizer applied.

Real-Time Soil Analysis

In Potsdam, Germany, an agricultural tech company called Stenon has developed FarmLab, a mobile soil-analysis device designed to give farmers real-time measurements directly in the field. The handheld probe is pushed into the soil and combines optical spectroscopy, which reads how soil absorbs and reflects light, with impedance-based electrical measurements, which send a small electrical signal through the ground to capture properties affected by moisture, salts, and nutrient ions. Environmental sensors capture the temperature and humidity, and there is also a GPS tag that associates each reading with a location. Cloud computing and machine learning turn the raw signals into usable soil data. The goal is to infer key soil parameters, including nitrate, mineral nitrogen, moisture, and other indicators that can guide fertilizer decisions.

Stenon’s FarmLab uses optical spectroscopy, electrical impedance sensing, and machine learning to generate soil nutrient maps for precision fertilization.Stenon

The company’s founder and CEO, Niels Grabbert, says the idea came when Europe began enforcing the Nitrates Directive, a law aimed at protecting groundwater and surface water from agricultural nitrate pollution. Back then, farmers were required to reduce nitrogen losses but lacked real-time information on the nitrogen present in their fields.

“Depending on the country and on what parameters you are testing for, it can take anywhere from two to eight weeks before you receive soil-testing results,” says Grabbert. “That means farmers do not know in real time how much nutrition the soil itself can provide.”

FarmLab is meant to replace sparse lab testing with faster, denser field data. On a 100-hectare farm, an agronomist could take one reading every two hectares, then use the software to turn those GPS-tagged measurements into nutrient maps and fertilizer rates that can be sent to farm machinery or management platforms.

Grabbert says the technology can reduce fertilizer use by around 20 percent on average while increasing yields by 2 to 8 percent, depending on the crop and production system.

For Dutch professor Athanasiadis, these systems point in the right direction, but they are not enough on their own. “There are no magic solutions,” he says. “We need sensors, robotics, AI, government support, and farmer participation all working together.”

Chipmakers are struggling to shrink the amount of area a transistor takes up, so researchers are trying to build layers of devices on top of each other. However, many experimental 3D chips rely on exotic materials and perform poorly compared with regular silicon devices. But researchers at the University of Illinois Urbana-Champaign have found a new way to build 3D circuits from silicon. The secret is a process that lets them roll multiple layers of nanometers-thin silicon onto a wafer at relatively low temperatures.

Today’s 3D microchips, such as the AMD MI300 series, stack prefabricated layers on top of each other and connect them with the help of metal pillars known as through-silicon vias. However, the challenge of properly aligning the connections between these layers limits how many links can be made and therefore how useful 3D stacking can be.

By contrast, in monolithic 3D chips, layers of devices are fabricated directly on top of each other. This enables alignment of these layers with nanometer-scale precision, and with orders of magnitude denser connectivity than today’s 3D chips.

However, experimental monolithic 3D chips require transistors and other devices in the upper layers to be fabricated at 400 °C or less to preserve the wiring that connects their components together. Such 3D chips have been made using a variety of materials, but their performance and reliability all proved much worse than the metal-oxide-semiconductor field-effect transistors (MOSFETs) found in virtually all conventional microchips, erasing most of the gains offered by a monolithic 3D design.

Now scientists have created monolithic 3D chips from silicon at less than 200 ℃. “For years, people assumed monolithic 3D would require exotic new materials such as carbon nanotubes, metal-oxide semiconductors, or 2D semiconductors,“ says Qing Cao, an associate professor of materials science and engineering at the University of Illinois Urbana-Champaign. “Demonstrating that silicon can do the job means this technology can plug directly into existing manufacturing ecosystems, which dramatically accelerates its path toward real impact.”

Low-temperature junctionless transistors

Instead of the MOSFETs used in most chips, the new 3D chips rely on junctionless transistors. Regular MOSFETs are made using both n-type semiconductors, which are doped to contain an excess of electrons, and p-type semiconductors, which are doped to produce a deficit of electrons. Charges enter a transistor through its source terminal, travel down a channel, and exit out the drain terminal. In MOSFETs, if the the source and drain are made of p-type silicon, the channel will be made of n-type, and vice versa. The p-n junctions where these semiconductor types meet interrupt the flow of current. When a gate electrode applies voltage to the channel, current can flow across.

Each layer of a new kind of 3D contains so-called junctionless transistors. The bottom layer is made from silicon with excess mobile electrons, the top from silicon with excess holes. The transistors are linked together vertically to form complementary logic.Bao Lam, Yung Man Yu, et al.

In contrast, in junctionless transistors, the source, channel and drain are all completely either p-type or n-type, and so operate without p-n junctions. When a voltage is applied to the gates, they switch on, allowing current to flow. First proposed in 1925, they were not built until 2010 due to limits in fabrication technology; they require highly and uniformly doped channels at most about 10 nanometers thick. In MOSFETs, chipmakers use high heat to make sure dopants are located precisely where they are needed to be in the silicon crystal to create p-n junctions. Junctionless transistors don’t need these high temperatures.

“Junctionless devices also use a simpler process flow, which can reduce costs and improve yield,” Cao says.

The new 3D chips are made by laying down uniformly doped single-crystal silicon membranes each 10 nm or less thick using a wafer-scale roll-transfer-printing process. “Because the membranes are so thin and flexible, they conform to the underlying surface, avoiding the voids and warpage that often plague wafer bonding between rigid wafers,” Cao says.

That the nano-membranes can transfer onto surfaces that are not necessarily perfectly flat “is important because the current method typically used in industry requires sub-1-nanometer roughness for the surfaces to be bonded together and extremely flat—only a few microns of variations across the wafer,” says Veeresh Deshpande, an associate professor of electrical engineering at the Indian Institute of Technology Bombay, who did not participate in this study. “The proposed method simplifies the process complexity and allows stacking several tiers of transistors, both for advanced computing and memory like DRAM.”

Cao and his colleagues fabricated three levels of junctionless transistors on a 75-millimeter silicon wafer, with each tier composed of 625 transistors over a 1,600-square-mm area. From these transistors they constructed a variety of logic gates and circuits—including inverters, NAND and NOR gates, and static random access memory (SRAM) cells—using vertical connections between the layers that were aligned with sub-10-nm accuracy.

The researchers were able to form circuits made up of transistors distributed over all three layers of the 3D chips. That led to a six-transistor SRAM cell with a footprint as little as one-third the size of its 2D layout.

A transistor’s switching speed depends on its current density, and the junctionless transistors showed a current density that could exceed 650 milliamperes per micrometer, which is comparable to older commercial silicon MOSFETs. More advanced MOSFETs do show current densities exceeding 1,000 mA per micrometer, but Cao and his colleagues say that future engineering could further improve the performance of their devices.

“The key implication is that vertical stacking may not have to come with a severe transistor-performance penalty,” says Saptarshi Das, a professor of engineering science and mechanics at Pennsylvania State University, who did not take part in this research. “If scalable, this could open a practical path to denser, more energy-efficient chips with much shorter interconnects.”

Roll-transfer processes

The silicon wafers Cao’s team used are much smaller than the 300-mm ones most fabs use today. But transferring and stacking silicon membranes even across a 75-mm wafer without cracks, wrinkles, or defects “required a series of engineering innovations,” Cao says. These included adding surfactants during certain etching steps to reduce surface tension; adding polymer support layers for mechanical stability and surface protection; and adopting a roll-lamination process to apply uniform pressure during transfer.

“We began in 2019,” Cao says. “By 2024, we realized we had solved the fundamental barriers. The following year and a half was spent refining the process and demonstrating multilayered devices at wafer scale and 3D logic circuits.”

Beyond computing, integrating silicon with other materials in monolithic 3D devices may open up new applications “that were previously out of reach.” Cao says. “For example, vertically stacking different types of single-crystalline semiconductors could enable ultrasensitive X-ray-detector panels or compact multispectral imaging systems.”

A new 3D chip has three layers of silicon transistors separated by about 90 nanometers of dielectric.Bao Lam, Yung Man Yu, et al.

One challenge monolithic devices will face is yield. “When you stack devices vertically, the traditional assumption is that every transistor in every layer must work perfectly, which can reduce overall chip yield,” Cao says. “We are working with circuit designers on defect-tolerant architectures that can absorb imperfections with minimal area and power overhead.”

Another hurdle is the way these 3D chips increase power density, concentrating heat. “We are collaborating with circuit and architecture teams on solutions such as dynamic voltage and frequency scaling and AI-assisted on-chip power regulation to actively manage heat,” Cao says.

Cao suggests the new approach is initially only promising for research and low-volume prototyping applications. “Once the benefits of monolithic 3D integration are clearly established, we can work toward high-volume manufacturing,” Cao says. “We simply want to be realistic and avoid over-claiming before the technology has been validated in those settings with full cost analysis.”

The scientists now want to partner with semiconductor foundries to demonstrate and refine the technology in a manufacturing environment, Cao says. Ultimately, “because our approach is silicon based and compatible with foundry processes, it has a realistic path to adoption,” he notes. “It will be especially valuable for AI workloads that are increasingly limited by communication bottlenecks, which is directly addressed by this technology by bringing compute layers physically closer together.”

This article is adapted by the author with permission from Tech Policy Press. Read the original article.

South Africa is not just another developing country struggling to govern artificial intelligence; it is the exception with leverage, and the window to act on it is closing. It holds approximately 88 percent of global platinum-group metal reserves, critical inputs to parts of the semiconductor and data-center supply chains that make AI infrastructure possible. It hosts the largest data-center market on the continent. Its existing hyperscaler relationships give it procurement leverage that most African states will never have. And a major geopolitical contest over AI infrastructure is being fought on its soil right now, between Chinese and American technology companies competing for control of the systems that will underpin an entire continent’s public sector.

In physics, leverage requires three things: a fulcrum, a lever arm, and the ability to apply force. The Bushveld Complex, the world’s largest platinum-group metal deposit, is the fulcrum: a mineral endowment that gives South Africa a position in the semiconductor supply chain that no other African state holds. The since-withdrawn draft policy is the lever arm. The unresolved “OPTION” provisions in the policy are where force would be applied. Without a policy that specifies what South Africa wants in return for market access, the lever arm sits unused, and the weight of two of the world’s largest technology ecosystems settles exactly where those ecosystems want it to settle.

This makes South Africa a global test case. Not because its proposed means of governance is exemplary, but because it is the one developing country with enough structural leverage to negotiate genuinely different terms, and the one that is choosing, through inaction, not to. The recent announcement of a new panel to update the draft policy by January 2027 is an important opportunity. But the deeper failure is not that an AI policy contained bad references. It is that no verification process caught them before the document entered the public domain. That is a systems problem, not merely a political one. It points to a missing layer in how governments are adopting AI.

The contest already underway

Last year, Huawei pitched an emerging-product bundle to tech executives across the continent. Huawei was now bundling access to DeepSeek’s large language model with its own cloud and storage infrastructure. The price differential was stark—in some cases by more than 90 percent.

At the same time, Microsoft announced plans to spend ZAR 5.4 billion ($300 million) by the end of 2027 on cloud and AI infrastructure in South Africa, building on a prior ZAR 20.4 billion investment. Google, Amazon Web Services, and Oracle already have cloud regions in the country. According to one analysis, the country’s data-center market was valued at US $2.16 billion in 2024, the largest in Africa.

These are not commercially neutral investments. Huawei’s infrastructure reach has been explicitly linked to Chinese strategic objectives, including a documented track record of providing governments with surveillance infrastructure through its Safe Cities network. U.S. hyperscaler investment comes with its own dependency structure: closed models, pricing set unilaterally, and terms of access that no African government has meaningfully shaped. South Africa is being asked to choose between these dependency models without a policy that specifies what it wants in return.

The leverage it has

There is a particular irony in South Africa’s position. The country whose mines supply platinum-group metals essential to semiconductor manufacturing, and through them to AI compute, has drafted a policy that treats it as a consumer of AI systems rather than a stakeholder in their governance. South Africa digs up the minerals that make AI possible. It has no say over the AI built from them.

The AI triad framework covers algorithms, compute, and data. South Africa has no frontier model development capacity. South Africa holds significant data assets in financial services, health care, and agriculture, with no clear framework for their sovereign management. South Africa possesses PGM (Platinum Group Metals) leverage of global significance on the compute axis, currently being transferred without meaningful condition. It also has exceptionally high solar irradiance and significant renewable-energy potential. A country that can offer both critical mineral inputs and the energy to power the infrastructure those minerals help build occupies a negotiating position of unusual strength.

The Draft Policy proposes no minimum terms for hyperscaler investment, no data sovereignty requirements, no technology transfer conditions and no compute visibility mechanism. Multiple provisions are explicitly left unresolved, marked “OPTION,” including the most consequential choices about how governance will function. Infrastructure decisions made now determine what is renegotiable later, and the answer is: very little.

Three futures, one default

The three infrastructure futures on offer each create a structurally different form of dependency, and only one creates sovereign capability. The Huawei-hosted DeepSeek integration offers low cost and open-source weights, but with data stored on infrastructure potentially accessible under Chinese legal frameworks, creating surveillance dependency in a pattern already documented across Africa. The second is U.S. closed-model dependency: higher capability, more reliable data protection, but complete API dependency on developers abroad. The third is locally hosted open-weight infrastructure: models governed under South African data-sovereignty rules, on infrastructure subject to minimum terms, developed with South African data. As Nathan Lambert at Interconnects has observed, open-weight models are likely the only realistic way to get sovereign AI off the ground as a real effort, enabling local communities and economies to integrate meaningfully with the technology. But this requires procurement conditions, not goodwill.

What binding governance looks like

The GovAI “Governing Through the Cloud” framework identifies four roles compute providers should accept as conditions of operating at scale: securers (protecting model weights and training data), record keepers (maintaining infrastructure usage logs), verifiers (confirming customer compliance with safety standards) and enforcers (restricting access when violations occur). These are operational requirements, not theoretical categories—specific, enforceable, and well within the bargaining power of a market of South Africa’s size and mineral position.

A detailed policy analysis submitted to the Department of Communications and Digital Technologies (DCDT) identifies the specific provisions the final policy must contain: mandatory minimum terms for foreign compute infrastructure investments above ZAR 500 million (~$30 million); a compute reporting threshold; a National AI Safety Institute mandate covering defensive monitoring of AI capability accumulation; and National AI Champion Sector designations to create data assets for domestic model development. Each provision converts a structural advantage into a governance instrument before that advantage is foreclosed by market reality. Just as modern software security increasingly depends on knowing what components are inside a system—model provider, training data, compute environment, evaluation methods, update cadence, human review points, and failure-reporting procedures—public-sector AI governance requires a clear account of the stack before deployment, not after a problem surfaces. A public institution that cannot verify the sources in its own AI policy is unlikely to be ready to verify the AI systems it procures, deploys, or regulates.

Why this is the continental test case

South Africa’s choices will establish a regional precedent for what is commercially negotiable in AI infrastructure. If South Africa negotiates data-sovereignty guarantees and technology-transfer conditions as requirements for hyperscaler investment, it creates a replicable model. If Microsoft’s $300 million investment and Huawei’s infrastructure expansion proceed on standard commercial terms, as they are currently, it normalizes extractive AI infrastructure across the continent. The lesson is not specific to Africa. Governments everywhere are producing AI strategies while lacking AI assurance infrastructure. South Africa is an early warning, not an isolated case.

The public comment period closed when the policy was withdrawn. But a parallel process remains live: the National Treasury’s Draft General Public Procurement Regulations—the legal instrument that will govern every government AI contract—closes for comment on June 15. Those regulations contain no AI-specific provisions.

South Africa has more AI leverage than any country on the continent. Some argue, with force, that governance requirements risk deterring the infrastructure investment South Africa urgently needs: compute capacity, reliable energy, venture capital, and talent retention. That concern deserves a direct answer. Minimum procurement terms, compute reporting thresholds, and technology transfer conditions are not barriers to investment. They are the conditions under which investment serves the host country rather than extracting from it. Infrastructure built without minimum terms produces dependency. Infrastructure built with them produces leverage. To serve the public interest, its AI policy must use it.

Floppy disks are several decades old—many of the disks are degrading and the data stored on them is at risk of being lost. In response, Leontien Talboom, a technical analyst at Cambridge University Libraries and Archives, led a roughly year-long project preserving floppy disks called “Future Nostalgia,” which concluded in January.

Leontien Talboom

Leontien Talboom is a technical analyst at Cambridge University Libraries and Archives, where she transfers material from a wide range of storage media to make them accessible to archivists.

IEEE Spectrum spoke to Talboom about her work preserving data from Cambridge’s collection of floppy disks and collecting knowledge about the disks themselves.

Why is it important to preserve floppy disks now?

Leontien Talboom: Two reasons. First, the physical media is starting to degrade. Floppy disks are made from plastic, but they’ve got a magnetic layer of iron oxide, and that’s deteriorating. A lot of floppy disks are found in attics or garages, which means they also suffer from mold.

Second, a lot of people who developed floppy disks and systems that use floppy disks are starting to retire or pass away, which means that a lot of tacit knowledge is disappearing.

Whom did you go to for that tacit knowledge?

Talboom: I went to the retro computing community. Their work is more around preserving these machines to keep them running [than] the data that lives on the floppy disk. But they know their stuff about floppy disks.

For example, they know that in a lot of the older disks, the inside of the disk—the doughnut—gets stuck to the top. So if you flex the casing, the doughnut falls down again. If I hadn’t known that, I would have assumed that those disks in our collection were broken or corrupt.

What is the most difficult part of working with floppy disks?

Talboom: Accessing the files can be quite challenging if we don’t understand the file system. Within libraries and archives, we get a lot of material from machines that are not as well loved. Many of the personal computers that you had at home, such as the Amstrad or ZX Spectrum or BBC Micro, are very well documented. But a bunch of our material comes from business or research systems. They’re not as nostalgic for people, so there’s not as big a community preserving this type of material.

Do you have a favorite type of floppy disk?

Talboom: Five and a quarter. The weirder the system, the more frustrating and fun it is. I quite like doing that detective work.

The Amstrad disk has also really stolen my heart. The popularity of floppy disks is very geographically dependent. Our library, for example, has these Amstrad 3-inch disks. But if you go to the U.S., they’re really uncommon. They weren’t able to manufacture enough of these drives, and [3.5-inch disks] took over at a certain point. But they’re really cute.

What’s the best method for sustainably storing data?

Talboom: The main thing is actively looking after it. A lot of the floppy disks we get in the library haven’t been accessed for 20 or 30 years, which means that you need certain special hardware to actually read them, and then work with emulators or other tools to make these file formats accessible.

Now that we’ve done that work and transferred it, we can monitor it and make sure it’s not suffering from anything like bit rot. We can also make decisions around migrating it to other file formats or working on specific file systems or unknown file formats in more detail.

This article appears in the June 2026 print issue as “Leontien Talboom.”

Open-source software is ubiquitous: Linux is the dominant operating system on servers and supercomputers worldwide; Wordpress powers over 40 percent of all websites, among other major projects. Open-source hardware has existed since the late 1990s, but it hasn’t seen nearly the same level of interest or adoption as its software-focused cousin.

Dominic Rizzo, CEO and founder of the startup zeroRISC, aims to change that. Today, the nonprofit global security standards consortium GlobalPlatform launched Pavona, where Rizzo will be a governing board chair. The goal of Pavona is to facilitate the adoption of open hardware into all kinds of applications, including tiny IoT devices and massive data centers, by making the elements modular, standardized, and trusted.

Pavona is a new open-hardware ecosystem. It provides a starting kit of hardware modules, coupled with reference designs, a set of software tools to streamline adoption in different types of chips, and software tooling to ease integration. It also has a governance structure aimed at lowering the barrier to entry for adding new open-hardware designs and collaborating on development.

“I think it’s foundational,” says Andrew “bunnie” Huang, hacker and founder of Baochip, which is a founding member of Pavona. “We are now at the point where we finally have enough of a nugget of something open that we can spread it around. The outcome of this experiment is going to determine the shape of how we interact with hardware and open source for a long time.”

How open-source hardware differs from open-source software

The main reason open-source hardware hasn’t seen as much of a boom as software is almost too obvious to name: hardware needs to be manufactured, and manufacturing costs money. “Hardware, when it’s built, requires atoms,” Huang says, “which requires logistics and payment.”

At bottom, manufacturing itself is closed source. Because of this, open-sourcing hardware is inherently layered: While the chip fabrication, physical design kit, and foundry process remain closed, the layers on top of that, such as the design verification, system architecture, instruction-set architecture, and firmware, may be open source.

The Pavona ecosystem isn’t meant to deepen the penetration of open source through the layers. Instead, it’s meant to take the available open-source layers and facilitate their adoption and repurposing into as broad an application set as possible. “A lot of the work we’re putting into Pavona has to do with the infrastructure and the architecture that connects all this stuff together,” Rizzo says, “so it becomes much more like Legos, so you can use it in one configuration for a small IoT device and in another configuration for some large data-center system-on-a-chip.”

Part of making the hardware components more modular is software. Rizzo and his team built what they call an architectural composition engine that serves as a wrapper around the hardware, allowing it to interact with different types of computing cores, be they ARM or RISC-V. This way, a company can integrate the open hardware into their existing architecture without changing the software stack.

Pavona begins with security chip OpenTitan

Pavona’s starting kit of open-hardware designs includes components of OpenTitan, a chip that provides a “hardware root-of-trust,” a chip-level source of security that serves as a foundation for all secure operations in a computer. They also include extensions of the OpenTitan design that incorporate efficient cryptography that’s safe against possible future attacks from a large-scale quantum computer.

According to OpenTitan’s proponents, security hardware benefits from openness more than other chips, because if anyone can inspect and verify the design, and there is an active community of people stress-testing the hardware, it can become more trustworthy, and therefore more secure. It also makes the process of proving compliance with various regulatory requirements more straightforward.

Rizzo is counting on three factors to drive adoption of these open-security chips. The first is the AI boom, which has caused a massive increase in demand for chips of all kinds, not only the GPUs but also less well-known components like networking cards, monitors, and more. The second is the regulatory push toward transitioning to postquantum security, which both the U.S. and European governments have legislated to happen by the end of 2030. And third is new regulatory requirements in the European Cyber Resilience Act, which adds new security verification and reporting requirements for products sold in the European market.

“I think those three things together are all driving people in this direction of using secure, open-source silicon,” Rizzo says.

Security hardware may be just the beginning. Pavona is designed to make it as easy as possible to pull in new hardware modules. One need not be a paying member of Pavona to contribute new designs. “We absolutely are rejecting gatekeeping,” Rizzo says.

To increase trust from both individual contributors and large companies, Rizzo and his team developed a governance structure based on large open-source projects from the software world, such as Yocto. Contributing-member companies get representation on Pavona’s governing board. However, an independent technical committee makes the high-level technical decisions. This separation of managerial and technical oversight is meant to increase trust and transparency. “People get very discouraged when they feel like, ‘Hey, I made a contribution, and then someone made a decision in a hallway somewhere and told us later.’ So this is more consensus based, it’s more discussion based. And so those discussions have to be open,” Rizzo says.

Frank Nagle, the Linux Foundation’s advising chief economist and a research scientist at MIT, says compliance with standards and transparent governance are the keys to adoption of open-source technologies. “Having that type of structure in place will hopefully give it a fighting chance and allow it to reach scale, without people being concerned that it’s controlled by any one company.”

Pavona’s architectural-composition engine allows hardware to interact with different types of computing cores, so a company can integrate open hardware into its existing architecture without changing the software stack.Dominic Rizzo

The open-hardware future

Nagle argues that an underappreciated benefit of open source is that it allows private companies to work together, collaborating on core technology while still competing on specialized implementations.

“My favorite example of this I heard from a car manufacturer,” Nagle says. “The seat in your car has a little button that slides your seat backward and forward. Nobody’s buying one car rather than another car because that little toggle is better. But if you didn’t have one of those in your car, then somebody might not buy your car.”

Many technologies fall into the same category as the car seat’s button—technologies that are necessary but not a differentiator of the product. Security chips are a great example: Every piece of hardware needs security; however, few have it as their main function. These are the parts that benefit from open source, Nagle explains.

Collaborating on such hardware may enable cost savings for chip manufacturers and their customers, making the AI boom more economically sustainable.

Perhaps even more important, open sourcing some hardware development can lower the barrier to entry for new people to enter the field. To aid in this quest, Pavona also provides multiple “getting started” guides, software emulation tools, and FPGA code that anyone can download onto a board and get up and running in under 10 minutes.

“I want to get more people involved,” says bunnie Huang. “Particularly young people, particularly new people. Because we need a more robust ecosystem, more new ideas to ensure that we have the ability to maintain these technologies we depend upon.”

“Social engineering” sounds like something out of a conspiracy thriller, charged with totalitarian control and fringe paranoia. More mundanely, it’s come to be associated with phishing and other scams, in which fraudsters manipulate people into disclosing personal information.

Yet the concept is older and more benign: it is the deliberate shaping of human behavior, often at scale. It predates silicon—and became pervasive, and ungoverned, especially once its practitioners learned to hide it. Authoritarian regimes and more recently scammers and big companies have profited from it. To defend ourselves from bad actors, and to benefit from social engineering’s good side, we need to reclaim the name, and govern it prudently.

The roots of engineering

In 1894, Dutch entrepreneur Jacques van Marken urged companies to hire “social engineers” to manage human systems such as insurance, education, and profit sharing for workers as carefully as they did mechanical ones. Fifteen years later, reformer William H. Tolman published Social Engineering, describing how U.S. industrialists optimized workers’ conditions alongside manufacturing methods. If industrialists could shape steel and electricity on demand, why not society itself?

By the 1920s, that confidence had spread. The architect Le Corbusier declared that dwellings were “machines for living in,” imagining cities as orderly lattices where people moved like parts on a conveyor belt. Civilization would run like a Swiss watch.

The idea soon darkened. Authoritarian regimes pushed it to extremes, promising to fashion “the New Man.” In Nazi Germany, engineer Fritz Todt founded Organization Todt, a vast state engineering enterprise that emerged from the autobahn highway system and later operated concentration camps using slave labor.

In the Soviet Union, leaders adopted U.S. scientific management techniques to plan factory-worker movements and classify populations through centralized records, feeding both rapid industrialization drives and the gulag system of forced labor. The same tools and managerial methods used to build highways and enact five-year plans worked for repression and mass control.

By the 1950s, “social engineering” had become a contaminated phrase. The revelations of Nazi and Soviet abuses, along with Cold War critiques of grand social planning turned the term from a progressive slogan into a warning label. Banishing the words pushed the practice underground, making it harder to recognize when it resurfaced in new forms—such as organizational psychology and systems management that still relied on classification and behavioral influence techniques but under softer, less loaded labels.

Social engineering’s more subtle spread

In the postwar years, the new social-engineering lexicon included “human factors” and “urban planning,” all promising integration rather than command. As computing advanced, the language shifted again: “customer journey mapping” to track interactions, “user experience” to script them. Engineering, which began as a means of reshaping physical space, set its sights on shaping behavior. Digital design features embedded in our smartphones now target our attention and desire.

Language helps conceal these modern forms of social engineering. “Data analytics” sounds neutral beside “surveillance.” “Personalization” flatters individuality while still sorting users into predictable categories. “Behavioral nudges” guide decisions without the sense of intrusion. We attach “social” as a favorable modifier to sciences, capital, and media, yet recoil when it meets “engineering.”

That discomfort is a clue. Engineering implies control, and control prompts us to ask who directs whom, toward what ends, and with whose permission.

Not all social engineering these days is hidden. Hackers don’t need to break a firewall if someone hands over their password. Romance scammers cultivate intimacy the way farmers cultivate crops. They succeed not through force but by exploiting trust. If even these obvious attacks work, the invisible kind, with roots in social engineering, are a shoo-in.

Most of the social engineering we encounter is proprietary and beyond our control. Firms build recommendation algorithms tuned to boost engagement and profit with no hearings or right of appeal. Browser and cookie defaults decide what data we surrender. A single autoplay toggle can cost users hours and build unhealthy habits. These are acts of engineering as deliberate as laying a road or redrawing an electoral district. They create a kind of curated itch by which boredom never settles, and satisfaction never arrives. The results are predictable—users click on targeted ads, make purchases, form habits, and lock in opinions.

Consent has transformed along with it. Once straightforward and revocable, it is now subtle and persistent, buried in defaults or opaque terms of service too quickly accepted. You remain free to opt out, much as you are free to refuse roads or electricity. Consent has become the preselected setting of modern life.

When social engineering operated more in the open, citizens could contest it, at least in societies with responsive government. Today’s invisible version diffuses accountability so thoroughly that scrutiny becomes hard to direct. Despite recent congressional hearings on social media’s impact on youth mental health and juries agreeing that firms are knowingly designing algorithms that cause harm, pinpointing responsibility remains elusive. When the mechanism is buried inside a system used by billions, we cannot easily point to a single decision-maker or trace the precise moment of manipulation.

Today’s social engineering is less overt and theatrical than its predecessors. Earlier versions arrived on public posters and loudspeakers for mass audiences. Today’s version is more intimate, delivered through personal devices and constant feeds tailored to the individual. The model succeeds because participation feels like freedom, not control.

Not all social engineering is dystopian. Well-kept parks foster community, accessible buildings extend dignity, vaccines and seatbelts save lives. Even in the digital realm, positive examples exist: browser extensions that automatically block hidden trackers, search engines that refuse to build personalized surveillance profiles, and decentralized social platforms that give users greater control over their own data and feeds.

The term “social engineering” still unsettles, though. But “asocial” engineering, which ignores human consequences entirely, is worse. Recognition of the human dimension to engineering is the beginning of repair. Only by seeing the machinery clearly and naming it honestly can we decide who engineers what and why. The machinery will not dismantle itself. Once named, it becomes subject to choice. That negotiation of purpose, power, and process are the defining political questions of any real democracy. We cannot ensure that social engineering serves and sustains society so long as we dodge the words.

Darwesh Singh thinks Nvidia has a weakness.

The last decade of Nvidia’s history was among the most consequential stories in technology ever. The company’s stock price has increased over 200-fold since 2016, and deployed Nvidia AI compute capacity has surged to 225 times greater than the first quarter of 2021, according to data tracked by Epoch AI.

Yet Nvidia may in some ways be a victim of its own success. Its dominance in AI has led to GPU designs that prioritize tensor units and low precision math. These decisions make sense for AI, but less so for some creative, scientific, and industrial work.

Singh’s five-year-old startup, Bolt Graphics, sees an opportunity to build a GPU specifically for these use cases. Jill Mueller, Bolt’s chief marketing officer, puts it bluntly. Nvidia has “a fundamental lack of understanding of their customer,” she says. “They just throw stuff at you, and there you go.”

Bolt aims for this potential weak spot with Zeus, a GPU that will be sold as both a PCIe (peripheral component interconnect express) card for desktop workstations and, for those who require more performance, a rack-mountable server containing four Zeus GPUs (for up to 96 per rack).

While Nvidia goes low-precision, Bolt goes high

Jacob Feldgoise, senior data research analyst at Georgetown University’s Center for Security and Emerging Technology, has also noticed a shift in Nvidia’s recent hardware.

“AI is sucking the computational units used for high-precision workloads out of that hardware,” he says. “If you look at Nvidia’s highest performance GPUs, generation to generation, a greater share of the hardware has been allocated to low-precision compute, as opposed to high-precision compute, which is generally needed for scientific computing.”

Precision refers to how many bits a GPU uses to represent each number. High-precision formats like FP64 (64-bit floating point) preserve more digits and a wider range, while FP16 and INT8 sacrifice precision for speed. Recently, Nvidia introduced a new 4-bit number format, NVFP4, to accelerate AI workloads, which generally tolerate low-precision math.

But some tasks require precision. Singh cited geographical information systems, such as Esri’s ArcGIS, as an example. When rendering the planet on a GPU, low-precision arithmetic applied to large coordinate values can introduce errors that cause objects to drift.

Because Zeus, unlike so many other GPUs, is not designed primarily for AI, its design makes FP64-native vector cores a focus and allocates a large share of silicon to them.

“[Nvidia and AMD] make a conscious trade-off to allocate more die space to matrix multiplication and tensor units and less towards fixed function hardware,” Singh says. ”We decided to allocate the die space a bit differently.”

Rasterization is out, path tracing is in

A focus on FP64 isn’t the only way Bolt differs from the norm. Zeus is also built to render graphics with path tracing instead of rasterization.

Rasterization is the traditional method of high-performance 3D rendering. It projects 3D triangles onto a pixel grid and uses mathematical abstractions to determine the correct color for each pixel. Path tracing instead does the equivalent of shooting rays from a camera to simulate how light should bounce and interact. It delivers more accurate lighting but is computationally expensive.

As with high-precision math, Bolt believes it can find an edge by placing more emphasis on path tracing than do today’s GPUs. Rasterization is supported by Zeus but significantly scaled back; Singh estimates that Zeus’s raster performance is about half that of a comparable Nvidia card.

Bolt’s fresh arrival to the GPU arena also allows the company to take a clean sheet approach unburdened by legacy support. This differs from Nvidia and AMD, which must integrate path tracing alongside rasterization in a way that can support numerous existing applications and application programming interfaces (APIs).

Bolt claims that a server rack with 28 Zeus GPUs will deliver real-time path traced performance equivalent to 280 Nvidia RTX 5090 GPUs. The aim is for this configuration of Zeus hardware to support real-time path tracing that simulates up to 20 “bounces”—a reflection or collision of the simulated light—at 4K resolution and 30 frames per second. This is a high degree of accuracy required for professional rendering workloads; for comparison, even the most graphically attractive path traced games simulate just a few bounces.

Can a startup really launch a new GPU?

There’s a logic to Bolt’s approach. Nvidia and AMD are focused on AI, but GPUs are still useful for many tasks besides AI. However, Bolt will need to overcome two key technical hurdles.

The first is production. Cutting-edge silicon production is in short supply, and leaders like Nvidia have most leading-edge production capacity tied up. The Zeus GPU will instead be fabricated on TSMC’s older N5 process node. Bolt is betting that an older process node will keep Zeus competitive with Nvidia on price.

Bolt may also find it challenging to convince users that an unproven GPU is a safe bet. Driver support for software is always a headache in the GPU arena—just ask Intel—and the use cases that might benefit Zeus’s high precision and path tracing will also require reliable drivers.

Bolt plans to address this by launching with support only for specific applications. “We know that PC gaming is a huge segment,” Singh says. “But our approach is we want to target professional, creative, and high-performance compute first.” The company is working with software companies including Blender, Autodesk, and SideFX.

Bolt announced the tape-out of the first Zeus test chips on 22 April 2026, and it is now focused on bringing the GPU to production by the fourth quarter of 2027.

This article appears in the July 2026 print issue as “Bolt Wants to Put the Graphics Back Into GPUs.”

This sponsored article is brought to you by Wetour Robotics.

A field technician on a wind turbine, harness clipped, both hands on a wrench, needs to send a command to the diagnostic device hanging at her belt. A logistics worker on a loading dock, gloves on, eyes on the pallet, needs to redirect a connected lift. A person using an assistive mobility device on a crowded street wants to nudge it forward without taking out a phone or speaking aloud. None of these moments call for a smarter robot. They call for a smarter way to be heard by the machines that already exist.

The industry has been building from one side

The past three years of Physical AI have been a story of remarkable progress on the robot side of the loop. Companies like Boston Dynamics, Figure, and Unitree have advanced actuators, locomotion, and dexterity to a level that would have seemed implausible a decade ago. Google DeepMind’s Gemini Robotics has redefined what vision-language-action models can do in unstructured settings. The trajectory of the hardware and the foundation models is real, and it is accelerating.

But there is another side to this loop, and it has been treated as a solved problem for too long. The interface between humans and machines has defaulted, for 40 years, to three input modalities: screens, buttons, and voice. Each of those assumes the user can stop, look down, and translate intent into structured commands. That assumption breaks the moment the work moves into a real environment. On a turbine. On a dock. On a sidewalk. In any setting where hands are occupied, eyes are committed, or speaking is impractical, the conventional interface stack quietly fails.

Spatial Intent Fusion is the simultaneous processing of three streams of human-centered information, namely spatial position, visual context, and gestural intent: Your body is the interface.

The bottleneck on the human side of the loop is becoming as important as the one on the machine side. And solving it requires a different question. Not how do we make the robot more capable, but how do we let the human participate in the computing system as naturally as the robot already does.

Wetour Robotics’ bet: put the human back into the computing loop

Wetour Robotics is betting that the next architectural leap in Physical AI is not about making the robot more capable. It is about making the human a first-class node in the computing network, with the same kind of low-latency, high-fidelity participation that connected devices already enjoy.

Wetour Robotics’ engineers frame the problem this way: a wristband that recognizes a gesture is not enough. A camera that recognizes a scene is not enough. The information a human carries about what they are about to do is distributed across multiple channels, including where their body is in space, what their eyes are attending to, and what their muscles are preparing to do, and any single channel observed in isolation is ambiguous. Reconstructing intent reliably means fusing those channels at the operating system level, with latency low enough that the loop feels closed rather than mediated.

This approach has a name. Wetour Robotics calls it Spatial Intent Fusion: the simultaneous processing of three streams of human-centered information, namely spatial position, visual context, and gestural intent, fused into a single real-time command for any connected physical device. It is the technical implementation behind a simpler positioning statement the company uses externally: your body is the interface.

Orchestra is a portable intelligent hub running the operating system that handles sensor fusion, intent inference, command translation, and safety arbitration. The reference compute platform is NVIDIA Jetson Orin Nano Super, which provides enough on-device inference capacity to keep the entire control loop at the edge, with no cloud dependency on the critical path. Wetour Robotics

The architecture: three layers, four engines, one loop

Orchestra is not a single device but a layered platform, designed from the start to be sensor-flexible and actuator-agnostic. The architecture decomposes into three perception layers and four coordination engines.

Orchestra itself is the local compute and orchestration core: a portable intelligent hub running the operating system that handles sensor fusion, intent inference, command translation, and safety arbitration. The reference compute platform is NVIDIA Jetson Orin Nano Super, which provides enough on-device inference capacity to keep the entire control loop at the edge, with no cloud dependency on the critical path. Edge inference is non-negotiable for this application. Full-chain latency from biosignal acquisition to actuator command is held under 100 milliseconds, the envelope inside which closed-loop control feels natural rather than laggy.

VisionLink handles visual and spatial perception. Cameras feed into vision models that identify objects, estimate distances, and track environmental context. VisionLink is designed not as a passive recognition layer but as a real-time command generator: its outputs feed directly into Orchestra OS to be fused with biosignal data.

Conductor is the biosignal pipeline. It ingests raw surface electromyographic (sEMG) data from a wrist-worn device, classifies temporal patterns into discrete gestures or continuous control signals, and outputs actuator commands. The technically interesting property of sEMG for this use case is that the signal precedes visible motion. Motor unit action potentials appear at the skin surface roughly 50 to 80 milliseconds before a finger completes the corresponding gesture. Wetour Robotics calls this property pre-motion intent sensing, and it is what allows Orchestra to anticipate user intent rather than react to it.

On top of the three perception layers, Orchestra OS runs four coordination engines. The Perception Engine ingests and normalizes raw sensor streams. The Intent Engine performs Spatial Intent Fusion across modalities, resolving what the user is trying to do given where they are, what they are looking at, and what their hand is signaling. The Orchestration Engine translates intent into device-specific command sequences for any connected actuator. The Safety Engine arbitrates conflicting commands, enforces operational envelopes, and gates execution against runtime safety conditions.

The trade-offs we’re honest about

No system that bridges the human body and the digital world is finished. Three engineering challenges remain open, and the company addresses each with a deliberate trade-off rather than a claim of having fully solved it.

Baseline stability of sEMG under motion. In a stationary user, continuous gesture recognition from sEMG is reliable. Once the user is walking, climbing, or otherwise moving, motion artifacts and electrode drift degrade the signal in ways that are difficult to fully compensate for. Rather than overpromise on continuous control in dynamic settings, Orchestra defaults to a smaller set of robust discrete gestures in complex operating environments, and reserves continuous control modes for contexts where the signal-to-noise ratio supports them.

Miniaturization of edge AI compute. Running the Orchestra control loop entirely at the edge requires real on-device inference, which has historically meant trading off between compute capacity, battery life, and form factor. Wetour Robotics’ approach has been a compact carrier board paired with a thermal design and a battery module sized for all-day wearability. The result is a hub that travels with the user rather than tethering them to a desk, and that performs the full perception-to-actuation loop without offloading to the cloud.

Heterogeneity of third-party device protocols. The actuator side of the loop is a fragmented landscape. Different manufacturers expose different command interfaces, different communication stacks, and different safety conventions, and a Physical AI operating system has to integrate with all of them. Wetour Robotics uses an AI-agent layer to negotiate connection and protocol translation adaptively, so that Orchestra OS can ingest data from a wide range of devices, run them through neural network models that infer human intent, and emit the right command on the right protocol for the device on the other end.

Why this matters, and why it helps the rest of the field

The history of computing is a history of interface revolutions. Command lines gave way to graphical user interfaces, which gave way to touch, which gave way to voice. Each transition expanded who could participate in the system and what they could do with it. The next transition is not about a new screen or a new microphone. It is about treating the human body itself as a participant in the computing network, capable of contributing intent at the same speed and fidelity that any other connected node can.

The history of computing is a history of interface revolutions. The next transition is not about a new screen or a new microphone — it is about treating the human body itself as a participant in the computing network.

This path is not a competitor to the work being done on humanoid robots, foundation models for embodied AI, and dexterous manipulation. It is the missing complement to that work. The hardest open problem for humanoid systems is the data: every natural interaction between a human and the physical world is a potential training signal, and most of those interactions are currently invisible to any computing system. As more humans become first-class nodes in the loop, those interactions become observable, structured, and ultimately useful for training the next generation of embodied AI, including the humanoid robots being developed today.

In other words: putting the human back into the computing loop is not just about better interfaces for individual users. It is about generating the kind of grounded, in-the-wild human-machine interaction data that the broader Physical AI ecosystem will need to keep advancing. The robot side and the human side of the loop are not two competing futures. They are two halves of the same one.

That is what Wetour Robotics means when it says: Your body is the interface.

Learn more at wetourrobotics.com.