Mentor Graphics PCB Design Tools - Expedition

Solve Today's Toughest PCB Layout Challenges with Mentor Graphics Expedition Enterprise

2012-06-19T00:30:00.000-07:00

Solve Today's Toughest PCB Layout Challenges with Mentor Graphics Expedition Enterprise

Join us for an all-new series of webinars focused on complex PCB Layout, illustrated by the great capabilities of Expedition PCB.

This series of webinars focuses on complex PCB Layout, illustrated by the great capabilities of Expedition PCB. Webinar topics include concurrent team design, high-speed constraint definition & routing, advanced technologies, and effective design reuse.

What You Will Learn

How to use the latest PCB layout technologies to speed time-to-market
How to lower product costs through better PCB layout
How to enable competitive product differentiation

Here you can find an overview of the Web Seminars. Please click on the one you want to attend for more information and for registration.

May 30, 2012: Using Advanced PCB Technologies to Gain a Competitive Edge in Circuit Design

June 13, 2012: Turbo Charge Your PCB Layout Schedules with Concurrency

June 27, 2012: Are Complex PCB Layout Topologies Slowing You Down?

Online, 2:00 PM US/Eastern

What You Will Learn

PCB constraint types for high-performance designs
Methodology for efficient definition of constraints, then adherence while routing
Time, quality and performance benefits of constraint-driven high-speed PCB design

July 11, 2012: Constraint-Driven PCB Layout Eliminates Design Iterations

Online, 2:00 PM US/Eastern

What You Will Learn

Typical constraints in today’s average designs
Design methodology based on dynamic constraint checking vs. back-end validation iterations
Time and quality benefits of constraint-driven design

July 25, 2012: Stop Reinventing the Wheel, Start Using PCB Design Reuse

2:00 PM - 3:00 PM US/Eastern

What You Will Learn

Different kinds of design reuse

Approaches to leverage reuse blocks

Time and quality benefits of an effective reuse methodology

Expedition Enterprise - Printed Circuit Board Software (Part 3)

2012-06-18T03:00:00.000-07:00

Analysis and Verification

Signal Integrity, Timing Analysis and EMI
With the Expedition Enterprise flow, signal integrity and electro-magnetic interference (EMI) issues can be addressed and corrected throughout the design process rather than just at the end. Driven by constraints in CES this ensures that designs are correct the first time, effectively reducing design iterations and facilitating optimum system performance.

HyperLynx® provides pre- and post-layout signal integrity, crosstalk and EMC analysis for traditional highspeed interconnects, as well as the emerging SERDES and DDR2/3 technologies. HyperLynx's easy-to-learn analysis environment makes it an every-desktop standard for Expedition Enterprise. Higher-frequency designs and government regulations place increasing importance on EMI control.

This normally required a prototype board, testing in a shielded chamber and re-design. Now with Quiet Expert™, the causes of EMI can be highlighted and eliminated during the design layout, thus significantly reducing design iterations and saving valuable time-to-market.

Power Integrity
With today’s lower and multiple voltage ICs, power and ground is no longer easy to design and analyze. PCBs can contain as many as 30 power distribution networks jig-sawed into
the PCB layers. These networks must be analyzed for DC voltage drop (sufficient power to all IC pins), current density (too much current through a narrow part of the network), and AC (is the power clean).

HyperLynx PI (Power Integrity) provides the engineer and designer with pre- and post-layout analysis of complex power distribution networks to insure proper operation and high reliability of the PCB.

Thermal Analysis
As products get faster and smaller, thermal management issues increase. HyperLynx Thermal, FloTHERM®, and FloEFD® provide thermal analysis capabilities for the PCB as
well as the PCB(s) in the full product (enclosure, fans, heat sinks, etc.).

Using these capabilities, the PCB designer can perform analysis on the PCB to determine good placement of the components. The mechanical designer of the enclosure can insert the
PCB(s) into the complete product and analyze it to see if the heat will be dissipated properly. The result is a design that has higher reliability and can be manufactured without multiple
prototypes or re-spins.

Automation
Automation provides customization and extensibility within the design and layout products, allowing the addition of custom functionality, the automation of repetitive tasks, and the ability to tailor the flow to customer-specific use-cases and optimize the flow for
specialized processes. The use of a wide range of industry-standard languages (VBscript, Jscript, TCL, Java, VB6, C++, C#, VB.NET...) minimizes the start-up time for company

For demonstrations of Expedition Enterprise’s advanced technology go to:
http://www.mentor.com/products/pcb-system-design/multimedia/

DFM issues are summarized and ranked by severity based on userweightingprogrammers and facilitates script reuse. The result of automation is to reduce errors, increase productivity, increase the performance, quality, and reliability of the design, decrease the
cost of the design, and decrease time to market (and time to profit).

Design Reuse
The Design Reuse module creates and stores reusable blocks of circuitry, including schematic, as well as PCB placement and routing data, in a central library. These blocks can then be placed and modified in the same design or multiple designs now and in the future.

Design reuse automates this process and manages the design data to ensure error-free databases and reduce the overall PCB design cycle time by not having to re-design
the same circuit. Layout data can also be easily cut/pasted within a design and into other designs, enabling informal reuse of sections of a design.

Variant Management
Variant Manager manages the creation of multiple product configurations from a single design database. Variant Manager's single-point ECO management minimizes errors,
reduces costs, improves design quality and enhances production efficiency.

Support, Education and Consulting
Mentor Graphics offers a full range of services to drive your productivity and success with the Expedition Enterprise flow tools. Customer Support offers award-winning technical assistance, innovative electronic support and high-quality product enhancements.

Education Services offers classroom and online training to help you assimilate new tools and technologies into your design environment. Finally, Mentor Consulting is always ready to provide focused expertise in tough design areas.

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Hardware Requirements
• Dual core, 2 GHz or faster

• Memory: 2 GB RAM

OS Requirements
• Windows XP Professional
• Windows 7
• HPUX
• Sun OS
• RedHat Linux

Expedition Enterprise - Printed Circuit Board Software (Part 2)

2012-06-11T16:12:00.000-07:00

PCB Layout

Expedition Enterprise is the most powerful physical-layout solution in the industry.
By combining ease-of-use with advanced functionality, Expedition offers designers the leading technology to create today's most complex designs. It includes interactive and
customizable multi-pass auto-routing controls for design challenges, such as differential pair routing, net tuning, manufacturing optimization and HDI/microvia and buildup technology.

The Physical Layout Technology Leader in PCB Design

Expedition’s placement and routing technology represents a revolutionary step forward for PCB design. The power of industry-leading auto-routing technology is combined with interactive editing capabilities to produce a single, powerful and easy-to-use design environment. This environment eliminates the burdens of jumping between tools to get the job done and managing differences between the constraints on the auto-router and on interactive editing.

Expedition provides greater control than ever before, easily switching between automatic and manual editing as needed. From simple tasks, such as defining board areas, to complex procedures that involve maintaining high-speed signal conditions, all objectives are accomplished with the system and the designer working together in real time. The net result of Expedition’s technology is reduced design times, increased productivity and unmatched design quality.

Auto and Interactive Routing

• A single, integrated, place-androute editing environment that reduces total design time and

increases productivity.

• All physical rules and high speed rules are maintained.

• Correct-by-construction design that produces high-quality results with clean-up time eliminated.

• Shape-based, true 45° routing.

• The most advanced auto-routing technology ever. Stop and start the auto-router at any time: all results will be correct-by-construction.

• Dynamic clean-up of traces through the reduction of segments, prevention of acute angles, and application of pad entry rules.

Dynamic Area Fills

Expedition Enterprise automatically clears area fills around traces, vias and pads as the board is edited. Dynamic area fills are so fast, it allows users to keep their area fills turned on while they are doing all necessary edits. Moving a via pushes and shoves other vias, traces and area fills and connectivity is automatically maintained.

Rules By Area

The rules-by-area function greatly improves routing around BGAs and other fine-pitched parts. Rule areas rep resent complete rule sets that are obeyed by online and batch DRC and

in interactive and automatic routing. Rule areas may be defined by layer and can be assigned to any polygon, rectangle or circle. Trace widths and clearances automatically change when within the rule area. Designers may also change via sizes and spans in a rule area to maximize route completion.

Multi-plow with Variable Via Patterns

Expedition Enterprise's multi-plow functionality allows designers to simultaneously route multiple nets, including differential pairs, with true 45° routing. It can even handle routing

through areas of staggered pins. Traces being routed push and shove the other vias and traces and automatically clear area fills as needed. Changes can be easily made to a variety of selectable via patterns at the touch of a button, allowing enhanced flexibility for routing into dense areas of a design.

High-Speed Layout

Designers are increasingly required to manage signal quality to achieve system performance and reduce prototype iterations. High-speed design with Expedition Enterprise is an integrated part of the design environment.

Net Tuning

While routing interactively, graphic tuning aids are displayed for guidance. Nets modified out-of-tune during edits are automatically re-tuned. The hazards dialog box dynamically updates as users edit nets, providing instant feedback to their constraints. Nets can also be tuned automatically within an auto-route pass.Tuned nets are automatically maintained as

the designs are completed.

Differential Pair Routing

Routing and editing differential pairs with Expedition is accomplished with speed and ease that changes the view of highspeed design. Pair spacing rules can be established by both layer and net class. If one trace is edited, the other trace in the pair automatically moves with it. Adjacent layer differential pair routing capabilities add another valuable option for routing critical signals on a dense PCB.

Dynamic Hazard Review

Design hazards are dynamically displayed and may be individually selected and colored for easy identification. When a hazard is fixed, it is dynamically removed from the hazard list.

Bus Routing

Auto-routing is rarely used on dense, highly bus-structured PCBs, as manual routing can produce denser, more manufacturable and aesthetic results. How ever, manual routing can

be very time consuming and tedious. Skillful de sign ers or engineers determine the top ology of the buses and their assigned planes to meet high speed constraints. Expedition

Enterprise has unique technology that combines the skill of the designer and engineer with the speed of autorouting, eliminating the tedium, instead focusing on producing a better design.

Topology Planner provides an interactive method of defining the topologies of buses,

assigning them to planes and specifying many specialized rules. This plan is saved with

the design data and can be modified. Topology Router can then be executed to auto-route

the interconnects following the plan, eliminating tedious trace digitizing. The results mimic

those of a skilled designer, yet significantly reduce design cycle times and improve productivity.

Embedded Passive Design

As ICs and FPGAs increase in speed and density, they require more passive components (resistors and capacitors) — some may need several hundred. Implementing these as

embedded components versus discrete SMDs can significantly reduce board sizes and improve performance.

Expedition Enterprise provides a complete solution: trade-off tools decide which components to implement in embedded versus discrete based on board size and cost, passive material choices, automatic synthesis driven by material supplier’s libraries, and full manufacturing data generation. The result is automation of a task that could take weeks of manual effort.

Expedition Enterprise - Printed Circuit Board Software (Part 1)

2012-06-11T10:25:00.002-07:00

Expedition PCB is the technology leader for the creation of today’s most complex PCB designs.
Designing a product requires more than just a great PCB layout tool – you need tightly integrated PCB design software. Expedition Enterprise provides this high level of integration, enabling all team members to work collaboratively and more efficiently.

Tightly Integrated Flow

It's Expedition™ Enterprises tightly integrated design environment, industry unique technologies and its ability to meet the needs of mid-sized to large electronics companies that really sets it apart from the competition. It features a common database and user interface, with rules that eliminate the burden of managing multiple tools to complete a design. Its electrical and manufacturing constraint management system, and design data and library management provides support

for local or globally dispersed design teams to leverage their resources and reduce design cycle times.

Data integrity is constantly maintained — from concept to manufacturing. Expedition Enterprise is integrated with DMS™ (Data Management System) and CES (Constraint Editing System), providing a central infrastructure for component libraries, design data versioning and management, design reuse, where used, entry and management of high speed and manufacturing rules, and integration with corporate PLM systems. Once the design is complete, integration with

manufacturing output tools ensures that the integrity of the design is maintained.

Industry-UniqueTechnologies

While tight integration provides a seamless environment to support the PCB systems design team,

Expedition Enterprise has extended beyond the classical definition of a PCB design solution and

con tains many industry-unique technologies. These technologies address the most advanced business needs of an electronics company enabling the development team to deliver a more competitive product to market faster and at reduced cost. These unique technologies fall into three categories: concurrent (parallel vs. serial) product development processes; use and analysis of the most advanced IC and PCB fabrication technologies; and, collaboration between the PCB designer and other disciplines in the product development process.

System Definition

Design Entry

DxDesigner provides a complete solution for design creation, definition and reuse. It provides everything needed for circuit design and simulation, component selection and library man -

agement, signal integrity planning, project management and team-based design.

With DxDesigner, multiple engineers can work on the same design concurrently without a classical split and re-join process. Changes made by one engineer are immediately reflected

in the master database being viewed by the team so interfaces between the schematic sheets are kept in sync. In addition to classical schematic symbols, DxDesigner supports spreadsheet input

of component and interconnect data. This is especially important to accommodate very-high-pin-count packages, where a schematic symbol would occupy several pages.

DxDesigner is also integrated with product lifecycle management systems, making design data, PDF schematics, and BOMs available throughout the company. It also has a centralized,

Internet-based library so only one version of the corporate library needs to be maintained.

Constraint Definition

Expedition Enterprise understands and follows an extensive set of high speed and manufacturing constraints (rules). These constraints are set either by engineer direct entry or by interfacing from pre-layout high speed analysis and are obeyed throughout the layout and verification steps to insure correct by design results.

The Constraint Editor System™ (CES) provides a fully integrated, constraint-driven design methodology that reduces design costs and time-tomarket by automating design rules

communication and eliminating unnecessary PCB prototypes and re-spins. And, like DxDesigner, multiple engineers can input and edit constraints concurrently without a divide and rejoin methodology that can be error prone and time consuming. Edits are viewed by the team as they are made, in real time.

CES provides common constraint entry for manufacturing and elec trical and physical high-speed

rules. CES has an easy-to-use spreadsheet-like GUI guided by the design database with cross probing to the schematic and layout.

• Rules are preserved on net renames, connectivity additions/removals, pin and/or gate swaps,

and stackup changes.

• The GUI offers easy differential pair creation, parallelism rules entry and pin-pair creation.

• Hierarchical constraint entry enables simple assignment of complex topologies with filtering

and sorting.