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मलाई त्यो बेलाको याद आयो

2016-01-07T06:09:00.005-08:00

मलाई त्यो बेलाको याद आयो

एक जना मेरो बाल्यकालको भुटानी शरणार्थी साथी, जसलाई लिएर म टिमाई शिविरबाट धुलाबारी हुँदै भद्रपुरसम्म लिएर जान्थें । पछि कलेज भद्रपुरमा सँगै आइएस्सी पढ्दा पनि साइकलमा म उसकोसम्म पुगेर लिएर जान्थें ।

यथार्थ कुरा तितो हुन्छ, त्यसबेला साइकल किन्नु त के सोच्नु पनि उसको लागि पाप हुन्थ्यो । आफ्नो पनि सम्पत्तिको नाममा त्यही साइकल थियो ।

त्यसबेला ऊ भन्थ्यो, हेर मित्र आफ्नो त यस्तै हो भुटान फर्काउने हैन, सधैं भरि यु एन एच सी आर ले दिएको अमेरिकाको दाल र चामल बाहेक कुनै आय छैन । सधैं भरि मलाई घुमा ल ।

साथी त्यो दिन अत्यन्त दुःखी भएको थियो जब मेरो साइकल सैलुनमा केश काट्न सँगै गएको बेला हराएको थियो ।

फेरि ऊ खुशी भएको थियो जब मैले उसलाई नै सम्झेर घर गएको बेला आँट गरेर अर्को साइकल किनाउन सफल भएको थिंए ।

पछि ऊ मलाइ भन्ने गथ्र्यो, मेरो पनि कुनै न कुनै दिन साइकल किन्ने इच्छा छ ।

जब हाम्रो इन्टर सकियो, म अन्तै गएर पढें पनि उसकै याद आउँथ्यो ।

अहिले ऊ अमेरीकामा छ, आफ्नै कार छ, श्रीमतीको बेग्लै कार छ । फेसबुकमा हेर्छु छ छ महिनामा उसको नयाँ कार । सपिंग मलमा खिचेका फोटोहरु ।

अहिले मैले भरखर लगातार ११ वर्ष कुदाएर स्प्लेन्डर बेच्दैछु एउटा सेकेण्ड ह्याण्ड डिस्कभर पाएर । त्यो पनि तेल हाल्नलाई पैसा छैन भए पनि किन्नै पाइन्न ।

म समयलाई सोच्छु, अनि आफ्नै साथीलाई सम्झदैं खुशी हुन्छु ।

सबैलाई मेरो एउटा साथी अमेरिकामा छ भन्ने गर्छु ।

तर अचेल ऊ व्यस्त हुन्छ, उसकै अनुसार, अनि म पनि उसलाई डिस्र्टव गर्दिन ।

आज म श्रीमतीको अप्रेशन गर्नको लागि पैसा खोज्दैछु । कमाउँछु र तिर्छु भन्ने मनमा विश्वास छ । खोज्छु, केही रकम जुटे पनि पुरा पैसा नपुग्ने भयो । म अब त्यही साथीलाई सम्झन पुग्छु । अनि म्यासेज लेख्छु फेसबुकमा । धेरै पटक लेखेपछि रिप्लाइ आयो, ओके ।

ऐले हेर्छु म्यासेन्जरमा उसको नामको ठाँउमा फेसबुक युजर भनेर आँउछ, अनि म्यासेज कुड नट वि सेन्ड भन्छ, राम्ररी हेर्छु उसलाई अब म फेसबुकमा जति नै सर्च गरेपनि पाउँदिन । बुढीको अपरेशनमा जान ढीला भइसके पनि उसले जाने वित्तिकै अहिलेसम्म एकपटकमात्र पठाएको कोठामा झुण्डिरहेको कपाल नहुनेले लगाउने विग हेर्छु ।

झगडाको ओखती

2015-12-01T04:42:00.004-08:00

झगडाको ओखती

एउटा परिवार सानो थियो, बच्चा थिएन, सुखी थिए दुईजनामात्र । विस्तारै दुवैको मन मुटाव हुन थाल्यो । बुढा बुढीको झगडा परालको आगो नै त हो । तर त्यो परालको आगोले विस्तारै विरस्तारै अरूतिर पनि डढाउन थाल्यो । दुई मिनेटको झगडा दुई घण्टा हुँदै विस्तारै दुई दिनसम्म पनि बोलचाल हुन छाड्ने अवस्थामा पुग्यो । पछि त कुनै ठूलो समस्या आइपरेमामात्र दुइजनाको बोलचाल हुने स्थिति आयो ।

यस प्रकारले झगडा भइरहँदा, दुवै जना दिक्क मान्न थाले । कारण ठूलो हुँदैनथ्यो, जस्तो कि, श्रीमानले बिहान भनेको कुरा नल्याउँदा बेलुकी श्रीमती रिसाउने, श्रीमतिले शब्जीमा नुन कम गर्दा श्रीमानले खानै नखाने ।

अब त अति भयो, श्रीमान श्रीमतीको झगडा न हो आफैं मिलाउनु पर्छ भनेर श्रीमानले पहल गरे तर फेरि सानो निहुँमा श्रीमतीले घुर्काए पछि श्रीमान पनि जंघिए । अब आफैं मिलाउन सकिएन भनेर छिमेकी गुहारे । छिमेकीले शुरूमा राम्रै भने पनि विस्तारै एक अर्काबीचमा नुन छर्किने काम मात्र गर्न थाले । अब झगडाले छिमेक, टोल हुँदै पुरै गाउँ नै हल्लाउला जस्तो अवस्था आउन थाल्यो ।

संयोगवश त्यस गाउँमा एकजना लोकप्रीय ज्योतिषी आए । श्रीमानले सोचे अब यिनले नै समस्या हल गर्दछन् । श्रीमान सुटुक्क ज्योतिषीकोमा गएर बेलीबृतान्त लगाए । ज्योतिषीले न त बुटी दिए, न त कुनै भविष्य हेरे । अनि सुन्ने बित्तकै भने - "तपाई श्रीमतीको छेउमा पर्ने बित्तिकै 'येन' भन्नुहोला, यदि उहाँले पनि 'जेन' भन्नु भयो भने तपाईंको समस्या समाधान हुन्छ । तर एउटा शर्त छ, बुढी रिसाएको थाहा पाउने बित्तिकै तपाईं चुप लाग्नुहोला । तपाईकी श्रीमतीले ऐना हेरिन भने सोच्नुहोस् तपाईको समस्या गयो । तर जबसम्म बुढी ऐना हेरिरहनुहुन्छ तबसम्म नबोल्नु होला ।" ती श्रीमान हेरूम् न त भन्दै गए ।

ज्योतिषीले ती महाशयका श्रीमतीलाई सुटुक्कै डाक्न पठाए । ती ज्योतिषीले महिला आउने बित्तकै भने - "तपाईंको मा "गाल गर्व योग" रहेछ, अब तपाईंलाई म केही मन्त्र पढिदिन्छु । तपाईं घर जाने बित्तकै तपाईंका श्रीमानले 'येन' भन्नुहुन्छ, तपाईं तत्कालै 'जेन' भन्नुहोला । अनि अबदेखि बुढाले जे भने पनि नकारात्मक कुरा नबोल्नु होला गएर ऐना हेर्नुहोला, रिस उठुन्जेल तपाईं आफूलाई ऐनामा हेरिरहनु होला । यदि बुढाले नकारात्मक कुरा गरे भने रिसाउन पाइन्छ । तर बोलेनन् भने तपाईं ऐना हेर्ने कामलाई निरन्तरता दिनुहोला ।" श्रीमती केही हुन्छ कि भनी त्यहाँबाट विदा भइन् ।

बेलुकी जब श्रीमान कामबाट लखतरान भएर घर आइपुगे, बोलचाल नभएको ठ्याक्कै हप्ता दिन पुगेछ सम्झे । श्रीमतीले खाना बनाउने लगायत घरका काममा चाहिं कन्ज्युस्याइं गर्दिनथिन्, तर खाना बनाएर थाल बजेको आवाजले नै खाना खान बोलाएको बुझेर श्रीमान गएर खाना खानु पर्थ्यो । श्रीमती भान्साघरमा थिइन् । लाज लाग्यो अघि पर्न । तर मन बाँधे र श्रीमतीको अगाडि गएर 'येन' भने । श्रीमतीले तत्कालै जवाफ फर्काइन्,

'जेन!'

अब श्रीमान बोल्न सकेनन् । लाज लाग्यो । ज्योतिषीले भनेको कुरा पुग्यो । नयाँ जिन्दगीको आभाष भयो । बेडरूममा गएर लडे । श्रीमतीले पनि सोही कुरा सोचिन् । उनलाई पनि नयाँ जीवन पाएको अनुभव भयो । सोच्दा सोच्दै खाना केही डढ्यो । अब सोचिन् फेरि अर्को लफडा । तर ज्योतिषीमा विश्वास जाग्यो । नजागोस् पनि कसरी जे भनेको त्यहि पुग्यो । अनि जति रिसाए पनि म रिसाउँदिन भन्ने सोचिन् । र नबोली बस्ने विचार गरिन् ।

खाना खाने संकेत, एक हप्ता देखिको । थाल बज्यो । श्रीमानले टेलिभिजन अफ गरे । खाना खानको लागि तयारी । मोबाइलमा डाटा पनि अफ गरे ।

खाना खान लाग्दा देखे, श्रीमतीको थालमा डढेको भात छ । आफ्नोमा राम्रो मात्र छ । ज्योतिषीले काम त गरे । तर माया लाग्यो । अनि थाल साटे । श्रीमतीले फेरि थाल साटिन् । उनलाई पनि श्रीमानको धेरै माया जाग्यो । फेरि यहि क्रम दोहोरियो । श्रीमतिले नकार्न खोज्दा खोज्दै एउटा थाल भुंइमा झ-यो ।

अब श्रीमतीलाई रिसको पोकोले घे-यो । बोल्नमात्र लागेकी थिइन्, झल्यास्स ज्योतिषीको कुरा याद आयो । बोलिनन् । ऐना गएर हेर्न थालिन् । बुढाले सोचे ज्योतिषीले भनेको पुग्यो । बोलेनन् । गएर कुकरमा केही चामल हालेर फेरि पकाउन थाले । श्रीमतीले एकछिन चुप लागेपनि केही आवाज आएको सुनेर किचनमा आइन् । हेरिन् बुढाको करामत । खासै घरको काम नगर्ने बुढाले खाना पकाएको देखेर दया लाग्यो । माया पलायो । उनको रिस त उहिल्यै झरिसकेको थियो ।

अब बुढीले ऐना हेर्न छाडेको थाहा पाएपछि बुढाले बुझे, बुढीको रिस शान्त । अनि विस्तारै बुढीको छेउमा गएर भने -

"मलाई माफ गर बुढी" ।

बुढाको यो शब्दले श्रीमतीको जिउ नै सिरिङ्ग भएर आयो । अनि डाँको छाडेर रून थालिन् । श्रीमानलाई श्रीमतीको अत्यन्त माया लागेर आयो । दुवै एक अर्कामा समेटिए ।

त्यस दिन पछि उनीहरूको जीवनमा कहिले पनि भुकम्प त आएन तर सुनामी चाहिं अवश्य आयो ........

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अब कसरी सुनामी आयो भन्ने कुरा म तपाईंहरूलाई अर्को पल्ट भन्नेछु ।

एउटा बिखण्डनकारीको कथा

2015-10-18T05:24:00.000-07:00

एक जना विखण्डनकारी नेता मरेपछि स्वर्गको ढोका ढक्ढक्याउँछ।

यमराजः ए को हो त्यहाँ?

विखण्डनकारीः म प्रदेशको नेता हुँ भगवान ।

यमराजः स्वर्ग जाने के राम्रो काम ग-याै?

विखण्डनकारीः मैले छिमेकी देशकाे लागि राम्रो काम गरेको छु ।

यमराजः हैन तेरो कारणले ५० जनाभन्दा बढीको मृत्यु भएकाे छ । तँलाइ त नर्कमा हाल्नु पर्छ । जा त्यतातिर ।

विखण्डनकारीः हैन महाराज, मैले त राम्रो काम पनि गरेको छु ।

यमराजः के गरिस् त राम्रो काम?

विखण्डनकारीः मेरो एकपटक २ रूपैंयाको नोट झरेको थियो । एउटा भिखारीले टिपेछ पछि माग्दा दिएन । खाअोस् न त गरीबले भनेर छाडिदिएँ ।

यमराजः अनि अरू?

विखण्डनकारीः एकपटक एक रूपैंयाको सिक्का धोतिबाट कतिखेर झ-यो, थाहै भएन । शायद त्यो कुनै गरीबले नै टिप्यो होला, धनी मानिसले त १ रूपैंया पक्कै टिपेन ।

यमराजः तँ जस्तै भएको भए त मुखले टिप्थिस् होला ।

विखण्डनकारीः हजुर टिप्थे महाराज?

यमराजः ए चित्रगुप्ता, यसको ३ रूपिंया फर्काइदेऊ अनि नर्कमा खाँदिदेऊ ।

नोटः यसबाट के शिक्षा पाइन्छ भने अहिले सरकारले त केही गर्न नसक्ला तर आन्दोलनको नाममा कैंयाैं मानिसलाइ अाहुति दिन बाध्य बनाइ आफ्नो स्वार्थ पूरा गर्ने अवश्य नर्कमा जान्छ । मरेर लानु केही छैन ।

भूकम्पले कतिको क्षति गर्छ ?

2015-04-30T03:50:00.000-07:00

हामी भूकम्प यति रेक्टर स्केलको अाएछ भन्छाैं । कति रेक्टर स्केलको प्रभाव कति हुन्छ भन्ने कुरा यकिन गरेर भन्न नसकेता पनि विभिन्न वेवसाइट तथा स्रोतकाे अाधारमा निम्न कुराहरूको निचोड पाइयो ।

गत २०७२ बैशाख १२ गते शनिवार नेपालमा करीब ८० वर्षपछि ठूलो भुकम्प अायो । तर यो कतिको ठूलो थियो त ?

अमेरिकन भूगर्भ सर्वेक्षण (The US Geological Survey (USGS)) को मापन अनुसार नेपालमा ७.८ रेक्टर स्केलकाे भूकम्प अाएकाे हो जबकि चिनी भूकम्प नेटवर्क केन्द्र (China Earthquakes Network Center (CENC)) यहि भूकम्पलाइ ८.१ म्याग्निच्यूडको मान्दछ ।

झट्ट हेर्दा ०.३ म्याग्निच्यूडको फरक केहि देखिन्न तथापि सानो म्याग्निच्यूडको फरकले पनि धेरै ठूलो असरमा फरक पार्न सक्दछ भनेर विभिन्न एजेन्सीहरूले भन्ने गरेका छन् । यो ०.३ को वृद्धि भनेकाे २.८ गुणा ठूलो भूकम्प अाउनु हो, यदि हामीले चिनको तथ्यांकलाइ मान्याैं भने ।

यस्तो किन हुन्छ त ? किनभने भूकम्पको मापनलाइ मान्याै भने । भूकम्पको मापन रेखीय अाधारमा हुन्न । यो अंकगणितीय सेरिजमा हुन्न, जबकि यसको मापन लगारिद्मिक सेरिजमा हुने गर्दछ ।

जस्तैः एउटा २.० रेक्टर स्केलकाे भूकम्प भन्दा ४.० रेक्टर स्केलको भूकम्प एक हजार गुणा ठूलो हुन्छ ।

वैज्ञानिकहरू logarithmic scale को प्रयोग गरी ठूलो र सानो स्केलको मापन गर्ने गर्दछन् । भूकम्पविद चार्ल्स फ्रान्सिस रिक्टरका अनुसार सानो र ठूलो स्केलको बीचमा अत्यन्त धेरै फरक हुन्छ ।

यसलाइ तलको प्रस्तुतिद्वारा प्रष्ट पार्न सकिन्छः

र ९.० रेक्टर स्केलको भूकम्प यो भन्दा १०० गुणा ठूलो हुन्छ ।

साभारः विभिन्न वेवसाइटहरू ।

Top Optical Illusions

2014-09-20T03:56:00.001-07:00

Here are Some Optical Illusions which are categorized on the following basis:

Motion Illusions:

ROTATING CIRCLES

You are completely screwed...

ROTATING CIRCLES -2

Believe, it is a static picture.

DOTS IN THE EDGE OF THE SQUARE

MOVING PATTERNS

MOVING ROCKETS

MOVING CAVES

HERE ARE FOUR PERFECT CIRCLES

ALL LINES ARE PERFECTLY PARALLEL TO EACH OTHER

Artistic Illusions:

ONLY THE SKETCH FROM COLOR PENCILS

A 3D HAND MADE BY PENCIL

EINSTEIN LIKES PERRIER

FACE AND ART, DIFFERENTLY ...

TWO FACES AND THE SEA

AN OLD MAN OR A KNIGHT RIDER

TREES OR BUILDINGS ???

FACE MADE BY LEAFS

A VERY POPULAR TWO FACE ILLUSIONS - AN OLD LADY OR A YOUNG LADY

CREATING LUNAR ECLIPSE

ANOTHER 3D HAND MADE BY PENCIL

A REAL FACE COLORED BLACK TO MAKE ANOTHER FACE

ANOTHER TWO FACE ILLUSION - A SEXOPHONE ARIST OR A MAN

FACE MADE BY TREES

ANOTHER FACE ILLUSION

FACE MADE BY LEAVES

ANOTHER TWO FACE ILLUSION

3D Illusions:

A REAL WALL AND TREE - THE ONLY ARTIFICIAL IS THE ART

A PENCIL ART

ANOTHER PENCIL ART

A REALISTIC IMAGINARY

MORPHING IN REALITY

AN IMPOSSIBLE CONSTRUCTION

ANOTHER 3D ART BY PENCIL

A PENCIL ART AND THE DOLPHIN

AN ENGINEERING MAGIC

ANOTHER PENCIL ART

ANOTHER PENCIL ART AND ARTIST

ANOTHER PENCIL ART AND HAND

A TATTOO ART

AS YOUR SIGHT

PICTURES SNAPPED AT THE GOOD TIME:

LOOK AT THE BABY NOT AT THE COUPLE

A LADY GULLIVER AND TWO LILLIPUT

A LADY STANDING OF A SEA SHORE

A LEAF OR A LIP ?? BY THE WAY, VERY BEAUTIFUL ...

SMOKING IS INJURIOUS TO SKY.... CLOUD OR SMOKE??

WHERE ARE HER LEGS???

FLOATING STAGE

GIANT HAND - THE FIRST ONE IS REAL AND THE ANOTHER ONE IS GRAPHICS

GRABBING THE SUN

GULLIVER PLAYING WITH LILLIPUT

A SIMPLE HOVERCRAFT - NO.. NO.. ITS JUST A PHOTOGRAPHIC ILLUSION

PEOPLE IN THE ROAD OR JUST A PHOTO ...

PUSHING THE SUN TO SET

REAL CARS OR TOY CARS..

SHE HAS A LONG BLACK BEARD

WATERFALL IN A CUP

GRAPHICS - MADE BY COMPUTERS:

A MAN OR A LADY ???

FAKE EARTHQUAKE

A GRAPHICS BY MEER SHARMA

IMPOSSIBLE DICE STRUCTURE

SKIING ON HANDKERCHIEF

TAKING THE ROAD ALONG

ANIMAL RELATED ILLUSIONS:

ALPACA OR A LADY ???

CAT AS A BEARD OF A GIRL

CAT INSIDE HELLO KITTY!!!!!

CAT OUTSIDE BAG ...

COUNT THE LEG OF ELEPHANT

FROG OR A HORSE HEAD ???

A HUMAN GIRAFFE

RABBIT OR A DUCK - ILLUSTRATIONS

RABBIT OR A DUCK - LINE ART

RABBIT OR A DUCK - SCULPTURE

RABBIT OR A DUCK - SKETCH

RABBIT OR A DUCK - PHOTO

RABBIT OR A DUCK - PENCIL ART

TWO ZEBRAS ILLUSIONS

Thank you for visiting the blog...

Free Phone Calls in Nepal

2011-11-05T10:26:00.000-07:00

Several VOIP call providers are scheming the free calls to attract the cutomer, some of them provide more realistics and strong free calls. Free calls for India, Nepal, Sri Lanka, Maldives, Bhutan, Bangladesh, Pakistan, Afghanistan and other country are being provided from when the VoIP came in to be in the market.

On this page you can find a list of links regarding free phone calls online. Following those links you can make free phone calls from PC to phone over internet to various international and mobile numbers.

DSG Technology - Offers Internet telephony devices. Includes information about products and services.

Go2Call.com - Internet phone service offering low-cost PC-to-phone calls and international calling plans.

My Phone Free - Offers Voice over Internet phones. Includes details of products.

Net2Phone - Voice calls from your PC to any phone.
Astound - Web conferencing, online meetings.
CallSite - Web-based customer service and call center.
Spiderphone - Voice conference calls using either telephone (based on a New York area code) or PC.
Webex - Real-time meetings right through your Internet browser.
BuddyTalk by InnoMedia - A 4-in-1 Internet voice communication tool for staying in touch with associates while online. Provides downloads of free software.
Callwave - Internet Answering Machine software uses Busy Call Forwarding to answer and record callers messages while you are on-line.
Internet Call Manager - An easy and inexpensive way to stay on-line as long as you want and never miss a phone call.
Pagoo - Answer calls and make long distance phone calls while online.
Paltalk - Operates with different chat systems such as ICQ and AIM, and enables live video calls. [Windows]
PC-Telephone - Make free pc-to-pc and cheap pc-to-phone and pc-to-fax calls over the Internet and ISDN/PSTN telephone networks. Use your computer as internet telephone, ISDN phone, answer phone, caller id, fax software and voicemail client.
VocalTec - Enables voice and multimedia communications over packetized networks, the Internet and intranets.
BuzMe - Internet call waiting, voice mail.
YAC - UK-based call forwarding service for fax, voicemail.
Adore Infotech Pvt. Ltd - New Dehli, India-based B2B VoIP Solutions provider offering postpaid/prepaid calling card billing, origination/termination billing, Softphone, Softswitch and hardware.
Asterisk - An open source telephony switching and private branch exchange service. Allows peer-peer calling using a variety of voice over internet protocols.
Asylum Telecom - VoIP provider for business and residential customers. No service charges.
AT&T CallVantage Service - Broadband phone service from AT&T. Consumer VOIP plans includes unlimited calling within USA and Canada.
BroadVoice - VoIP provider offers full feature set with voice mail, caller ID, etc. Requires supplied broadband phone adapter.
Callconomy Solutions - Provides international VoIP call shop services. Includes FAQ.
CallDaddy - Pre-paid VOIP services. H.323 IP phone, gateway, gatekeeper, NetMeeting or any other H.323 compliant terminal necessary.
Calleveryone.com - A full featured VoIP/broadband phone to phone service primarily for calls within the US.
Callserve - PC-to-Phone service for outbound calls only. Software download required.
Calltower, Inc. - US-based B2B VoIP provider offers enterprise class hosted VOIP PBX Systems.
Click4netphone - Pre-paid Internet Telephony Services via VOIP.
Cliconnect Internet Telephony - Offers a variety of domestic and international VoIP plans including unlimited calls to individual countries for fixed fee.
CTL Inc. - CT-based, manufacturer of VOIP-based voice-messaging systems utilizing Session Initiation Protocol (SIP) and Host Media Processing (HMP).
Dialpad Communications, Inc. - Offers monthly billing and pre-paid PC-to-Phone VoIP services. Also supports broadband telephone adapter for use without PC.
Dow Networks - Provides Voice over IP and telecom service to international clients.
Efonica - Prepaid system for PC-to-phone and web initiated phone-to-phone using VoIP.
Evolve Communications - Vancouver, Canada based provider. Includes rate plans, description of technology, and FAQ.
Free World Dialup - Community network allowing calls to toll free numbers in the US, Japan, UK and Netherlands. Peer-peer calling to other members.
iConnectHere - Offers VoIP-based PC-to-Phone, Broadband Phone and Calling Card services.
IPCB.net - Softswitch services such as routing, billing as well as VoIP call termination.
IPgrade - B2B Wholesaler of VoIP-based Phone-to-Phone, PC-to-Phone, DDI, VPN, CRM, prepaid calling cards, and broadband services.
ISPhone Inc. - Wholesale voice over internet services.
Lingo, Inc. - Residential and business plans offering unlimited calls to U.S. and Canada using any phone with provided adapter. Plans available for unlimited calls to Europe, Asia, Mexico. Includes basic and advanced calling features, free fax line, and choice of local number portability or selecting from 220 U.S. area codes or 15 countries.
MeaPhone - PC to phone service based in Thailand. Software download required.
Mobif - Malaysian based VoIP provider offering adaptor and softphone products available through resellers.
My VoIP Store - Australian-based (Brisbane) VoIP consultant and B2C e-commerce site for VoIP hardware.
Mywebcalls - PC-Phone or device-to-phone United Kingdom based service.
On Instant - PC-to-PC only isntant messaging service with VoIP features including live voice, voicemail and CRM tools.
One Unified Net - A communications infrastructure provider includes IP systems, services, softswitches, and phones.
OneAccess Networks - Broadband access solutions including IP routers, voice over IP (VoIP) and voice over DSL (VoDSL) solutions, concentrators and networks adapters.
Onramp Access - Provides business oriented VoIP services across fully managed T1 connections.
Packet8 - Voice over internet direct dial service without a PC. Owned by 8X8, Inc.
PC2call - PC-phone internet voice service provider based in the United Kingdom.
PingTone - Business VoIP provider geared toward companies deploying Cisco Systems IP Phones.
Pulse TeleSystems - Offers VoIP services: phone-to-phone, device-to-phone and PC-to-phone in India, Canada, France, Germany, Malaysia, Nepal, Srilanka and UK.
Reach Out IT, Inc. Technology Outsource - VoIP telecom consultants serving Massachusetts, Rhode Island and Connecticut. Implements Linux-based open source Asterisk PBX systems.
RhinoBell - PC to phone, phone to phone using device, voice over internet calls.
SCS Telecom GmbH - German-based B2B VOIP provider offers services to local call-shop owners and calling card telcos.
SIPphone Inc. - Peer-peer calling service. Requires SIP adaptor and phone.
Skynet Telesystems - Broadband VoIP and dialaround system offers calls to select foreign countries as part of plan.
Skype - Peer to peer internet voice service. Mac, Windows and Linux versions available. Users may call landlines and cellphones for a fee; users may call each other for free.
Snaptel Communications - Offers pre-paid PC to Phone VoIP services worldwide.
SunISP - SIP based VoIP phones and service plans with focus on Caribbean and South America.
Super Technologies, Inc - Offers flat-rate unlimited calling within USA & Canada. Uses analog telephone handsets via broadband telephone adapter.
Syberdyne Systems - Edmonton, Alberta Canada-based corporate VoIP solution provider.
Talafone - Canadian based provider of PC-to-phone and IP phone services and hardware.
Texas Instruments VoIP Solutions - B2B manufacturer of VoIP equipment including IP Phones, VoIP Gateways, High Density Gateways, voice-enabled Cable & DSL Modems.
TMCNet on the web - Instustry trade news publisher featuring VoIP news, VoIP forum (including termination routes), call center news, CRM, telecommunications news, and self-produced VoIP tradeshows.
UNIVoIP - Residential and business VoIP services. Monthly and annual plans available.
v59 - Use dial-up and talk everywhere with our VoIP service
Vanguard Networks Pte Ltd - Singapore provider of VoIP services including video conferencing, international connectivity, bandwidth management and electronic whiteboard.
Vinculum Communications - VoIP wholesale international termination services provider.
VocalNet - VoIP provider offering residential and business plans.
Voice over IP Calculator - Free VoIP resources, including online bandwidth calculators, white papers, books, a directory and a forum.
Voiceglo - VoIP service offering free and paid plans. Some plans require phone adapter or USB phone with an Internet-connected computer.
VoicePulse - VoIP service offering phone-to-phone with device. Various features and calling plans.
Voipia Networks, Inc. - Business & Residential VoIP programs; software solutions for Call Centers.
VoIPOnline - Voice-over-IP news, supplier directory and chatrooms for discussing related industry topics.
VoipXchange - B2B VoIP exchange platform for carriers to buy/sell excess capacity on VoIP networks covering call termination in 250+ countries. No-fee membership required.
Vonage - Provides voice over internet local dial-tone service. No PC required. Uses analog telephone with broadband telephone adapter.
VoX Communications - Residential, business and wholesale provider of VoIP services.
Voxilla - News, forums, reviews and guides for IP telephony devices and services.
WERCS Communications - US-based B2B VoIP telephony provider offering converged ip voice and data network services to customers in Wyoming and Rocky Mountain region.
WhistlerTel Inc. - US provider of broadband internet phone service and voice over IP (VoIP) solutions.
World On IP - Italy-based B2B VoIP provider offering hardware to set-up wireless VoIP networks.

Top Gadgets in 2011

2011-10-21T12:54:00.000-07:00

In my choice, the top gadgets in 2011 are:

Apple iPhone 4s
With 8 megapixels and all-new optics, this just might be the best camera ever on a mobile phone. It just might be the only camera you’ll ever need. And if you think that’s amazing, wait until you see your photos.

Samsung Galaxy S2
8 MP camera with flash, Android OS, Sensors, High Screen Resolution

Amazon Kindle
Review and remember more of what you read.
Follow people of interest to you to see their Public Notes.
Manage your books, highlights, and notes.

MOTOROLA-XOOM
A super smart phone

Panasonic Smart VIERA
Experience the very best in 2D / 3D picture quality and design with the What Hi-FI? Television of the year 2011. Introducing the Smart Viera, the Smart TV from Panasonic – available in a range of 32”-42” LED and 42”-65” Neo Plasma screens.

3D Transformation: Introduction

2011-10-21T12:32:00.001-07:00

3D-Transformation

Manipulation, viewing, and construction of three-dimensional graphic images require the use of three-dimensional geometric and coordinate transformations. In geometric transformation, the coordinate system is fixed, and the desired transformation of the object is done with respect to the coordinate system. In coordinate transformation, the object is fixed and the desired transformation of the object is done on the coordinate system itself. These transformations are formed by composing the basic transformations of translation, scaling, and rotation. Each of these transformations can be represented as a matrix transformation. This permits more complex transformations to be built up by use of matrix multiplication or concatenation. We can construct the complex objects/pictures, by instant transformations. In order to represent all these transformations, we need to use homogeneous coordinates.

Hence, if P(x,y,z) be any point in 3-D space, then in Homogeneous Coordinate System, we add a fourth-coordinate to a point. That is instead of (x,y,z), each point can be represented by a Quadruple (x,y,z,H) such that H≠0; with the condition that x1/H1=x2/H2; y1/H1=y2/H2; z1/H1=z2/H2. For two points (x₁, y₁, z₁, H₁) = (x₂, y₂, z₂, H₂) where H₁≠ 0, H₂≠ 0. Thus any point (x,y,z) in Cartesian system can be represented by a four-dimensional vector as (x,y,z,1) in HCS. Similarly, if (x,y,z,H) be any point in HCS then (x/H,y/H,z/H) be the corresponding point in Cartesian system. Thus, a point in three-dimensional space (x,y,z) can be represented by a four-dimensional point as: (x’,y’,z’,1)=(x,y,z,1).[T], where [T] is some transformation matrix and (x’,y’z’,1) is a new coordinate of a given point (x,y,z,1), after the transformation.

3D Transformation

2011-10-21T12:21:00.000-07:00

Methods for geometric transformations and object modeling in 3D are extended from 2D methods by including the considerations for the z coordinate.

Basic Transformations

Translation

We translate a 3D point by adding translation distances, tx, ty, and tz, to the original coordinate position (x,y,z):

x' = x + tx, y' = y + ty, z' = z + tz

Scaling

Scaling With Respect to the Origin

We scale a 3D object with respect to the origin by setting the scaling factors sx, sy and sz, which are multiplied to the original vertex coordinate positions (x,y,z):

x' = x * sx, y' = y * sy, z' = z * sz

Coordinate-Axes Rotations

A 3D rotation can be specified around any line in space. The easiest rotation axes to handle are the coordinate axes.

3D Rotations about an Axis which is parallel to an Axis

Step 1. Translate the object so that the rotation axis coincides with the parallel coordinate axis.
Step 2. Perform the specified rotation about that axis.
Step 3. Translate the object so that the rotation axis is moved back to its original position.

General 3D Rotations

Step 1. Translate the object so that the rotation axis passes through the coordinate origin.
Step 2. Rotate the object so that the axis of rotation coincides with one of the coordinate axes.
Step 3. Perform the specified rotation about that coordinate axis.
Step 4. Rotate the object so that the rotation axis is brought back to its original orientation.
Step 5. Translate the object so that the rotation axis is brought back to its original position.

THE ARCHITECTURE OF A MICROPROCESSOR

2010-11-25T07:27:00.000-08:00

A typical Microprocessor consists of the following interconnected functional units:

Registers
Arithmetic/Logic Unit (ALU)
Control Circuitry

1. REGISTERS:

Registers are temporary storage units within the Processor. Some registers, such as the program counter and instruction register, have dedicated uses. Other registers, such as the accumulator, are for more general purpose use.

Accumulator:

The accumulator usually stores one of the operands to be manipulated by the ALU. A typical instruction might direct the ALU to add the contents of some other register to the contents of the accumulator and store the result in the accumulator itself. In general, the accumulator is both a source (operand) and a destination (result) register.

Often a CPU will include a number of additional general purpose registers that can be used to store operands or intermediate data. The availability of general purpose registers eliminates the need to "shuffle" intermediate results back and forth between memory and the accumulator, thus improving processing speed and efficiency.

Program Counter (Jumps, Subroutines and the Stack):

The instructions that make up a program are stored in the system's memory. The central processor references the contents of memory, in order to determine what action is appropriate. This means that the processor must know which location contains the next instruction.

Each of the locations in memory is numbered, to distinguish it from all other locations in memory. The number which identifies a memory location is called its Address.

The processor maintains a counter which contains the address of the next program instruction. This register is called the Program Counter. The processor updates the program counter by adding "1" to the counter each time it fetches an instruction, so that the program counter is always current (pointing to the next instruction)

The programmer therefore stores his instructions in numerically adjacent addresses, so that the lower addresses contain the first instructions to be executed and the higher addresses contain later instructions. The only time the programmer may violate this sequential rule is when an instruction in one section of memory is a Jump instruction to another section of memory.

A jump instruction contains the address of the instruction which is to follow it. The next instruction may be stored in any memory location, as long as the programmed jump specifies the correct address. During the execution of a jump instruction, the processor replaces the contents of its program counter with the address embodied in the Jump. Thus, the logical continuity of the program is maintained.

A special kind of program jump occurs when the stored program "Calls" a subroutine. In this kind of jump, the processor is required to "remember" the contents of the program counter at the time that the jump occurs. This enables the processor to resume execution of the main program when it is finished with the last instruction of the subroutine.

A Subroutine is a program within a program. Usually it is a general-purpose set of instructions that must be executed repeatedly in the course of a main program. Routines which calculate the square, the sine, or the logarithm of a program variable are good examples of functions often written as subroutines. Other examples might be programs designed for inputting or outputting data to a particular peripheral device.

The processor has a special way of handling subroutines, in order to insure an orderly return to the main program. When the processor receives a Call instruction, it increments the Program Counter and stores the counter's contents in a reserved memory area known as the Stack. The Stack thus saves the address of the instruction to be executed after the subroutine is completed. Then the processor loads the address specified in the Call into its Program Counter. The next instruction fetched will therefore be the first step of the subroutine.

The last instruction in any subroutine is a Return. Such an instruction need specify no address. When the processor fetches a Return instruction, it simply replaces the current contents of the Program Counter with the address on the top of the stack. This causes the processor to resume execution of the calling program at the point immediately following the original Call Instruction.

Subroutines are often Nested; that is, one subroutine will sometimes call a second subroutine. The second may call a third, and so on. This is perfectly acceptable, as long as the processor has enough capacity to store the necessary

return addresses, and the logical provision for doing so. In other words, the maximum depth of nesting is determined by the depth of the stack itself. If the stack has space for storing three return addresses, then three levels of subroutines may be accommodated.

Processors have different ways of maintaining stacks. Some have facilities for the storage of return addresses built into the processor itself. Other processors use a reserved area of external memory as the stack and simply maintain a Pointer register which contains the address of the most recent stack entry. The external stack allows virtually unlimited subroutine nesting. In addition, if the processor provides instructions that cause the contents of the accumulator and other general purpose registers to be "pushed" onto the stack or "popped" off the stack via the address stored in the stack pointer, multilevel interrupt processing (described later in this chapter) is possible. The status of the processor (i.e., the contents of all the registers) can be saved in the stack when an interrupt is accepted and then restored after the interrupt has been serviced. This ability to save the processor's status at any given time is possible even if an interrupt service routine, itself, is interrupted.

Instruction Register and Decoder:

Every computer has a Word Length that is characteristic of that machine. A computer's word length is usually determined by the size of its internal storage elements and interconnecting paths (referred to as Busses); for example, a computer whose registers and busses can store and transfer 8 bits of information has a characteristic word length of 8 bits and is referred to as an 8bit parallel processor. An eight-bit parallel processor generally finds it most efficient to deal with eight-bit binary fields, and the memory associated with such a processor is therefore organized to store eight bits in each addressable memory location. Data and instructions are stored in memory as eight-bit binary numbers, or as numbers that are integral multiples of eight bits: 16 bits, 24 bits, and so on. This characteristic eight-bit field is often referred to as a Byte.

Each operation that the processor can perform is identified by a unique byte of data known as an Instruction Code or Operation Code. An eight-bit word used as an instruction code can distinguish between 256 alternative actions, more than adequate for most processors.

The processor fetches an instruction in two distinct operations. First, the processor transmits the address in its Program Counter to the memory Then the memory returns the addressed byte to the processor. The CPU stores this instruction byte in a register known as the Instruction Register, and uses it to direct activities during the remainder of the instruction execution.

The mechanism by which the processor translates an instruction code into specific processing actions requires more elaboration than we can here afford. The concept, however, should be intuitively clear to any logic designer.

The eight bits stored in the instruction register can be decoded and used to selectively activate one of a number of output lines, in this case up to 256 lines. Each line represents a set of activities associated with execution of a particular instruction code. The enabled line can be combined with selected timing pulses, to develop electrical signals that can then be used to initiate specific actions. This translation of code into action is performed by the Instruction Decoder and by the associated control circuitry.

An eight-bit instruction code is often sufficient to specify a particular processing action. There are times, however, when execution of the instruction requires more information than eight bits can convey

One example of this is when the instruction references a memory location. The basic instruction code identifies the operation to be performed, but cannot specify the object address as well In a case like this, a two or three-byte instruction must be used. Successive instruction bytes are stored in sequentially adjacent memory locations, and the processor performs two or three fetches in succession to obtain the full instruction. The first byte retrieved from memory is placed in the processor's instruction register, and subsequent bytes are placed in temporary storage; the processor then proceeds with the execution phase. Such an instruction is referred to as Variable Length.

Address Register(s):

A CPU may use a register or register pair to hold the address of a memory location that is to be accessed for data If the address register is Programmable, (i e., if there are instructions that allow the programmer to alter the contents of the register) the program can "build" an address in the address register prior to executing a Memory Reference instruction (i.e., an instruction that reads data from memory, writes data to memory or operates on data stored in memory).

2. ARITHMETIC/LOGIC UNIT (ALU):

All processors contain an arithmetic/logic unit, which is often referred to simply as the ALU The ALU, as its name implies, is that portion of the CPU hardware which performs the arithmetic and logical operations on the binary data .

The ALU must contain an Adder which is capable of combining the contents of two registers in accordance with the logic of binary arithmetic. This provision permits the processor to perform arithmetic manipulations on the data it obtains from memory and from its other inputs.

Using only the basic adder a capable programmer can write routines which will subtract, multiply and divide, giving the machine complete arithmetic capabilities. In practice, however, most ALUs provide other built-in functions, including hardware subtraction, Boolean logic operations, and shift capabilities

The ALU contains Flag Bits which specify certain conditions that arise in the course of arithmetic and logical manipulations. Flags typically include Carry, Zero, Sign, and Parity. It is possible to program jumps which are conditionally dependent on the status of one or more flags. Thus, for example, the program may be designed to jump to a special routine if the carry bit is set following an addition instruction

3. CONTROL CIRCUITRY:

The control circuitry is the primary functional unit within a CPU. Using clock inputs, the control circuitry maintains the proper sequence of events required for any processing task After an instruction is fetched and decoded, the control circuitry issues the appropriate signals (to units both internal and external to the CPU) for initiating the proper processing action. Often the control circuitry will be capable of responding to external signals, such as an interrupt or wait request An Interrupt request will cause the control circuitry to temporarily interrupt main program execution, jump to a special routine to service the interrupting device, then automatically return to the main program. A Wait request is often issued by a memory or 1/0 element that operates slower than the CPU. The control circuitry will idle the CPU until the memory or 1/0 port is ready with the data.

COMPUTER OPERATIONS

There are certain operations that are basic to almost any computer A sound understanding of these basic operations is a necessary prerequisite to examining the specific operations of a particular computer.

Timing:

The activities of the central processor are cyclical. The processor fetches an instruction, performs the operations
required, fetches the next instruction, and so on. This orderly sequence of events requires precise timing, and the CPU therefore requires a free running oscillator clock which furnishes the reference for all processor actions The combined fetch and execution of a single instruction is referred to as an Instruction Cycle. The portion of a cycle identified with a clearly defined activity IS called a State. And the inter vat between pulses of the timing oscillator is referred to as a Clock Period. As a general rule, one or more clock periods are necessary for the completion of a state, and there are several states in a cycle.

Instruction Fetch:

The first state(s) of any instruction cycle will be dedicated to fetching the next instruction. The CPU issues a read signal and the contents of the program counter are sent to memory, which responds by returning the next instruc tion word. The first byte of the instruction is placed in the instruction register. If the instruction consists of more than one byte, additional states are required to fetch each byte of the instruction. When the entire instruction is present in the CPU, the program counter is incremented (in preparation for the next instruction fetch) and the instruction is decoded. The operation specified in the instruction will be executed in the remaining states of the instruction cycle. The instruction may call for a memory read or write, an input or output and/or an internal CPU operation, such as a register to register transfer or an add registers operation.

Memory Read:

An instruction fetch is merely a special memory read operation that brings the instruction to the CPU's instruction register. The instruction fetched may then call for data to be read from memory into the CPU. The CPU again issues a read signal and sends the proper memory address; memory responds by returning the requested word. The data received is placed in the accumulator or one of the other general purpose registers (not the instruction register).

Memory Write:

A memory write operation is similar to a read except for the direction of data flow. The CPU issues a write signal, sends the proper memory address, then sends the data word to be written into the addressed memory location.

Wait (memory synchronization):

As previously stated, the activities of the processor are timed by a master clock oscillator. The clock period determines the timing of all processing activity.

The speed of the processing cycle, however, is limited by the memory's Access Time. Once the processor has sent a read address to memory, it cannot proceed until the memory has had time to respond. Most memories are capable of responding much faster than the processing cycle requires. A few, however, cannot supply the addressed byte within the minimum time established by the processor's clock.

Therefore a processor should contain a synchronization provision, which permits the memory to request a Wait state. When the memory receives a read or write enable signal, it places a request signal on the processor's READY line, causing the CPU to idle temporarily. After the memory has had time to respond, it frees the processor's READY line, and the instruction cycle proceeds

Input/Output:

Input and Output operations are similar to memory read and write operations with the exception that a peripheral 1/0 device is addressed instead of a memory location. The CPU issues the appropriate input or output control signal, sends the proper device address and either receives the data being input or sends the data to be output.
Data can be input/output in either parallel or serial form. All data within a digital computer is represented in binary coded form. A binary data word consists of a group 5
of bits; each bit is either a one or a zero. Parallel 1/0 consists of transferring all bits in the word at the same time, one bit per line. Serial 1/0 consists of transferring one bit at a time on a single line. Naturally serial 1/0 is much slower, but it requires considerably less hardware than does parallel 1/0.

Interrupts:

Interrupt provisions are included on many central processors, as a means of improving the processor's efficiency. Consider the case of a computer that is processing a large volume of data, portions of which are to be output to a printer. The CPU can output a byte of data within a single machine cycle but it may take the printer the equivalent of many machine cycles to actually print the character specified by the data byte. The CPU could then remain idle waiting until the printer can accept the next data byte. If an interrupt capability is implemented on the computer, the CPU can output a data byte then return to data processing. When the printer is ready to accept the next data byte, it can request an interrupt. When the CPU acknowledges the interrupt, it suspends main program execution and automatically branches to a routine that will output the next data byte. After the byte is output, the CPU continues with main program execution. Note that this is, in principle, quite similar to a subroutine call, except that the jump is initiated externally rather than by the program.

More complex interrupt structures are possible, in which several interrupting devices share the same processor but have different priority levels. Interruptive processing is an important feature that enables maximum utilization of a processor's capacity for high system throughput.

Hold:

Another important feature that improves the throughput of a processor is the Hold. The hold provision enables Direct Memory Access (DMA) operations.

In ordinary input and output operations, the processor itself supervises the entire data transfer. Information to be placed in memory is transferred from the input device to the processor, and then from the processor to the designated memory location. In similar fashion, information that goes from memory to output devices goes by way of the processor.

Some peripheral devices, however, are capable of transferring information to and from memory much faster than the processor itself can accomplish the transfer. If any appreciable quantity of data must be transferred to or from such a device, then system throughput will be increased by having the device accomplish the transfer directly. The processor must temporarily suspend its operation during such a transfer, to prevent conflicts that would arise if processor and peripheral device attempted to access memory simultaneously. It is for this reason that a hold provision is included on some processors.

Some Examples - IQ

2010-11-23T06:31:00.000-08:00

1) To write 8086 Assembly Language Program to Multiply two unsigned number.
-------------------------------------------------------------------------------
MODEL SMALL
.STACK 100
.DATA ; Data Segment to initialize the variables
A DW 0FF87H ; First signed number A = (-79H) = FF87H (2'Compliment form)
B DW 0FF84H ; Second signed number B = (-7CH) = FF84H (2'Compliment form)
C DW ? ; Variable C to store result

.CODE
START:
MOV AX,@DATA
MOV DS,AX ; Initialize data segment
MOV SI,0000H ; Initialize SI to 0000H
MOV AX,A ;Take first number A in AX register
MOV CX,B ;Take second number B in CX register
MUL CX ; Performs unsigned Multiplication DX:AX = AX × CX
MOV C[SI],DX ; Store higher 16-bit result
MOV C[SI+2],AX ; Store lower 16-bit result
INT 03H

END START

Input:
FF87 × FF84 = FF0B 3A9C H
A = 0FF87 H (2'compliment of -79H)
B = 0FF84 H (2'compliment of -7CH)
Output:
C = FF0B 3A9C H
-------------------------------------------------------------------------------
2) To write 8086 Assembly Language Program to multiply two signed number.
-------------------------------------------------------------------------------
MODEL SMALL
.STACK 100
.DATA ; Data Segment to initialize the variables
A DW 0FF87H ; First signed number A = (-79H) = FF87H (2'Compliment form)
B DW 0FF84H ; Second signed number B = (-7CH) = FF84H (2'Compliment form)
C DW ? ; Variable C to store result

.CODE
START:
MOV AX,@DATA
MOV DS,AX ;Initialize data segment
MOV SI,0000H ;Initialize SI to 0000H
MOV AX,A ;Take first number A in AX register
MOV CX,B ;Take second number B in CX register
IMUL CX ; Performs signed Multiplication DX:AX = AX × CX
MOV C[SI],DX ;Store higher 16-bit result
MOV C[SI+2],AX ;Store lower 16-bit result
INT 03H

END START

Input:
-79 × -7C = 3A9C H
A = 0FF87 H (2'compliment of -79H)
B = 0FF84 H (2'compliment of -7CH)
Output:
C = 0000 3A9C H
-------------------------------------------------------------------------------
3) To write 8086 Assembly Language Program to multiply two 32-bit unsigned numbers.
-------------------------------------------------------------------------------
MODEL SMALL
.STACK 100
.DATA ; Data segment starts
A DW 5678H, 1234H, 5 DUP(0) ;A is 32bit number A=1234 5678
b DW 1111H, 1111H, 5 DUP(0) ;B is 32bit number B=1111 1111
C DW 4 DUP(?) ; Reserve 4 words of uninitialized data space to an offset C
.CODE
START:
MOV AX,@DATA ;Initialize DS
MOV DS,AX
MOV SI,OFFSET A ;Point to first number in A

MOV AX,WORD PTR A[SI] ;Take lower 16bits(5678) of A into AX
MUL WORD PTR B[BX+0] ;Multiply AX with lower 16bits of B(1111) and store in AX
MOV C[DI],AX ;Move the contents of AX to C[DI]
MOV CX,DX ;Move the value of DX to CX

MOV AX,WORD PTR A[SI+2] ;Take higher 16bits(1234) of A into AX
MUL WORD PTR B[BX+0] ;Multiply AX with lower 16bits of B(1111)and store in AX
ADD CX,AX ;CX=CX+AX
MOV C[DI+2],CX ;Move the contents of CX to C[DI+2]
MOV CX,DX ;Move contents of DX to CX

MOV AX,WORD PTR A[SI] ;Take lower 16bits(5678) of A in AX
MUL WORD PTR B[BX+2] ;Multiply contents of AX with higher 16bits of B(1111)
ADD WORD PTR C[DI+2],AX ;C[DI+2]=C[DI+2]+AX
ADC CX,DX ;CX=CX+DX+CF
MOV C[DI+4],AX ;Move contents of AX to C[DI+4]

MOV AX,WORD PTR A[SI+2] ;Take higher 16bits of A(1234) into AX
MUL WORD PTR B[BX+2] ;Multiply AX with higher 16bits of B(1111) and store in AX
ADD CX,AX ;CX=CX+AX
MOV WORD PTR C[DI+4],CX ;Move contents of CX to C[DI+4]
ADC DX,0000 ;DX=DX+0000+CF
MOV C[DI+6],DX ;Move the contents of DX to C[DI+6]

INT 03H ; Halt

END START

INPUT
A = 1234 5678 H
B = 1111 1111 H
OUTPUT
C=0136 BO6E 652F B5F8 H
-------------------------------------------------------------------------------

4) To write 8086 Assembly Language Program to Division two unsigned number.
-------------------------------------------------------------------------------
MODEL SMALL
.STACK 100
.DATA ; Data Segment to initialize the variables
Dividend DW 1234H, 5678H ; Dividend = 1234 5678 H
Divisor DW 270FH ; Divisor = 207FH
Quotient DW ? ; Variable Quotient to store Quotient
Reminder DW ? ; Variable Reminder to store Reminder

.CODE
START:
MOV AX,@DATA
MOV DS,AX ;Initialize data segment
MOV SI,0000H ;Initialize SI to 0000H
MOV DX,Dividend[SI] ;Take higher 16-bit number which is to be divided in DX register
MOV AX,Dividend[SI+2] ;Take lower 16-bit number which is to be divided in AX register
MOV CX,Divisor ;Take divisor in CX register
DIV CX ; Performs unsigned Division DX:AX ÷CX
; AX = Quotient DX = Reminder
MOV Reminder,DX ;Store Reminder
MOV Quotient,AX ;Store Quotient
INT 03H
END START

Input:
12345678H ÷ 207FH = 7751H
Dividend = 1234 5678 H
Divisor = 207F H
Output:
Quotient = 7751 H
Reminder = 01B9 H
-------------------------------------------------------------------------------
5) To write 8086 Assembly Language Program to Division two signed number.
-------------------------------------------------------------------------------
MODEL SMALL
.STACK 100
.DATA ; Data Segment to initialize the variables
Dividend DW 0FFFFH, 0FF88H ; Dividend = (-78H) = FFFF FF88H (2'Compliment form)
Divisor DW 0006H ; Divisor = 0006H
Quotient DW ? ; Variable Quotient to store Quotient
Reminder DW ? ; Variable Reminder to store Reminder

.CODE
START:
MOV AX,@DATA
MOV DS,AX ;Initialize data segment
MOV SI,0000H ;Initialize SI to 0000H
MOV DX,Dividend[SI] ;Take higher 16-bit number which is to be divided in DX register
MOV AX,Dividend[SI+2] ;Take lower 16-bit number which is to be divided in AX register
MOV CX,Divisor ;Take divisor in CX register
IDIV CX ; Performs signed Division DX:AX ÷ CX
; AX = Quotient DX = Reminder
MOV Reminder,DX ;Store Reminder
MOV Quotient,AX ;Store Quotient
INT 03H

END START

Input:
-78H ÷ 06H = -14H
Dividend = FFFF FF87 H (32-bit 2'compliment of -78H)
Divisor = 0006 H
Output:
Quotient = FFEC H (2'compliment of -14H)
Reminder = 0000 H

8086 Assembly Tutorials

2010-11-22T19:50:00.000-08:00

8086 Assembly Language

Structure of an assembly language program

Assembly language programs divide roughly into five sections

header
equates
data
body
closing

The Header

The header contains various directives which do not produce machine code
Sample header:

%TITLE "Sample Header"
.8086
.model small
.stack 256

Named Constants

Symbolic names associated with storage locations represent addresses
Named constants are symbols created to represent specific values determined by an expression
Named constants can be numeric or string
Some named constants can be redefined
No storage is allocated for these values

Equates

Constant values are known as equates
Sample equate section:

Count EQU 10
Element EQU 5
Size = Count * Element
MyString EQU "Maze of twisty passages"
Size = 0

= is used for numeric values only
Cannot change value of EQU symbol
EQUated symbols are not variables
EQU expressions are evaluated where used; = expressions are evaluated where defined

The Data Segment

Begins with the .data directive
Two kinds of variables, initialized and uninitialized.
Initialized variables take up space in the program's code file
Declare uninitialized variables after initialized ones so they do not take up space in the program's code file

Reserving space for variables

Sample DATA SEGMENT

.data
numRows DB 25
numColumns DB ?
videoBase DW 0800h

DB and DW are common directives (define byte) and (define word)
The symbols associated with variables are called labels
Strings may be declared using the DB directive:

aTOm DB "ABCDEFGHIJKLM"

Program Data and Storage

Pseudo-ops to define data or reserve storage

DB - byte(s)
DW - word(s)
DD - doubleword(s)
DQ - quadword(s)
DT - tenbyte(s)

These directives require one or more operands

define memory contents
specify amount of storage to reserve for run-time data

Defining Data

Numeric data values

100 - decimal
100b - binary
100h - hexadecimal
'100' - ASCII
"100" - ASCII

Use the appropriate DEFINE directive (byte, word, etc.)
A list of values may be used - the following creates 4 consecutive words

DW 40Ch,10b,-13,0

A ? represents an uninitialized storage location

DB 255,?,-128,'X'

Naming Storage Locations

Names can be associated with storage locations

ANum DB -4
DW 17
ONE
UNO DW 1
X DD ?

These names are called variables
ANum refers to a byte storage location, initialized to FCh
The next word has no associated name
ONE and UNO refer to the same word
X is an uninitialized doubleword

Arrays

Any consecutive storage locations of the same size can be called an array

X DW 040Ch,10b,-13,0
Y DB 'This is an array'
Z DD -109236, FFFFFFFFh, -1, 100b

Components of X are at X, X+2, X+4, X+6
Components of Y are at Y, Y+1, …, Y+15
Components of Z are at Z, Z+4, Z+8, Z+12

DUP

Allows a sequence of storage locations to be defined or reserved
Only used as an operand of a define directive

DB 40 DUP(?)
DW 10h DUP(0)
DB 3 DUP("ABC")
DB 4 DUP(3 DUP (0,1), 2 DUP('$'))

Word Storage

Word, doubleword, and quadword data are stored in reverse byte order (in memory)

Directive      Bytes in Storage
DW 256         00 01
DD 1234567h    67 45 23 01
DQ 10          0A 00 00 00 00 00 00 00
X DW 35DAh     DA 35

Low byte of X is at X, high byte of X is at X+1

The Program Body

Also known as the code segment
Divided into four columns: labels, mnemonics, operands, and comments
Labels refer to the positions of variables and instructions, represented by the mnemonics
Operands are required by most assembly language instructions
Comments aid in remembering the purpose of various instructions

An example

Label    Mnemonic   Operand     Comment
---------------------------------------------------------
         .data
exCode   DB         0          ;A byte variable
myWord   DW         ?          ;Uninitialized word var.
         .code
MAIN    PROC
         mov        ax,@data   ;Initialize DS to address
         mov        ds,ax      ; of data segment
         jmp        Exit       ;Jump to Exit label
         mov        cx,10      ;This line skipped!
Exit:    mov        ah,04Ch    ;DOS function: Exit prog
         mov        al, exCode ;Return exit code value
         int        21h        ;Call DOS. Terminate prog
MAIN     ENDP                  ;End Program
         END        MAIN       ; and specify entry point

The Label Field

Labels mark places in a program which other instructions and directives reference
Labels in the code segment always end with a colon
Labels in the data segment never end with a colon
Labels can be from 1 to 31 characters long and may consist of letters, digits, and the special characters ? . @ _ $ %
If a period is used, it must be the first character
Labels must not begin with a digit
The assembler is case insensitive

Legal and Illegal Labels

Examples of legal names

COUNTER1
@character
SUM_OF_DIGITS
$1000
DONE?
.TEST

Examples of illegal names

TWO WORDS contains a blank
2abc begins with a digit
A45.28 . not first character
YOU&ME contains an illegal character

The Mnemonic Field

For an instruction, the operation field contains a symbolic operation code (opcode)
The assembler translates a symbolic opcode into a machine language opcode
Examples are: ADD, MOV, SUB
In an assembler directive, the operation field contains a directive (pseudo-op)
Pseudo-ops are not translated into machine code; they tell the assembler to do something

The Operand Field

For an instruction, the operand field specifies the data that are to be acted on by the instruction. May have zero, one, or two operands

NOP             ;no operands -- does nothing
INC AX          ;one operand -- adds 1 to the contents of AX
ADD WORD1,2     ;two operands -- adds 2 to the contents
                ; of memory word WORD1

In a two-operand instruction, the first operand is the destination operand. The second operand is the source operand.
For an assembler directive, the operand field usually contains more information about the directive.

The Comment Field

A semicolon marks the beginning of a comment field
The assembler ignores anything typed after the semicolon on that line
It is almost impossible to understand an assembly language program without good comments
Good programming practice dictates a comment on almost every line

Good and Bad Comments

Don't say something obvious, like

MOV CX,0 ;move 0 to CX

Instead, put the instruction into the context of the program

MOV CX,0 ;CX counts terms, initially 0

An entire line can be a comment, or be used to create visual space in a program

;
; Initialize registers
;
MOV AX,0
MOV BX,0

The Closing

The last lines of an assembly language program are the closing
Indicates to assembler that it has reached the end of the program and where the entry point is

MAIN ENDP ;End of program
END MAIN ; entry point for linker use

END is a pseudo-op; the single "operand" is the label specifying the beginning of execution, usually the first instruction after the .code pseudo-op

Assembling a Program

The source file of an assembly language program is usually named with an extension of .asm

edit myprog.asm

The source file is processed (assembled) by the assembler (TASM) to produce an object file (.obj)

tasm myprog produces myprog.obj

The object file must be linked by the linker (TLINK) to produce an executable file (.exe)

tlink myprog produces myprog.exe

Dealing with Errors

TASM will report the line number and give an error message for each error it finds
Sometimes it is helpful to have a listing file (.lst), created by using TASM with the -l option
The .lst file contains a complete listing of the program, along with line numbers, object code bytes, and the symbol table

Using the Debugger

Useful for logic errors that the assembler misses
See the text for a complete tutorial
You do not need to use the TDH386.SYS driver or the TD386.EXE debugger with the latest version of the assembler
To use the debugger on myprog.asm

tasm /zi myprog
tlink /v myprog
td myprog

.COM and .EXE files

The .COM code file format is a relic of the first version of MS-DOS
Not recommended for general purposes
All code, data, and the stack occupy one 64K segment (Borland's "tiny" model)
.EXE code files are more efficient in use of RAM
Data and code occupy separate segments
The programmer is responsible for setting up the data and code segments properly

Ending a Program

All programs, upon termination, must return control back to another program -- the operating system
Under MS-DOS, this is COMMAND.COM
This is done by doing a DOS system call

Data Transfer Instructions

MOV destination,source

reg, reg
mem, reg
reg, mem
mem, immed
reg, immed

Sizes of both operands must be the same
reg can be any non-segment register except IP cannot be the target register
MOV's between a segment register and memory or a 16-bit register are possible

Examples

mov ax, word1

"Move word1 to ax"
Contents of register ax are replaced by the contents of the memory location word1

xchg ah, bl

Swaps the contents of ah and bl

Illegal: mov word1, word2

can't have both operands be memory locations

Sample MOV Instructions

b db 4Fh
w dw 2048

mov bl,dh
mov ax,w
mov ch,b
mov al,255
mov w,-100
mov b,0

When a variable is created with a define directive, it is assigned a default size attribute (byte, word, etc)
You can assign a size attribute using LABEL

LoByte LABEL BYTE
aWord DW 97F2h

Addresses with Displacements

b db 4Fh, 20h, 3Ch
w dw 2048, -100, 0

mov bx, w+2
mov b+1, ah
mov ah, b+5
mov dx, w-3

Type checking is still in effect
The assembler computes an address based on the expression
NOTE: These are address computations done at assembly time

MOV ax,b-1
will not subtract 1 from the value stored at b

eXCHanGe

XCHG destination,source

reg, reg
reg, mem
mem, reg

MOV and XCHG cannot perform memory to memory moves
This provides an efficient means to swap the operands

No temporary storage is needed
Sorting often requires this type of operation
This works only with the general registers

Arithmetic Instructions

ADD dest, source
SUB dest, source
INC dest
DEC dest
NEG dest

Operands must be of the same size
source can be a general register, memory location, or constant
dest can be a register or memory location

except operands cannot both be memory

ADD and INC

ADD is used to add the contents of

two registers
a register and a memory location
a register and a constant

INC is used to add 1 to the contents of a register or memory location

Examples

add ax, word1

"Add word1 to ax"
Contents of register ax and memory location word1 are added, and the sum is stored in ax

inc ah

Adds one to the contents of ah

Illegal: add word1, word2

can't have both operands be memory locations

SUB, DEC, and NEG

SUB is used to subtract the contents of

one register from another register
a register from a memory location, or vice versa
a constant from a register

DEC is used to subtract 1 from the contents of a register or memory location
NEG is used to negate the contents of a register or memory location

Examples

sub ax, word1

"Subtract word1 from ax"
Contents of memory location word1 is subtracted from the contents of register ax, and the sum is stored in ax

dec bx

Subtracts one from the contents of bx

Illegal: sub byte1, byte2

can't have both operands be memory locations

Type Agreement of Operands

The operands of two-operand instructions must be of the same type (byte or word)

mov ax, bh ;illegal
mov ax, byte1 ;illegal
mov ah,'A' ;legal -- moves 41h into ah
mov ax,'A' ;legal -- moves 0041h into ax

Translation of HLL Instructions

B = A

mov ax,A
mov B,ax

memory-memory moves are illegal

A = B - 2*A

mov ax,B
sub ax,A
sub ax,A
mov A,ax

Program Segment Structure

Data Segments

Storage for variables
Variable addresses are computed as offsets from start of this segment

Code Segment

contains executable instructions

Stack Segment

used to set aside storage for the stack
Stack addresses are computed as offsets into this segment

Segment directives

.DATA
.CODE
.STACK size

Memory Models

.Model memory_model

tiny: code+data <= 64K (.com program)
small: code<=64K, data<=64K, one of each
medium: data<=64K, one data segment
compact: code<=64K, one code segment
large: multiple code and data segments
huge: allows individual arrays to exceed 64K
flat: no segments, 32-bit addresses, protected mode only (80386 and higher)

Program Skeleton

.MODEL small
.STACK 100h
.DATA

;declarations

.CODE
MAIN PROC

;main proc code
;return to DOS

ENDP MAIN
;other procs (if any) go here
end MAIN

· Select a memory model

· Define the stack size

· Declare variables

· Write code

· organize into procedures

· Mark the end of the source file

· define the entry point

Input and Output Using 8086 Assembly Language

Most input and output is not done directly via the I/O ports, because

port addresses vary among computer models
it's much easier to program I/O with the service routines provided by the manufacturer

There are BIOS routines (which we'll look at later) and DOS routines for handling I/O (using interrupt number 21h)

Interrupts

The interrupt instruction is used to cause a software interrupt (system call)

An interrupt interrupts the current program and executes a subroutine, eventually returning control to the original program
Interrupts may be caused by hardware or software

int interrupt_number ;software interrupt

Output to Monitor

DOS Interrupts : interrupt 21h

This interrupt invokes one of many support routines provided by DOS
The DOS function is selected via AH
Other registers may serve as arguments

AH = 2, DL = ASCII of character to output

Character is displayed at the current cursor position, the cursor is advanced, AL = DL

Output a String

Interrupt 21h, function 09h

DX = offset to the string (in data segment)
The string is terminated with the '$' character

To place the address of a variable in DX, use one of the following

lea DX,theString ;load effective address
mov DX, offset theString ;immediate data

Print String Example

%TITLE "First Program -- HELLO.ASM"
        .8086
        .MODEL   small
        .STACK   256
        .DATA
msg     DB      "Hello, World!$"
        .CODE
MAIN    PROC
        mov     ax,@data     ;Initialize DS to address
        mov     ds,ax        ; of data segment
        lea     dx,msg       ;get message
        mov     ah,09h       ;display string function
        int     21h          ;display message
Exit:   mov     ah,4Ch       ;DOS function: Exit program
        mov     al,0         ;Return exit code value
        int     21h          ;Call DOS. Terminate program
MAIN    ENDP                 ;End of program
        END     MAIN         ; entry point

Input a Character

Interrupt 21h, function 01h
Filtered input with echo

This function returns the next character in the keyboard buffer (waiting if necessary)
The character is echoed to the screen
AL will contain the ASCII code of the non-control character

AL=0 if a control character was entered

Microprocessor Dictionary

2010-11-22T09:25:00.000-08:00

accumulator-a register within the CPU. This register will be one of the operands in an arithmetic or logical operation.

address-a binary pattern used to select a location in memory. In this text, addresses are 16 bits wide.

addressing modes-techniques used by software or hardware in calculating an address.

ALU-arithmetic logic unit; the section of the CPU that performs calculations for arithmetic and logical operations.

assembler-a program that translates mnemonic code into machinelevel code.

asynchronous-an event or operation not controlled by the master clock.

base address-the location of the first datum in a data table.

bit-a binary digit.

BCD-binary coded decimal; a number system in which each group of 4 bits (referred to as decades) represents a single decimal digit.

breakpoint-a place in a program where execution is temporarily stopped. Once a breakpoint is reached, analysis of the program can be performed.

buffer-a circuit that can be used to isolate one part of the computer from another. Buffers often provide extra current capabilities not found in the circuit driving the inputs. A buffer can also be used as a temporary storage register.

bus-a set of lines used to move information from one part of the computer to another. Typically, a bus is divided into three functional groups: data, address, and control.

bus contention-two or more circuits trying to place information on a common line at the same time.

byte-a group of 8 bits.

CPU-central processing unit; a section of a computer responsible for execution of programs. This section manipulates the data, generates control signals, and stores results. In modern computers these functions have been integrated into a single IC. The 8080, 8085, and Z80 are examples of CPUs.

clock cycle-the basic unit of processor activity.

compiler-a program that translates highlevel code into machine code.

controller-a circuit that acts as an interface between the computer and a device such as a disk drive. The controller will pass information back and forth between the computer and the device and will generate specialized control signals needed to operate the device.

DAC-digitaltoanalog converter.

deviceselect pulse-a control pulse created by logically combining a port address with an IN or OUT control signal.

DMA-direct memory access; a process in which circuits other than the CPU can read from or write to memory without processor intervention.

displacement-the amount by which a location differs from a reference point. When using data tables, the reference point is usually the base address.

duplex-twoway data transfers. Half duplex is twoway communication, with each end of the system taking turns transmitting. Full duplex is twoway communication that occurs simultaneously.

dynamic memory-a memory in which information is stored capacitively. This type of memory requires periodic refresh to replenish capacitor charges.

EEPROM-electrically erasable programmable read only memory.

EPROM-erasable by ultraviolet light.

firmware-a software routine that has been stored in a read only memory and thus is available at power up without the need for reloading the code.

flag-a flipflop used to indicate the status of an operation. For example, the zero flag will indicate if an operation results in zero if it is set.

flowchart-a pictorial diagram of the logical sequence of a program.

handshaking-the exchange of control and status information between two circuits. Handshaking is used to coordinate the transfer of data between circuits.

hardware- the physical parts of a system.

highlevel language-a computer language such as FORTRAN or COBOL. Such languages are Englishlike, requiring a compiler to translate them into machine code.

ICE-in circuit emulator.

index register-a specialpurpose register used by a processor when performing indexed addressing. The value in the index register is usually the reference location to which a displacement will be added.

I/O-input/output; the process by which the computer communicates with the outside world.

instruction-a computer command.

instruction cycle-the time and activities associated with the performance of an instruction.

instruction fetch-a machine cycle used by the processor to obtain instructions from memory.

instruction register-the part of the CPU that stores the instruction while it is being decoded.

instruction set-the group of instructions that is recognized by a processor.

interrupt-an asynchronous request by a circuit asking for the processor's attention. If acknowledged, the processor will temporarily stop what it was doing and interact with the circuit that generated the interrupt.

interrupt service routine-a section of code written to handle the tasks associated with an interrupt request.

interrupt vector-a special code that identifies the circuit requesting an interrupt.

invisible subtraction-a subtraction in which the answer is not stored back in the accumulator. The results of the subtraction can, however, affect the flags, making it possible to make decisions based on the result.

isolated I/O-a method of I/O that differentiates between memory and I/O ports. In this text, the only register that can be used with isolated I/O is the accumulator.

linear decoding-a method of addressing a circuit using a single address line.

logical construct-a method of organizing how a task will be performed. When used in programming, constructs partition the code into sections in which each section has but one entry point and one exit point.

machine cycle-a set of clock states grouped together to perform a data transfer.

machine language-a computer language that is directly executable by a computer without the need for translation by a compiler or an assembler. Although the computer works on binary patterns, the program can usually be entered in octal or hexadecimal.

masking-a process in which an operation can be performed on a single bit.

memory cell-a circuit in memory that represents a single bit.

memory map-documentation that lists or shows the function of each location in memory.

memory mapped I/O-a system of I/O in which each I/O location is treated as if it were memory.

microprocessor-an integrated circuit in which CPU, ALU, and control functions are combined.

mnemonic-an Englishlike representation of an instruction.

monitor program-a program, usually stored in ROM, that is responsible for basic computer operations.

nesting-the technique of placing a loop or subroutine within another loop or subroutine.

nibble-4 bits.

nonmaskable interrupt-an interrupt that cannot be turned off.

operating system-a program similar to a monitor program, but more sophisticated. Not only does it handle basic computer functions, it is capable of interacting with peripherals such as disk drives and printers.

up code-a binary pattern that when loaded into the instruction register will cause the CPU to perform tasks associated with the instruction.

page-256 bytes of memory.

parallel-a bus system in which information is moved in multibit units simultaneously.

polling-a process in which the status of devices attached to a bus system is periodically sampled.

port-an interface circuit capable of receiving from or placing information on the bus.

priority-the level of importance of an event. Most often, interrupts are assigned priorities.

program counter-a 16bit register that places addresses on the bus to retrieve information stored within a program.

programmable interface chip-an IC in which the specific tasks to be performed are not hardwired into the chip, but selectable through the use of command words.

PROM-programmable read only memory.

random access-each location within memory can be directly accessed without the need to sequence through prior locations. Direct access is probably more appropriate, as this access method is not really random.

read-to transfer information into the CPU.

relative addressing-an addressing mode that calculates a new address based on the position of an instruction within a program.

sequential access-a method of access in which all prior records or locations must be traversed before reaching the desired location or record.

signature analysis-a troubleshooting technique in which a stream of serial data is converted into a binary pattern that can then be compared to a pattern known to represent a functional circuit.

simplex-oneway communication.

single step-a process in which a program can be performed one instruction or one machine cycle at a time.

stack-an area of memory used to implement a data structure that follows the last in, first out method of access. In most cases, the stack is used by the processor to keep track of subroutine calls and returns.

stack pointer-a specialpurpose register that tracks the location of the last entry in the stack.

static memory-memory in which the basic cell circuit consists of a flipflop.

synchronous-an event or operation that takes place in step with a master clock.

throughput-the amount of information processed in a given time.

USART-universal synchronous asynchronous receiver transmitter; a specialpurpose IC used in data communications.

volatile-memory in which data is lost when power is removed.

word-16 bits.

write-data transfer out of the CPU.

History of Microprocessors

2010-11-22T09:05:00.000-08:00

1971 - November 15	First microprocessor, the 4004, developed by Marcian E. Hoff for Intel, was released. It contains the equivalent of 2300 transistors and was a 4 bit processor. It is capable of around 60,000 Interactions per second (0.06 MIPs), running at a clock rate of 108KHz.
1972 - April 1	8008 Processor released by Intel.
1974 - April 1	Introduction of 8080. An 8 Bit Microprocessor from Intel.
1976?	Introduction of 8085.
1976	Z80 released by Zilog, and the basis for the computer boom in the early 1980s. It was an 8 bit microprocessor. CP/M was written for the Z80 as well as software like Wordstar and dBase II - and it formed the basis for the Sinclair Spectrum of 1982.
1976	6502, 8 bit microprocessor developed and later chosen to equip the Apple II computer. Also fitted in the original Acorn machine, BBC Micro, Commodore 64 and Commodore PET.
1978 - June 8	Introduction of 8086 by Intel, the first commercially successful 16 bit processor. It was too expensive to implement in early computers, so an 8 bit version was developed (the 8088), which was chosen by IBM for the first IBM PC. This ensured the success of the x86 family of processors that succeeded the 8086 since they and their clones are used in every IBM PC compatible computer. The available clock frequencies are 4.77, 8 and 10 MHz. It has an instruction set of about 300 operations. At introduction the fastest processor was the 8 MHz version which achieved 0.8 MIPs and contained 29,000 transistors.
1979 - June 1	Introduction of 8088, a step down from the 8086 as it contains just an 8 bit data bus - but this makes it cheaper to implement in computers.
1979	The 68000 Microprocessor launched by Motorola. Used by Apple for the Macintosh and by Atari for the ST series. Later versions of the processor include the 68020 used in the Macintosh II.
1981	Introduction of 80186/80188. These are rarely used on PCs as they incorporate a built in DMA and timer chip - and thus have register addresses incompatible with other IBM PCs.
1982 - February 1	80286 Released. It supports clock frequencies of up to 20 MHz and implements a new mode of operation, protected mode - allowing access to more memory (up to 16 Mbytes compared to 1 MB for the 8086. The virtual address space can appear to be up to 1 GB through the use of virtual memory). It includes an extended instruction set to cope with this new mode of operation. At introduction the fastest version ran at 12.5 MHz, achieved 2.7 MIPs and contained 134,000 transistors.
1985 October 17	80386 DX released. It supports clock frequencies of up to 33 MHz and can address up to 4 GB of memory and virtual memory of up to 64 TERABYTES! It also includes a bigger instruction set than the 80286. At the date of release the fastest version ran at 20 MHz and achieved 6.0 MIPs. It contained 275,000 transistors.
1988 - June 16	80386 SX released as a cheaper alternative -to the 80386 DX. It had a narrower (16 bit) time multiplexed bus. This reduction in pins, and the easier integration with 16 bit devices made the cost savings.
1989 - April 10	80486 DX released by Intel. It contains the equivalent of about 1.2 million transistors. At the time of release the fastest version ran at 25 MHz and achieved up to 20 MIPs. Later versions, such as the DX/2 and DX/4 versions achieved internal clock rates of up to 100 MHz.
1991 - April 22	80486 SX released as cheaper alternative to 80486 DX - the key difference being the lack of an integrated F.P.U.
1993 - March 22	Intel Pentium released. At the time it was only available in 60 & 66 MHz versions which achieved up to 100 MIPs, with over 3.1 million transistors.
1994 - March 7	Intel Release the 90 & 100 MHz versions of the Pentium Processor.
1994 - October 10	Intel Release the 75 MHz version of the Pentium Processor.
1995 - March 27	Intel release the 120 MHz version of the Pentium processor.
1995 - June 1	Intel release the 133 MHz version of the Pentium processor.
1995 - November 1	Pentium Pro released. At introduction it achieved a clock speed of up to 200 MHz (there were also 150, 166 and 180 MHz variants released on the same date), but is basically the same as the Pentium in terms of instruction set and capabilities. It achieves 440 MIPs and contains 5.5 million transistors - this is nearly 2400 times as many as the first microprocessor, the 4004 - and capable of 70,000 times as many instructions per second.
1996 - January 4	Intel release the 150 & 166 MHz versions of the Pentium Processor. They contain the equivalent of over 3.3 million transistors.
1996 - October 6	Intel release the 200 Mhz version of the Pentium Processor.
1997 - January 8	Intel released Pentium MMX (originally 166 and 200 Mhz versions), for games and multimedia enhancement. To most people MMX is simply another 3-letter acronym and people wearing coloured suits on Intel ads, and to programmers in meant an even further expanded instruction set that provides, amongst other functions, enhanced 64-bit support - but software needs to be specially written to work with the new functions. A major rival clone, the AMD-K6-MMX containing a similar instruction set, caused a legal challenge from Intel on the right to use the trademarked name MMX - it was not upheld.
1997 - May 7	Intel Release their Pentium II processor (233, 266 and 300 Mhz versions). It featured, as well as an increased instruction set, a much larger on-chip cache.
1997 - June 2	Intel release the 233 MHz Pentium MMX.
1998 - February	Intel released of 333 MHz Pentium II processor. Code-named Deschutes these processors use the new 0.25 micron manufacturing process to run faster and generate less heat than before.
1999 - Feb 22	AMD release K6-III 400MHz version, 450 to OEMS. In some tests it outperforms soon-to-be released Intel P-III. It contains approximately 23 million transistors, and is based on 100Mhz super socket 7 motherboards, an improvement on the 66MHz buses their previous chips were based on. This helps its performance when compared to Intel's Pentium II - which also uses a 100MHz bus speed.
1999 - Nov 29	AMD release Athlon 750MHz version.
2000 - Jan 19	Transmeta launch their new 'Crusoe' chips. Designed for laptops these prvoide comparible performance to the mid-range Pentium II chips, but consume a tiny fraction of the power. They are a new and exciting competitor to Intel in the x86 market.
2000 - March 6	AMD Release the Athlon 1GHz.
2000 - March 8	Intel release very limited supplies of the 1GHz Pentium III chip.

Microprocessor: Definition

2010-11-22T07:42:00.000-08:00

Microcomputer
The term microcomputer is used to describe a system that includes at minimum a microprocessor, program memory, data memory, and an input-output (I/O) device. Some microcomputer systems include additional components such as timers, counters, and analog-to-digital converters. Thus, a microcomputer system can be anything from a large computer having hard disks, floppy disks, and printers to a single-chip embedded controller.

Microcontroller
A microcontroller is a single-chip computer. Micro suggests that the device is small, and controller suggests that it is used in control applications. Another term for microcontroller is embedded controller, since most of the microcontrollers are built into (or embedded in) the devices they control.

Microcomputer Block Diagram:

Intel Microprocessors and their Details:

MICROPROCESSOR

YEAR

SPEED

WORD LENGTH
TRANSISTORS

MIPS

Intel 4004

1969

108 KHz

4-bit

2,300

.06

Intel 8008

1972

200 KHz

8-bit

3,500

.06

Intel 8080

1974

2 MHz

8-bit

6,000

.64

Intel 8086

1978

4.47 MHz

16-bit

29,000

.66

Intel 8088

1981

4.47 MHz

16-bit

29,000

.75

Intel 80286

1982

12 MHz

16-bit

134,000

2.66

Intel 80386

1985

16-33 MHz

32-bit

275,000

4

Intel 80486 (i486)

1989

20-100 MHz

32-bit

1.2 Million

70

Intel 80586 (Pentium)

1993

75-200 MHz

32-bit

3.3 Million

126 - 203

Intel Pentium Pro

1995

150-200 MHz

32-bit

5.5 Million

300

Intel Pentium MMX

1997

166-233 MHz

32-bit

4.5 Million

-

Intel Pentium II

1997

233-450 MHz

32-bit

7.5 Million

-

Intel Pentium III

1999

450-933 MHz

32-bit

Over 9.5 Million

-

Intel Itanium Processor
(formerly Merced Processor)

2000

1 GHz

64-bit

15,000,000

1,200

Speed is measured in terms of Hz. 1 Hz=1 cycle per second (1 Particular Job per second)
In a single processors millions of transistors may be used.
MIPS: Millions of Instruction Per Second (The speed in terms of Instruction performed in a second)
The First Microprocessor was the 4-bit Intel 4004 Processor.

Gizmo!!

2010-05-21T10:20:00.000-07:00

Now there is a 3d DLSR camera, a concept by Dean Francis

We have seen the recent spur in 3d products mainly dominated by so called next generation TVs, followed by graphic cards and other products. Now it is the turn of your digital camera to go 3d, at least in the concepts we have here

USB Vacuum Cleaner

All things today are smaller. USB just acting as the power hub for external devices in spite of the pure computing instruments. The vacuum cleaner can be operated by the USB port and generally used for cleaning Keybord (specially for Laptop because the Desktop keybord is no more important in the sense of cost).

MICROPROCESSOR	YEAR	SPEED	WORD LENGTH	TRANSISTORS	MIPS
Intel 4004	1969	108 KHz	4-bit	2,300	.06
Intel 8008	1972	200 KHz	8-bit	3,500	.06
Intel 8080	1974	2 MHz	8-bit	6,000	.64
Intel 8086	1978	4.47 MHz	16-bit	29,000	.66
Intel 8088	1981	4.47 MHz	16-bit	29,000	.75
Intel 80286	1982	12 MHz	16-bit	134,000	2.66
Intel 80386	1985	16-33 MHz	32-bit	275,000	4
Intel 80486 (i486)	1989	20-100 MHz	32-bit	1.2 Million	70
Intel 80586 (Pentium)	1993	75-200 MHz	32-bit	3.3 Million	126 - 203
Intel Pentium Pro	1995	150-200 MHz	32-bit	5.5 Million	300
Intel Pentium MMX	1997	166-233 MHz	32-bit	4.5 Million	-
Intel Pentium II	1997	233-450 MHz	32-bit	7.5 Million	-
Intel Pentium III	1999	450-933 MHz	32-bit	Over 9.5 Million	-
Intel Itanium Processor (formerly Merced Processor)	2000	1 GHz	64-bit	15,000,000	1,200