Pick up any newspaper and one is already overdosed with the Republican candidate shucking and jiving to become the presidential nominee, and the early Democratic responses are planting media-fed land mines designed to derail the president’s competition before it is even selected. Politics [...]]]> It’s the election season. The race for President of the United States is on.

Pick up any newspaper and one is already overdosed with the Republican candidate shucking and jiving to become the presidential nominee, and the early Democratic responses are planting media-fed land mines designed to derail the president’s competition before it is even selected. Politics is a full contact sport and it’s just about now the gloves are coming off; the winner being the one who can take the Rocky Balboa beating in a designer suit.

Personally, while generally interested in politics, I find myself awaiting the results of the earliest primaries to anoint the Republican who will face off with President Obama. I have my own opinion about the candidates from both parties but recognize our system selects the opposing nominee long before I get any say, living in California. In other words, while imperfect, some small subset of Americans will select, in this case, the Republican challenger for the Oval Office. I suppose I could move to Iowa or New Hampshire if I wanted more of a voice, but I’ve come to accept the process, flaws and all, and believe “the system works,” regardless of the party of the incumbent. Iowa, New Hampshire or South Carolina, I have the choice to be an early influencer if I so desire, and if I don’t, well, that’s my choice, too.

The election is a long way away measured in months, speeches, dollars, drama…and wafers.

Yes, for the semiconductor industry the election hopefully occurs in the midst of our industry’s return to the secular growth following the two to three seasonal quarters of “correction” and “inventory management,” code words for “we’re selling less than we expected.”

I’ve read many analyst reports calling for the second-half return of semiconductor growth and in a sustainable way. Phrases like “tail wind” and “global, secular demand” punctuate generally upbeat predictions for our industry’s next big chance to satisfy the consumer and bandwidth product consumption that drives our collective bottom line. In a way, we’re somehow relegated to awaiting that demand. In another way, we are not.

Policy decisions for the semiconductor industry cannot solve the recessional pressures. But they can soften the landing. The Global Semiconductor Alliance (GSA) exists to facilitate growth in the best times and downside management in the worst. It offers programs, working groups, technology advances and best practices to its members to manage their businesses with relevant information and many more resources.

Deciding what resources are available to the industry is the purview of the GSA management and its board. Experienced leaders from around the world team up to steward the organization and add their unique experiences to create a portfolio of advice, wisdom, serious debate and valuable programs. It’s been my great pleasure to be a part of that team for the past five years; a role I have valued personally and to which I have attempted to repay with value of my own.

It’s also election season at the GSA.

Hardly comparable to the race for the White House, scaled down to a tiny $300B industry, the role of the GSA Board member is of great significance to the management of our community of semiconductor-related companies. Unlike the national elections, we candidates are respectful and civil towards each other. But, we value our contributions proportionately as much, and for good reason. There is much at stake as we function in an uncertain global economy with uncertain political outcomes.

I am seeking reelection to the GSA Board. Please help me reduce the uncertainty in the semiconductor industry by voting for a passionate and serious contributor to the GSA, and a supporter of those policies that will help us to weather the outcome of much larger elections, and the challenges that go with them.

[ More about Jack Harding ]

For each of the four major elements we have evolved down a different strategic path. For [...]]]> Fifteen years after its debut as a silicon strategy the SOC is finally in full bloom worldwide. In its simplest configuration it consists of a processor, memory, I/O and the RTL crafted by the customer that defines its functionality and application.

For each of the four major elements we have evolved down a different strategic path. For the processor, ARM, MIPS and a couple hangers-on have given the market an IP roadmap so potent that even the discussion of a homemade solution has become as rare as the IP was fifteen years ago.

The I/O spans a relatively broad range from the pedestrian to 17-gig SerDes, the latter constituting such a bold technical challenge that all the serious suppliers can be counted on one hand and even that group is shrinking down to our partner, Avago Technologies, and a few IDMs; it’s hard and is what it is. In other words, no SOC developer has any measurable influence over the technology. The fact that a high-performance SerDes actually does its job over a hundred lanes or more is a borderline miracle. One needs to design around it, not vice versa.

The customers’ RTL has and continues to be the object of most of the EDA munching and crunching; the search for smaller, faster and lower power. Since the processor and I/O have been purchased off-the-shelf, the customer design is the focus of most attempts to optimize.

This brings us to the fourth major category…memory. Much like the other third-party IP on an SOC, memory has been off-the-shelf for all but the largest companies. Simply put, one bought a memory that was “close enough.” And for many designs going forward that solution will continue to be the right one; it works, is silicon tested, is widely used and well documented…why not? However, for some SOCs where the rest of the IC has been optimized to a level of diminishing returns it may be that a customized memory will offer some options to reduce area, power and improve performance.

In fact, for many advanced SOCs that is precisely what we are observing. eSilicon’s customized memory business has caught the eye of some of the most aggressive developers in the world; folks who may be new to the custom memory game or have been doing it for years with internal resources who may be overloaded. In either case, the 40nm and beyond crowd has it figured out…customized memory could be a rich vein of potential optimization.

The SOC development model is here and will only become more important a means to manage cost and time to market. Of the four major SOC elements memory may be the newest and, possibly, the last frontier for optimization. But one thing is for sure, if a developer is going to spend the $50M-$100M needed to bring a 28nm IC to market, he/she will at least understand the trade-offs of customized memory vs. off-the-shelf memory. It’s a knowable trade-off and is one worth considering.

The vast majority of private FSCs are venture funded and, rationally, anticipate an exit through acquisition.  The statistics around achieving an exit via an IPO are daunting, at best. But, as we have all [...]]]> The VCP model can earn a Fabless Semiconductor Company (FSC) a higher valuation in an acquisition.  Why settle for less going it alone?

The vast majority of private FSCs are venture funded and, rationally, anticipate an exit through acquisition.  The statistics around achieving an exit via an IPO are daunting, at best. But, as we have all read, the valuations are much lower than they once were.  One of the reasons is, clearly, the recent valuations of the acquirers are lower.  But there is another reason, more subtle in nature, but it can be the difference between a good and a poor exit. Specifically, the FSC operations are so inefficient it drags down the purchase price from the acquirer.

The VCP can improve your value now, before the acquisition. Here’s how it works:

eSilicon is immediately improving the gross margins of its outsourced customers by 2-7%.  We do that by a combination of commercial and technical advantages we have.  Said differently, we aggregate buying power and technical skills into one, very efficient, company that supports our portfolio of customers with less waste and a broader skill set.

We can provide our customers with lower, not to exceed, guaranteed pricing (the internal ops team obviously can’t do that).  Further we finance the WIP which is of particular interest to some of our “cash challenged” customers (the internal ops team can’t do this). Also, we facilitate an OPEX reduction because we do the ops work as part of the unit price (the internal ops team can’t do this, either). Hmmm, what does the ops team do?

Anyway, when an acquirer arrives in your lobby it is typically a larger, successful firm.  Its folks look at the FSC’s financial performance; see the places to save cost (like eSilicon does) and tucks that away for future benefit…for them. 

The FSC does not get paid for the value the acquirer will bring post closing. eSilicon fixes that before you sell.

With our customers it’s different.  eSilicon has already found the savings and passed it to our customer who has increased unit gross margins, reduced OPEX, or both.  When the acquirer comes aknockin’ it finds a superior financial picture and, guess what, they have to pay more.

This is not theory.  It is happening today.  Just this week investment bankers came to see me to understand how their client’s financial performance improved so dramatically over a weekend. The answer: Customer outsourced its existing production to eSilicon and received an immediate, and guaranteed, lower price.

Everybody wins. The acquirer gets a more efficient and competitive target company.  The selling FSC gets paid for improvements they have already made.  The suppliers have a superior, efficient interface to eSilicon.  The bankers potentially get a higher fee but they certainly endear themselves to the VCs that invested in the FSC.

Waste is bad.  Small company, internal ops teams are wasteful.  The change is coming fast. Improve your margins before the acquirer knocks on your door.

There is a difference.  Synopsys has made it crystal clear that its [...]]]> It should be no surprise.  The industry has been consolidating and expanding and consolidating for nearly 40 years.  So, when Virage Logic (Virage) was gobbled up by Synopsys and Denali was ingested by Cadence, it is really a lot more of the same.  Or is it?

There is a difference.  Synopsys has made it crystal clear that its definition of EDA now permanently includes IP.  Not that acquiring Chipidea from MIPS was dabbling but, let’s face it, that deal rumored to be in the low tens of millions price range could have been construed as a bargain too irresistible to pass even if IP was not going to be mainstream.

That’s history.  EDA is now and forever defined as tools to design and stuff to design around.  After all, we just acquired tiny but formidable Silicon Design Solutions to have a large Asian footprint from which to grow; and along the way now find ourselves in the custom, dense memory IP business.  The piece, BTW, Virage never wanted to do…the custom compilers and instances. Even the Value Chain Producer (VCP) model is including IP and there’s no going back.  Not because we have to have it but, because, the customers want us to.   And we intend to acquire more.

With the rare exception of ARM, Rambus and Virage (and a few others) IP has been a bad business. IP needs the leverage of other value propositions and channels that it now seems to be getting; tools from Synopsys and chips from us.

So, for us, we now find ourselves in the interesting… and not yet enviable…position of selling the one piece of memory IP Synopsys doesn’t have.   Brilliant strategy?  Nah.  Like most things in Silicon Valley “brilliant strategy” is just the folklore that gets retro scribed after dumb luck serendipity. 

Don’t get me wrong.  We are thrilled with our SDS deal.  But, let’s face it, we had no way of knowing we would end up with the one piece of IP Synopsys doesn’t sell, or want to sell, so far.

What’s next?  Well, we can expect Synopsys and Cadence to make a run at every private or low market cap IP company.  The bet has been made and there is no backing out now.  The only question is how far will they go; is there an ARM/Synopsys deal on the horizon?  While it can’t be imminent, for reasons ranging from ego to ecosystem, it’s now for the first time not out of the question.  (If you doubt that just look at the rollup of the foundry business and the inevitable two and only two sources of CMOS wafers.)

And as for your trusted VCP… eSilicon will keep leasing tools and licensing IP and give the market what it really wants, which is neither tools nor IP.  We’ll give you first-time-right, working ICs with your name on to sell through your channels to needy customers.  And, unlike EDA, we’ll do it from your side of the table and with your goals in mind…our goals…every second of every day.

The basic need has yielded breakthrough innovation from IP companies large and small.  EDA methodologies to “assemble” blocks [...]]]> IP reusability has been a drumbeat in the semiconductor industry for a dozen years or more.  The thesis is simple: why build again what you already have?  And with most durable, simple statements, the foundation is one of profundity.

The basic need has yielded breakthrough innovation from IP companies large and small.  EDA methodologies to “assemble” blocks from preexisting inventions, and business models like the Value Chain Producer (VCP) that provide the margin of victory services to tie it all together.  After all, very few, if any, companies can track the specification and actual performance of IP blocks from dozens of suppliers.  VCPs do. That is one of our many functions.

As the industry samples 40nm parts and dabbles with 28nm test cases, the imperative for reusability is greater than ever.  To date, the form factor has been in cores and blocks.  But that must change and it will because even the most “reused IP’ on a 40nm device carries a too expensive NRE tab; reused or not.

The unit of measure for reusable IP is rapidly becoming the die. And the delivery mechanism is the Multi-chip module (MCM) or the so-called System-in-package (SiP). Call it whatever you like.  There is great promise in taking two die, perhaps both from your company or one from you and another from your partner, and creating a “device” that 1) goes to market faster, 2) has comparatively no NRE tab as compared to a 40nm development and 3) definitely runs the existing software.

Further, when it’s time to integrate an analog front end (AFE) or a GaAs RF radio, probably acquired from a partner, there is no better solution. 

But, there is also no free lunch. MCMs or SiPs carry their own class of risk.  They demand a level of packaging expertise that exceeds that held by most fabless companies; it’s die packaging, test, PCB and raw physics rolled into one unforgiving challenge.  And once that code is cracked you get to wade through the commercial issues; who owns the failure if the die comes from a partner?

eSilicon has developed many MCMs and SiPs for our customers including some of the world’s most demanding.  We consider it to be table stakes as a VCP charting new solutions ahead of the market demands.  We can’t make a mask set cheaper.  We can’t precipitously lower the cost of 3rd party IP.  But we can show you the way to get to market faster, lower your NRE and reuse the IP that either made you great or never saw the light of day…that’s what we do.

The Global Semiconductor Alliance, the GSA, is at the front lines of a great opportunity.  As the semiconductor industry has become a 24 hour per day, seven day per week flywheel of activity and innovation there is only one organization in the world poised to keep pace. 

It was no stray coincidence [...]]]>                       The opportunity of being Global

The Global Semiconductor Alliance, the GSA, is at the front lines of a great opportunity.  As the semiconductor industry has become a 24 hour per day, seven day per week flywheel of activity and innovation there is only one organization in the world poised to keep pace. 

It was no stray coincidence that precipitated the renaming of the Fabless Semiconductor Association, the FSA, to the current handle.  But more importantly, the renaming was no leap of faith or credibility. It was obvious and inevitable.

Over a decade ago Bob Pepper saw the need for the then fledgling fabless model to have a voice in a world dominated by massive IDMs and conglomerates.  And it wasn’t just Intel and TI.  United Technologies and GE were among the behemoths that saw both the business and strategic rationale to participate in an exciting space. The question in Bob’s mind I can only speculate (actually, he told me) was, “How do we get a toe hold against these global players?”  The result was the FSA.

Led then and now by Jodi Shelton, the GSA is no longer just the voice of the little guy but, rather, the eyes, ears, hands feet and voice of over 50% of the semiconductor market; GSA is the body of the industry and growing every day.

We grow in two ways.  The first is membership. Even many of yesteryear’s behemoths are members.  They see the value and the reach.  Secondly, there is an exciting geographic expansion that now incorporates Europe and all of Asia.  In fact, the new leadership for this fiscal is Chairman Nicky Lu, Chairman and CEO of Taiwan based Etron Technology Inc. and Vice Chairman Joep Van Beurden, CEO of CSR Plc of the UK.

The GSA is global in agenda, offices, staff, members and leadership.

So what’s the opportunity?  In my view it’s becoming the cross industry and intergovernmental advisor. With the momentum, reach and recognition the GSA now enjoys, what organization is better positioned to advise the other segments, like consumer products and automotive? And governments, both sophisticated in semis like the US and Taiwan, or neophytes like Vietnam and Brazil, can benefit around the implementation of their policies and investments shaded by the nuances of this critical, strategic business. We can be there, too.

Like many Board members of the GSA, I have participated regularly in discussions and programs in both vectors.  It is neither a luxury nor an option for GSA to take this role. Other organizations, like the Semiconductor Industry Association, the SIA, have a US only agenda and charter.  Their role is important but limited.  Semiconductors are international; the policies are international; and the markets are international….all the turf of the GSA.

Further, semiconductors are ubiquitous.  Like Michael Porter of Harvard said a decade ago, “There are no low tech industries; only low tech companies.”  Semis are at the hub of this statement and it is even truer today.  What organization is more prepared to consult with the lagging companies of the world and the thoughtful industries attempting to digest our wares?

The GSA has the heritage, leadership, support and perspective to play this role.  The question is will it pick up the baton and run like hell, or let some other lesser organization fill the vacuum.  My money is on the GSA and I intend to drive this agenda for the benefit of our members, our industry and our customers. 

It’s the right thing for all of us and a natural extension of the very vision and charter that conceived the GSA more than 15 years ago.

The Value Chain Producer (VCP) segment of the semiconductor industry was recently formalized by the GSA.  Needless to say eSilicon was delighted by the outcome as the first VCP.   That said, the most gratifying recognition from my perspective is the acknowledgement that the fabless world could benefit from [...]]]>                                                 A new model for the next era

The Value Chain Producer (VCP) segment of the semiconductor industry was recently formalized by the GSA.  Needless to say eSilicon was delighted by the outcome as the first VCP.   That said, the most gratifying recognition from my perspective is the acknowledgement that the fabless world could benefit from a business model designed to increase quality, efficiencies and access to technology.

Quality is addressed by a VCP through a variety of means but stems from the aggregation of skill sets and the opportunity to apply those same capabilities over again.  Said differently, the small or medium sized FSC simply cannot afford to have the breadth and depth of expertise in-house on the assumption that something may go wrong in a certain area.  To be sure, something will go wrong, but what; ESD, thermal packaging issue, a signal integrity problem…? No one knows in advance.

The well staffed VCP will have all the in-house disciplines required to spot and repair the unpredictable.  The result is a better chip in a shorter time frame.

The efficiency issue is critical.  Simply stated, there is too much waste in the fabless supply chain to continue to be successful from either the remaining IDMs or the largest FSCs. The competent VCP purges that waste.

Oh, margin stacking, you say.  Nope.  The VCP can’t sell you a chip for an above market price.  It’s irrational.  But it can buy the supply chain elements at a lower price.  It comes from aggregating purchases and the inherent strategic value to the supply chain when the VCP is calling on the prospect that is not on the monster supplier radar.

More importantly, VCPs save money by doing every day what many firms are now doing once in a while; and less all the time. (There are fewer starts.) If a VCP is good it will lay out a smaller die; yield more die per wafer; enjoy a shorter test time (and/or lower DPPM); diagnose and fix problems faster and, otherwise, develop a better, lower cost chip.  It is from these savings the VCP earns its margin….again; it cannot be earned by selling above market price.  In that case everyone fails including the VCP.

Access to technology boils down to continually learning what really works and when; IP is an obvious piece of this puzzle; accessing the inherent technology built into a given (often advanced node) wafer and, generally, knowing what raw elements make for a world class part.  Of course, this occurs by having the full team, continuous and repetitive opportunities to perfect methodologies and meaningful supplier relationships. 

Scott McNealy from Sun once told me, “Strategic partnerships are built upon stacks of purchase orders.”  He was right.  This fantasy that a company buying a few thousand wafers a year can have a deep, rich relationship with a multi billion dollar supplier is hubris at best, delusion at worst.

I am proud eSilicon is bringing this value…quality, technology and at market pricing to the industry.  It’s happening in FSCs and OEMs, of course, but even IDMs have their reasons to work with VCPs like us.

If you want to hear the rest of the discussion live with me, Aart de Geus, Rick Cassidy and others, please attend the Business Forum Panel at DesignCon 2010 titled “Outsourcing the Electronics Design Chain for Efficiency and Profitability” on Feb 2, 2010 from 9:00am-10:00am at the Santa Clara Convention Center.

I’m looking forward to making the electronics industry an efficient and profitable industry through my role as a VCP board member on the GSA.