VLSI

Electrostatic discharge

2009-02-26T07:07:00.000-08:00

The phenomenon of electrostatic discharge (ESD) gives rise to images of lightning strikes or the sparks that leap from one’s fingertips when touching a doorknob in dry winter. The sparks are the result of the ionization of the air gap between the charged human body and the zero-potential surface of the doorknob. Clearly a high voltage discharge takes place under these circumstances with highly visible (and sometimes tangible) effects. In the semiconductor industry, the potentially destructive nature of ESD in integrated circuits (IC) became more apparent as semiconductor devices became smaller and more complex. The high voltages result in large electric fields and high current densities in the small devices, which can lead to breakdown of insulators and thermal damage in the IC.

The losses in the IC industry caused by ESD can be substantial if no efforts are made to understand and solve the problem [Wagner93]. Figure 1.1 shows that the distribution of failure modes observed in silicon ICs and ESD is observed to account for close to 10% of all failures [Green88]. The largest category is that of electrical overstress (EOS), of which ESD is a subset. In many cases, failures classified as EOS could actually be due to ESD, which would make this percentage even higher [Merrill93].

The significance of ESD as an IC failure mode has led to concerted efforts by IC manufacturers and university research workers in the US, Europe, and Japan to study the phenomena. Progress has been made in understanding the different types of ESD events affecting ICs, which has enabled test methods to be developed to characterize their ESD [Bhar83][Greason87]. ESD prevention programs have been put in place during IC manufacturing, testing, and handling, which have reduced the buildup of static and the exposure of ICs to ESD. Studies have been made of the nature of destruction in IC chips and, based on this work, techniques for designing protection circuits have been implemented, which has made it possible for the present generation of complex ICs to be robust for ESD.

The introduction of each new generation of silicon technology results in new challenges in terms of ESD capability and protection circuit design.

Initially the ESD performance improves as the circuit designs mature and problems are solved or debugged. After a certain time the technology changes (i.e., LDD, silicides) cause the circuit to no longer function to its original capability, and the introduction of new protection techniques are needed to restore good ESD performance. CMOS ICs in automotive environments require very high ESD protection levels, which places an even higher demand on the design of protection circuits. The speed with which new technologies are introduced have reduced available time for protection circuit development. In fact it is becoming more and more important to design circuits that can be transferred into the newer technologies with minimum changes. Hence, it is necessary to understand the main issues involved in ESD protection circuit design and the physical mechanisms taking place in order to ensure that the design can be scaled or transferred with minimum impact to the ESD performance.

The importance of building-in reliability demands design approaches that include ESD robustness as part of the technology roadmap.

The design and optimization of circuits with ultrasmall transistors (sub-0.25 µm) use a large number of simulation tools prior to committing the circuits to silicon.
Thus, modeling and simulation of ESD effects in the protection circuit is important;
we discuss the main approaches here. The book is aimed at providing an overall
picture of the issues involved in ESD protection circuit design and analysis. It is
intended to provide a basis in this field for circuit design and reliability engineers
as well as process and device design engineers who have to deal with ESD in
integrated circuits.

Laplace transform Lab

2008-08-26T07:15:00.000-07:00

Please refer a text book for a very detailed study about Laplace transforms

Laplace Transform (LT) helps in converting differentiation, integration and many other complex functions into simple algebraic functions or expressions there by making the analysis of a system easier. LT are applied to systems which use continuous time signals and many a times on problems which involve absolutely non-integrable functions like impulse response of an unstable system. Also the convolution(shift and add repeatedly) also can be performed by pure multiplication after converting the functions into respective LT’s.

LT exist in 2 varieties namely Unilateral(one-side) and Bilateral(2-sided) transforms. Many properties are similar in nature hence studying one of them and extending it to the other form is felt easier(Changes to be mentioned where ever necessary).

Definition

LT of a function f(t) is defined as

It contains complex exponentials,e^-st and s= σ + jω

We will be using laplace transform to find the solutions of differential equations, Operations on elementary signals, checking the basic properties of functions etc.

Inverse LT can be achieved by complex contour integrals or by partial fraction method. We will be following the partial fraction method and then find the Inverse Laplace Transform

Let us start with some basic elementary functions (signals)

Unit step function

For an impulse function, sifting property holds good and this will be dealt later when we are taking the convolution of signals.

Properties of LT

Matlab programs

Some cautions before going in for the programs

1.Save the file name with no spaces

2.It must have *.m extension

3.Make sure you are committing any spelling mistakes for variables and functions

4.take care for right division and left division

5.Use “syms” for single character objects

6.Use “sym” for strings but make sure you put it in single quotes

7.Work out the problem by hand to make sure your results are correct.

8. If there an error displayed in a function then check for spelling mistakes. If it did not solve the problem then type the following lines in all your codes or type in command line
close all;
clear all;

Find laplace transform of e^-2t, 10e^-5t, te^-3t, 5d²y/dt²
/***********/
%Find the LT of e^-2t
syms t;
solution = laplace(exp(-2*t));
/***********/
%Find the LT of 10e^-5t
syms t;
solution = laplace(10*exp(-5*t));
/***********/
%Find the LT of te^-3t
syms t;
syms s; %can be omitted
solution = laplace(t*exp(-3*t));
/***********/
%Find the LT of 5d²y/dt²
sym ‘y(t)’;
solution = laplace(5*diff(‘y(t)’,2));
/***********/

Find the inverse LT of

1). Y(s) = 1/s – 2/(s+3) + 10/(s+1)
2). Y(s) = s(s+1)/((s+2)(s²+2s+1))

%Program for inverse laplace transform of Y(s) = 1/s – 2/(s+3) + 10/(s+1)
syms t; %can be omitted
syms s;
soln = ilaplace(1/s – 2/(s+3) + 10/(s+1));
/***********/
%Program for inverse laplace transform of Y(s) = s(s+1)/((s+2)(s²+2s+1))
syms s;
soln = ilaplace((s*(s+2))/((s+2)*(s^2+2*s+1));
/************/

Solve the DE by laplace transform
D²(y) + 12 D(y) +32y = 32u(t)

Initial and Final Value Theorem

Lt sX(s) = x(0⁺)
s->inf

Lt sX(s) = x(inf)
s->0

Matlab - Week 2

2008-08-08T09:50:00.000-07:00

Copy and paste the code below into a *.m file and then run the program.The file name must be saved with *.m extension , without spaces in between and no clashing of already existing functions in MATLAB Library

Example code for sinusoidal signals

%Generate Sine Wave
N=30;%Number of samples
t=-10:0.1:10;
x=sin(2*pi*25*t/N); %this is x(t)
plot(t,x)
title('Sine Wave');
xlabel('time scale');
ylabel('Amplitude');
axis([-70 70 -2 2]);
grid

Example code for square wave
%Square wave generation
A=2;
t = 0:0.0005:1;
x=A*square(2*pi*5*t,25); %5 Hertz wave with duty cycle 25%
plot(t,x);
grid
axis([0 1 -3 3]);

Example code for triangular wave
%Triangular wave generation
A=2;
t = 0:0.0005:1;
x=A*sawtooth(2*pi*5*t,0.25); %5 Hertz wave with duty cycle 25%
plot(t,x);
grid
axis([0 1 -3 3]);

Example code for rectangular pulse
%To generate a rectangular pulse
t=-5:0.01:5;
pulse = rectpuls(t,2); %pulse of width 2 time units
plot(t,pulse)
axis([-5 5 -1 2]);
grid

Example code for exponential signals
%Exponential signal
B=5;
alpha=5;
t=-1:0.1:1;
x=B*exp(-alpha*t);
plot(t,x);

%This part is for discrete signal
r=0.85;
n=-10:10;
y=B*r.^n;
stem(n,y);

Example code for decaying exponential signals
%Exponentially damped signal
A=10;
f=5; %5 Hertz
phi=0; %Phase info
a=6;
t=0:0.01:1;
x=A*sin(2*pi*f*t+phi).*exp(-a*t); %Elemental operation is required
plot(t,x);
grid

Elementary signals
%To generate a step signal
%Completely automatic
t=-2:0.01:2;
A=2;
len = length(t);
len_pos = length(find(t>=0));
u=A*([zeros(1,len-len_pos), ones(1,len_pos)]);
figure
plot(t,u);
axis([-2 4 0 3]);
grid

%Impulse function
%To generate impulse signal
delta = [zeros(1,(len-len_pos)+1), 1, zeros(1,len_pos-2)];
figure
plot(t,delta);

%Ramp function
%To generate ramp using step
u=A*([zeros(1,len-len_pos), ones(1,len_pos)]);
ramp = u.*t;
figure
plot(t,ramp);

Find Even and Odd signal
%Even and Odd signals
%Continuous time signal
t=-1:0.01:1;
len = length(t);
%Generate x(t)
x=sin(2*pi*t);
x_rev = sin(2*pi*(-t));
%Find Even and odd of x(t)
x_even = 0.5*(x + x_rev);
x_odd = 0.5*(x - x_rev);
plot(t,x,'r--',t,x_rev,'g-.',t,x_even,'m-',t,x_odd,'b*');
legend('x','x_rev','x_even', 'x_odd');
grid

Find the energy of the signal

%Find Energy

%To generate a rectangular pulse
t=-5:0.5:5;
pulse = 2*rectpuls(t,2.1); %pulse of width 2 time units
stem(t,pulse)
axis([-5 5 -1 2]);
grid

%Energy
Energy = 0;
t_mod = find(pulse > 0);
for i=t_mod(1):t_mod(length(t_mod))
Energy = Energy+ pulse(i).^2;
end
Energy

Operations that are checked are
1. Amplitude scaling
2. Addition
3. Multiplication
4. differentiation
5. Integration

Time scaling, reflection, time shifting

Example code to show all the operations on a exponentially damped signal
%Exponentially damped signal
A=10;
f=5; %5 Hertz
phi=0; %Phase info
a=6;
t=0:0.01:1;
x=A*sin(2*pi*f*t).*exp(-a*t); %Elemental operation is required
figure
plot(t,x);
grid

%Amplitude scaling
scale = 0.5;
y= scale * x;
figure
plot(t,x,'-',t,y,':');
grid

%Addition
figure
plot(t,x,'-',t,y,':',t,(x+y),'*');

%Multiplication
figure
plot(t,x,'-',t,y,':',t,(x.*y),'.');

%Time scaling
k=0.2;
scaled_time =t/k;
figure
plot(t,x,'g:',scaled_time, x);
grid

%Time Reflection
reflect_time = -t;
figure
plot(t,x,'g:',reflect_time, x);
grid

%Time shifting
shift = 1;
shifted_time = t-(-shift);
figure
plot(t,x,'g:',shifted_time, x);
grid

Matlab - First week

2008-08-03T09:01:00.000-07:00

Let us start with Simple calculations

1. Addition
2. Multiplication
3. division
4. Exponential(exp)
5. trigonometric (degrees must be converted into radians)( normal and arc normal fns)
6. Logarithimic log and log10

Some of the common functions that may be handy in dealing with many signal applications.

abs Absolute value
sqrt Square root
sign signum fn
conj conjugate of a complex number
imag imaginary part of a complex number
real real part of the complex number
angle phase angle of Complex Number
cos,sin,tan
exp
cosh, sinh,tanh, asin,asinh
round
floor
fix
ceil
rem --> remainder of division

Variable Name rule

Must have letters and digits
Start with a letter.
Special characters are not to be part of the name.
pi,i,j and e are reserved words
names of functions and Matlab commands cannot be used as variable names
variables are case sensitive.

All commands are to be entered in lower case.

Whenever a help is needed type "help command_name" in the command window

Vectors

Row vectors

U=[1 2 3];
V=[4,5,6];
U+V

W=[U,3*V]

sort(W) à sorting in ascending order

Colon notation
a:b:c à sequence of numbers starting with a and end with c in steps of b
1:0.5:2
1:10 automatically unit step size is assumed
1:-1:10 à shoots an error message

Can operate on a section of a vector

W=[1:5, 7:9]
W(4)

W(5:-1:1) à to reverse the vector

[M,N] = Size(W)

Column Vectors

X=[1;2;3];
Y=[4;5;6];
X+Y;

Z=X’ would do a Transpose on X

C=[1+i, 1-i]
D= C’
E=C.’

To store all texts
“diary filename”
diary on/off
save filename
load filename

"who" command displays all the variables used so far

whos --> More details on variables

Elementary Plots and Graphs

To generate a sine wave

N=30;
step_size=pi/N;
x=0:step_size:pi;
y=sin(x);
plot(x,y);
title(‘Sine Wave’);
xlabel(‘x’);
ylabel(‘sin(x)’);
grid
plot(x,y,’m+’)

To plot cos and sine fns
N=30;
step_size=pi/N;
x=0:step_size:2*pi;
plot(x,sin(x),’b-‘,x,cos(x),’m-.’);
legend(‘sine’,’cosine’);
grid
xlabel(‘x’);
ylabel(‘functions’);
title(‘Cosine and Sine Function Plot’);
hold off

Subplots

samples=30;
step_size=2*pi/samples;
x=0:step_size:2*pi;
subplot(121);
plot(x,cos(x));
xlabel(‘x’);
ylabel(‘cosine’);
grid;
subplot(122);
plot(x,sin(x));
xlabel(‘x’);
ylabel(‘sine’);
grid;

axis([0 10 0 100]) à scale the graph with x-axis in [0,10] and y-axis in [0,100] range

Matlab script file
always has a *.m extension.

Please see you have added the directory to the Matlab search path in which you are saving your files

Working with vectors and matrices

Significance of “.” (Element by element operation)
.+, .*, ./

To square a Matrix of size 3 x 3
A=[1 2 3; 4 5 6; 7 8 9];
A.^2

Experiment with A^2

U might have already studied Linear algebra(I guess)
If u have a matrix say U and you want to find the norm of U or the euclidean distance

We would use sqrt(U*U’);
Other way of finding this is norm(U);

How to find the angle between two vectors

Let X=[1 2 3] and Y=[4 5 6]
Angle between X and Y is theta = acos((X.Y)/(||X||*||Y||));

To tabulate the results
X=[0:pi/10:2*pi]’;
[X sin(X) cos(X)];

Other useful functions

zeros à vector elements with 1 as value
ones à vector elements with 1 as value
rand à random matrix
eye à Identity matrix
diag à diagonal matrix

for loop
while
if else elseif
input

Writing UDF
function output_arguments = function_name(input_arguments)
%comments go here

semilogy to change the axis to logarithmic y axis
disp(‘Hai’);

simplify((xˆ3 - yˆ3)/(x - y))
differentiation : diff(x^3)
integration : int(x)

Last tip: Use ctrl C to stop the execution
Finally home work on right division and left division

This post is possible because if lot of books which are available, so many documents available on the internet and many university notes.

How to Learn Verilog?

2008-07-29T22:26:00.000-07:00

In this article on how to learn verilog easily and efficiently in a very short time period. Before plunging into the details there are some basic requirements that is neccessary in going ahead with our exploration of Verilog language.

Verilog is a Hardware Description Language and so is basically used to model a hardware. Verilog is very much similar to C language and hence it is really very easy to capture the ideas even for a software programmer. In order to get started with the programming using Verilog language we need a verilog simulator hence one of the many simulators available like ModelSim, HDL Designer, Synapticad etc (Student versions)can be downloaded. We have just a step closer to learning verilog and the next step would be to download a choose a very simple book like Verilog Primer by J Bhasker, Verilog HDL by Samir Palnitkar or any verilog tutorial available on the web. Care has to be taken not to get a tougher book in the initial stages and getting into finer details. Our main important notion is to experiment with the language and hence as we go along when needed get into finer details.

Now we are prepared with the neccessary tools so we can go ahead in testing our new program by installing the simulator already downloaded. Many books start with history so you can skip all those and then move to the first program. Type in the same manner as printed or use the help file that is provided along with the simulator to know the basic components, features etc. Always start with a very simple model like AND gate, OR gate etc and move on to adders, subtractors etc. By doing this we can feel the confidence in our capability and hence we can learn enthusiastically in a very short time.

When all these steps are implemented you are ready to grasp more than what was mentioned previously hence now you are advised to go into finer details and check with the simulator. Happy learning Verilog Programming Language. You can also contact me if you some more help in dealing with the language. I would be glad to help you any time. In the mean time if you found this article helped you please leave a comment.

Book mark this page http://vlsitech.blogspot.com or leave a comment or suggestions to make further improvements.

VLSI Interview Questions- Part 4

2008-07-29T10:38:00.001-07:00

1. What is rule of ten?

2. Define Noise Margin?

3. Design a controlled inverter?

4. Define Fan-in?

5. Why Open collector Outputs are provided in IC's?

6. What is meant by RoHS compliant?

7. Convert Octal(728) into decimal

8. An analog signal is sampled. What is the kind of signal now exist at the output of sampler?

9. A 10 bit ADC is given to sample a +/- 5V signal. What is resoulution of the ADC?

10. What is FIR? What is that which is finite?

11. What is difference between Glitch and Jitter?

12. What is the Latch up problem?

13. What are the timing components of a latch's clock and F/F?

14. Given 3 types of clocking ie Pulse mode clocking, Edge triggered clocking, Two Phase
Clocking which one do you chose and why?

15. Why is hold time negative sometimes and what does it signify?

VLSI Interview Questions - Part 3

2008-07-25T11:08:00.000-07:00

What is Molecular beam epitaxy?

What is Scanning tunneling microscopy?

number of holes in a conducting metal?

Testing and verification difference

Defect Based Testing

What is yield loss?

what is Rent's rule?

GaAs is a piezo electric. Is it true?

How many lattices are there in a 3D crystal structure. explain?

How to achieve high throughput from a digital design?

Difference between Iterative and Pipelined implementation?

How to reduce latency in a Pipeline design?

What is the effect of removing pipeline registers in a design to latency?

How to calculate the Maximum frequency of the clock in a digital design(Sequential)?

What is Flatten Logic structure?

What is register balancing?

Define wander and Jitter?

VLSI Interview QUESTIONS(Part 2)

2008-07-23T02:01:00.001-07:00

1. Write a stick diagram for basic gates

2. Define the parasitics present in a MOSFET

3. I V characteristics of a MOSFET?

4. Why is the current constant in a VI characteristics?

5. On increasing Vgs beyond threshold voltage there is a reduction in current using the normal diode equation why?

6. What is Channel Length Modulation?

7. Write a SPICE program for instantiating a MODEL of MOSFET?

8. What is Charge feedthrough?

9. What is transconductance and mention some features?

10. Metastability

11. How is Sensitivity of a Voltage reference defined?

12. What is thermal voltage and how much is the value?

13. Why is 0.7V the minimum voltage of a diode?

14. Draw CMOS amplifier characteristics?

15. What is ringing voltage?

16. A circuit with a FB diode and battery is wired. Where does the electrons and the holes flow in the circuit?

17. What is totoem pole arrangement. Why is it necessary?

18. What is 1/f Noise and how does the noise vary in PMOS and NMOS?

19. Design flow of a VLSI Design?

These questions are contributed by friends and many knowledgeable people across the globe. Their contributions are appreciated.

For ANSWERS do mail me

VLSI INTERVIEW QUESTIONS(part 1)

2008-07-23T01:20:00.000-07:00

The questions listed below are some of the questions that were asked in VLSI interviews

1. What is Bird's beak?

2. Is there any negative frequency? If so what are its implications?

3. Why GaAs is advantageous over Silicon?

4. In fabrication GaAs cannot be everywhere why?

5. Why Gold is used during fabrication?

6. Why is Silicon used more than GaAs? (Technical points only)

7. Silicon's advantages over GaAs

8. State Moore’s law.

9. Design the 4:1 multiplexer circuit using TG switches.

10. Design a 4:1 mux using three 2:1 TG multiplexers.

11. Consider the 2-input XOR function.
a) Design an XOR gate using a 4:1 mux.
b) Modify the circuit in a) to produce a 2-input XNOR

12. Design a CMOS logic gate for the function f= a.b+a.c+b.d

13. Design a NAND3 gate using an 8:1 mux

14. Design a NOR3 gate using an 8:1 mux as a basis.

15. A sample of silicon is doped with arsenic with N_d = 4 x 10¹⁷ cm³. Find the majority carrier density, minority carrier density and calculate the electron and hole mobilities and then find the conductivity of the sample.

16 A region of silicon is doped with both phosphorus and boron. The p-doping is N_d = 2 x 10¹⁶ cm^-3while the B-doping level is Na =6 x 10¹⁸ cm^-3. Determine the polarity(n or p) of the region, and find the carrier densities.

17. Four nFETs are used as pass transistor . The input voltage is set to Vin=Vdd=5V and it is given that Vth= 0.75V. Suppose that the signals are initially at (1,1,0,0) and are then switched to (0,1,1,1). Find the value of Vout.

18. Design a driver chain that will drive a load capacitance of C_L =40pF , if the initial stage has an input capacitance of Cin =50fF.Use ideal scaling to determine the number of stages and the relative sizes.

19. Explain the DCcharacteristics of CMOS inverter

20. What is switched capacitance?

21. How switched capacitances are useful in design?

22. Use only 2:1 Mux to create a Full adder

23. Why should the testing be done?

24. Write S&H Equation?

25.Difference between MOSFET, MISFET, MESFET?

26. Which terminal in a transistor has the largest area? why?

27. Draw a current mirror circuit?

28. Define Slew Rate and CMRR in an Opamp and its characteristics?

29. Different A2D converters and advantages over the other?

30. CMOS advantages and disadvantages

31. What is Verilog and how is it useful?

32. VLSI simulation is given importance why?

33. How many terminals are present in a MOSFET? and define their characteristics?

34. Frequency spectrum ranges?

35. What is STA(Static timing Analysis)?

36. Where is NMOS used and why?

37. Draw capacitance curve of MOSFET?

38. What acid is used to remove Silicon Nitride?

39. What acid is used to remove Silicon DiOxide?

40. What is Dry Etching(Plasma Etching)?

41. What is SOI and mention its advantages?

42. What is LOCOS how is it different from normal techniques?

43. Threshold voltage and Body effect are related how?

The questions are contributed by friends, colleagues and WWW. All contributions are appreciated.
To get the ANSWERS do mail me.

VLSI Seminars Topics

2008-07-20T07:55:00.000-07:00

You can find many seminar articles on Automobiles, Electronics, Computer Science, Information Technology etc. Find Here....

STATIC TIMING ANALYSIS

ANALOG MEMORIES

NANO-RAM

ORGANIC LED

M-RAM(MAGNETO RESISTANCE RANDOM ACCESS MEMORY)

MULTI THRESHOLD CMOS

LOW LEAK TRANSISTOR

MESFET

SINGLE ELECTRON TUNNELING TECHNOLOGY

EXTREME ULTRA VIOLET LITHOGRAPHY

MEMS (MICRO ELECTROMECHANICAL SYSTEMS)

PHOTONIC INTEGRATION OF HYBRID SILICON

THESE SEMINAR TOPICS ARE CONTRIBUTED BY FRIENDS FROM VARIOUS INSTITUTES. THE BLOG OWNER THANKS THEM WHOLE-HEARTEDLY.

LOOKING FOR GOOD ARTICLES AND THEIR CONTRIBUTION WOULD BE RECOGNISED.

VLSI Articles

2008-07-15T07:37:00.000-07:00

Articles which were found best for a VLSI beginner are listed below. Links are provided to read the full article.

Latest Articles

Three dimensional Chip Design

The three dimensional (3-D) chip design strategy exploits the vertical dimension to alleviate the interconnect related problems and to facilitate heterogeneous integration of technologies to realize system on a chip (SoC) design. By simply dividing a planar chip into separate blocks, each occupying a separate physical level interconnected by short and vertical interlayer interconnects (VILICs), significant improvement in Read more...

Intel, AMD... Why not more?

Why is it that the CPU market has so few players? Is it entirely a practical, technical issue of getting a physical plant up and running? What's more to the precious "CPU space"? Why can't we see more competition than just the Intel and AMD that we have now? Read More

Demand for engineering talent to double
The semiconductor industry in India is growing at a scorching pace of 25% against the global average of around 5% every year. The long-term prospects too look encouraging with government chipping in to support the industry. Read More...

Solar, Semiconductor Project Proposals Worth Rs.80,000 Cr. Await Indian Govt. Nod
The Special Incentive Package Scheme or SIPS, notified last year by the Indian Government to encourage investments in semiconductor fabrication and other micro and nano technology manufacturing industries, has attracted nearly a dozen proposals together worth Rs.80,000 crores that include corporate giants like Reliance Industries, Videocon and Tata BP Solar, the media reported. Read More...

Hynix to Produce Semiconductors for Vehicles
Hynix Semiconductor, the world's No. 2 dynamic random access memory (DRAM) chip manufacturer, has secured another springboard Monday to spur its strategic contract-based foundry business by forming a tie-up with a local fabless company.

Hynix said it has signed a binding agreement to buy a 5 percent stake in C&S Technology for 4.5 billion won ($4.5 million) and jointly develop semiconductors used in automobiles. Read More...

VLSI Text Books

2008-07-14T01:07:00.000-07:00

Semiconductor Device Physics and Design --> UMESH K. MISHRA & JASPRIT SINGH

CMOS Digital Integrated Circuits: CMOS Digital Integrated Circuits by Sung Mo Kang and Yusuf Lebelci

DSP: DSP by Proakis and Signals and systems by Simon Haykin(Reference)

Maths: Do not purchase any book, Use the books which were used in BTech and utilise the library

Digital Hardware Modelling: Verilog HDL by Samir Palnitkar

Solid State Devices: Professor follows Jasprit Singh and StreetMan(good) but you can use the book by Sima djimitrijev and Donand Neaman, Anderson for better understanding. But referring too many books may confuse the terminologies so kindly follow a single book.

Advanced FPGA Design ---> Steve Kilts

Silicon Processing for the Vlsi Era: Process Technology --> Stanley Wolf and Richard N Tauber

Silicon-On-Insulator Technology: Materials to Vlsi --> Jean-Pierre Colinge

Silicon Wafer Bonding Technology for Vlsi and Mems Applications

Computer Aids for VLSI Design

Design of VLSI Systems

Introduction to VHDL by Peter J. Ashenden

Verilog synthesis Interoperability 1364.1 a standards draft document

Application Specific Intergrated Circuits By Michael John Sebastian Smith

Contemporary Logic Design by Randy H. Katz, University of California, Berkeley

The Scientists and Engineers's Guide to DSP

Digital Systems design with FPGA's by Ion Grout

More Books can be found here

VLSI Projects

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VLSI field is capital intensive hence project in this field is little, only design implementation in the software. Once everything works fine and the design is practically feasible then we may look for Fabrication. But as a starting point many students use IEEE papers and try to simulate the results obtained, Intellectual Property(IP) cores, Simulation of a design using IP Cores, Physical implementation of Small circuits etc.

Example of Project Ideas

Interconnect Models

Physical Layout implementation of Different kind of adders, multipliers and their comparisions.

Microprocessor core generation

(DSP) Algorithm Implementation etc

Protocol Implementation like CAN, AMBA

Try to visit a University website and you may find many projects which are done. Many times ideas, their implementation would be found and if you are lucky may end up with the design code.

But my suggestion would be not to take any project just like that and show it instead try to add your own design and see the change in this way you will be helping the field and you would gain confidence once you are in job.

If you need any help on a project please contact me. If I am able to help I would be glad to do it.

I would be glad to make projects for you, for some small payment.

Some of the VLSI Institutes

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The list provided is only what I came up with. You may help me in adding some more institutes to this list.

Bit mapper PUNE

VEDAIIT Hyderabad

Sandeepani Hyderabad & Bangalore

Accel Technologies Chennai

VEDANT Chandigarh(Now part of ISRO)

Maintec Bangalore

PICT SITM Pune

SSI Chennai

Horizon Semiconductors & Networking Solutions Chennai

CMC Limited, Centre Of Excellence in IT Kochi

ATIIT (P) LTD Chennai

Career Avenues Bangalore

UTL Technologies Ltd Bangalore

REAL TIME EMBEDDED AND VLSI LABS Chennai

Trident Techlabs Pvt. Ltd. Pune

Teknowedge Quality Management Services Pvt.Ltd Bangalore

HI-TECH END Mumbai

MindstormGlobalTechnologies Chennai

SIMSHODH Bangalore

ISRDO Delhi

Courtesy of many other VLSI Websites for this comprehensive list.

VLSI Softwares

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Cadence, Synopsys, Mentor Graphics are the major EDA software tool vendors. Xilinx, Altera, Actel holds the major market share in FPGA/CPLD. Most of the FPGA Vendors have their own EDA Tool to program their FPGA/CPLD or products.

Simulators(Verilog and VHDL)

ModelSim® SE

HDL Designer

Cadence NC

Iverilog

Synthesis tools

Precision RTL

Leonardo Spectrum

FPGA Advantage

Physical Design tools

Tanner

MAGIC Layout Editor

Alliance CAD Tools

OCEAN
& nbsp; Irsim

Gtkwave

PSPICE / Hspice

Free VLSI Tools

MAGIC Layout Editor

Alliance CAD Tools

OCEAN

Iverilog

Irsim

Gtkwave

ISE Webpack

FPGA Development

Xilinx ISE™ WebPACK™ Software

Altera Quartus^® II Software

Physical Design tools list are yet to be added

The List does not stop here. Many new companies are emerging and hence there is a very stiff competition in the number of EDA company's products.

VLSI Course Syllabus

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Typically in a VLSI Design course what is expected is to learn how to program an FPGA, Understand an indepth analysis of semiconductor technologies for back-end design. So in order to keep the students abreast of the latest many universities have their own syllabus but the major areas of focus in a VLSI Design course is

Basics of VLSI

Semiconductor Physics & modeling

Modelling of Digital Systems using HDL(Verilog or VHDL or System C)

VLSI SYSTEM DESIGN AND TESTING

ANALOG and Mixed Signal Design

COMPUTER AIDED DESIGN FOR VLSI

Modeling LAB using either Verilog or VHDL, Physical design layout tools etc.