Thinking Inside the Box-Excerpts

Traffic Information with all the senses

2006-12-23T20:12:00.000-08:00

When it's not building neck-numbingly bad seats, or eye-wateringly ugly executive saloons, BMW is actually quite a clever company. It's got next-generation telematics right. The best way to improve safety is to share up-to-the-second data about road conditions with the cars that are actually on the road. And the best way to do this without needing to violate the laws of physics is to adopt a peer-to-peer system, in which cars communicate directly with their neighbours, rather than going via a central control point. Of course it helps to have a central co-ordinating point as well – partly to collate data and to send it to vehicles that are out of sight of other cars, but also to check whether the data from any particular car is trustworthy. This is how BMW's XFCD (Extended Floating Car Data) system seems to work

To date, telematic services have only worked through the intermediary of a traffic centre which compares and analyses up-to-the-minute traffic information from various sources and then, for example, passes on traffic jam warnings to all participating vehicles. So vehicles have been playing a role in providing specialist traffic information services for years. With FCD, the Floating Car Data System, the vehicles - which are fitted with a GPS receiver and a mobile phone module - send information about their speed and position to the traffic centre. Cars known as 'Floating Car Data Vehicles' have been on the roads since 1999, "some 40,000 in Germany", according to traffic researcher Susanne Breitenberger from the BMW Group. However, according to Breitenberger, the drawback of this system is that "it costs a relatively large amount to transfer a relatively small volume of data".So she and her team of traffic researchers are working on an advanced version of data logging called Extended Floating Car Data, XFCD for short.

XFCD cuts out the middle man - the traffic control centre - and the vehicles can swap the information they have calculated directly with one another," Breitenberger describes the benefits. XFCD uses much of the vehicle-generated data which is already available in the vehicle in order to obtain a comprehensive picture of the traffic situation: Are the lights on, are the wipers working, what are the rain and ABS sensors reporting? In the future, the special software - very little additional equipment is required - will be able to calculate not only travel times, but also congested exits and junctions, jam conditions and the weather and road conditions. Conclusions can be drawn about local risks such as black ice and aquaplaning, and on the current traffic situation, directly within the vehicle. Finally, the car sends information to the traffic centre and transmits information direct from the vehicle to other affected vehicles in the area. Another benefit is that "XFCD is more cost-effective because its 'back-channel referencing' sends only that information which is really needed to the traffic centre," says Breitenberger. This means that a vehicle with XFCD which is stuck in a traffic jam and has been given the information over the radio can register that the information is correct, so it is not reported to the traffic centre again. The result: "The system generates traffic information and sends this on a 'need to know' basis. By using the new XFCD system, we are saving money on communication relative to the FCD system, while at the same time improving the quality of the traffic information put out," says Breitenberger. At the same time, the system not only enables the information calculated on board to be compared with the traffic reports on the radio, but XFCD also checks that the traffic jam reports are still accurate. So the system sends up-to-date information directly to the traffic centre if, for example, a traffic jam has cleared.

What makes XFCD special is that the customer does not have to fit additional hardware into the car. The system works using the existing vehicle architecture, only software is added," stresses Breitenberger. After all, plenty of information besides the speed is already recorded in the car. The introduction of modern on-board computer systems allows the combination of a wide range of available data. This can be used to find out information about the traffic, the road conditions and the current weather. This includes data from, for example, the navigation system, the headlights, the air-conditioning system and rain sensors on the windscreen wipers. The system processes this data and determines the current condition of both traffic and the roads. This means traffic and risk situations, such as black ice, rain or fog, can be detected immediately. "For example, adjusting the Dynamic Stability Control (DSC) in conjunction with a low external termperature, high wiper frequency and correspondingly low speeds translates into a local risk of slipping because of ice or oil on the road," explains Breitenberger. The traffic researcher is optimistic that XFCD can be implemented quickly. Based on her calculations, which were drawn up for the city of Munich, if there is just 7.3 percent takeup on XFCD technology in vehicles, the traffic situation could be reliably determined on 80 percent of the main streets of the city.

The BMW Group has already proved that the new technology works in practice by demonstrating the system on a special test track as part of the "Innovative Mobility Showcase" in San Francisco. As its base scenario, the BMW selected a situation where one of the three vehicles came onto a slippery road surface. The vehicle processes all the information from the vehicle sensors and warns the following vehicles in real time. At the same time, the data is forwarded to a traffic centre. Information gathered by XFCD vehicles on the traffic situation on the public highways can be viewed on the internet and made available directly as traffic information to all road users.

XFCD is being implemented at the BMW Group in line with the BMW ConnectedDrive system. The basic philosophy is the networking of the driver, the vehicle and the environment using telematics, online and driver assistance systems in order to make driving safer and less congested.

Freescale's Ultra-Wideband Brings Wireless Capability to In-Car Entertainment

2006-11-18T21:33:00.000-08:00

Freescale Semiconductor's Ultra-Wideband (UWB) wireless technology is bringing new capabilities to auto infotainment systems. Representing the first auto application to leverage UWB, a wireless video system using Freescale's UWB solution , demonstrates the potential for wireless in-car entertainment systems.

The wireless video system is being shown in a seven-passenger sport utility vehicle (SUV). Leveraging Freescale's UWB, it is able to simultaneously stream two separate video streams to two liquid crystal display (LCD) screens mounted on the back of the driver and passenger headrests, eliminating the need for cables and wires to connect the video server located in the vehicle. An additional two screens, located on the back of the headrests on the second row in the vehicle, wirelessly receive video using 802.11n technology, showcasing the coexistence of UWB with other wireless solutions. This product concept highlights the potential for wireless video and audio entertainment systems used in cars, trucks and SUVs.

"Car multimedia -- or infotainment -- is an ideal application for Ultra-Wideband," said Martin Rofheart, director of the UWB Operation at Freescale. "Delphi, as a global leader in transportation technology, has leveraged its innovation and expertise to lead the development of a UWB-powered video application for the auto industry. This demonstration today is an important milestone and gives attendees a look at the future of auto infotainment."

The potential for wirelessly linking other infotainment systems within the auto, such as gaming or global positioning system (GPS), are easily realizable using UWB, due to the high data rates and low cost of the technology.

With the ability to eliminate wires and cables to individual screens in the auto, which in turn reduces the size and cost of the unit, UWB can help manufacturers deliver a high-quality, low-cost in-car entertainment system. Currently, auto manufacturers are finalizing specifications for 2009 and 2010 models, and the availability of Freescale's UWB solutions now provides these manufacturers with a viable solution for their wireless infotainment systems.

Freescale's UWB solutions enable high rate transfer of video, audio and data streams wirelessly. With wire-like quality, UWB brings a new wireless option to auto, consumer electronics and PC/peripheral manufacturers. Using UWB, for example, an MPEG2 movie or HDTV stream can be broadcast in real-time wirelessly. This allows consumers new freedom in the use of multimedia-centric products, as they no longer need to be connected with wires.

Will we ever need memory in excess of 640k? - Part 3

2006-11-18T05:48:00.000-08:00

Coming to the last and final section of this article, am sure you are well aware that verification does pose some problem to Embedded designers. This section deals with the methods to tackle them. I will try and keep it simple so its easy to comprehend.

Current-based simulation

Active MOS devices are intrinsically current-based devices and a current-based model reflects this behavior significantly better than a voltage-based model. While a voltage-based model provides important information about transistor behavior, it has several drawbacks in terms of accuracy for current measurements, stability in simulations and size of the resulting matrix.

Current-based models are not only as accurate as Spice or Spice-like models, but they also simplify the topological structure of the equivalent circuits. This greatly improves the solution of non-linear equations and matrices. Additionally, current-based models are very efficient in device representation and require less memory than voltage-based models. This helps a great deal in addressing the large physical memory requirements when simulating large embedded memories.

Multi-engine architecture

An embedded memory circuit profile is unique in that it consists of digital, analog and mixed-signal blocks that closely interact with each other. Other features are the large replication of circuit structures and the small amount of active circuitry at any given clock cycle. The memory in itself can be decomposed into basic transistors, bit-cell blocks, decode blocks, interconnect structures and multiple other design entities that each share a unique simulation profile.

When considering a circuit for simulation, traditional fast Spice simulators use one monolithic engine to tackle all the varied elements in the circuit. This is inefficient and the performance degrades as the processes become more complex (as they do at nanoscale) and the designs get larger. On the other hand, a multi-engine architecture helps in a couple of ways - Uses a dedicated engine to optimally handle a particular memory circuit component and Provides an efficient infrastructure for managing and parallelizing the simulations.

The use of multiple, dedicated engines also results in the ability to produce greater performance in the simulation of embedded memory designs while increasing the accuracy of simulations.

Intelligent topological assessments

Recognizing an independent repeated structure or partition of a layout-extracted memory circuit, especially when there are millions of coupling caps and resistors, is tricky at best. Given that this dependence varies with input and resulting control signal changes, partitioning a circuit becomes all the more challenging. Algorithms that can intelligently recognize these partitions/memory topologies and appropriately guide the simulation to use these partitions are crucial to the speed and capacity of the fast Spice simulation.

Advanced interconnect evaluations

For embedded memory designs, parasitic loads are the predominant factor in signal delays and the numbers of parasitic elements outnumber active devices by a ratio over 4:1.

At the nanometer level, the composition of this interconnect is unique and complex. Dedicated algorithms have been developed that recognize these interconnect structures, model them accurately and simulate them efficiently. This is accomplished without affecting either the accuracy or the physical effects associated with that interconnect. This greatly enhances the speed of simulation as well as the capacity of the fast Spice simulator.

Conclusion

Embedded memory designers face an uphill task in design with several areas that are outside their realm of control. Escalating mask design complexity and cost severely limit design iterations. Newer methodologies will need to be adopted to streamline the design cycle. However, there are exciting developments on the embedded memory design simulation and verification front.

Fast Spice simulation technology designed to address the emerging challenges of nanometer designs greatly helps reduce the burden on the thankless designer. By having the high speed to accurately simulate the complex embedded memory structure, a novel technology such as this helps to drastically shorten the design cycle.

With its large capacity to rapidly verify chip-level netlists with parasitics, the next generation fast Spice simulator greatly improves the robustness of the design and reduces the time to market. If the embedded nanometer memory design challenges are to be tackled head-on, it is imperative for designers and design managers to seriously start considering the use of next generation fast Spice simulation and verification technologies into their design flows.

Will we ever need memory in excess of 640K? - Part 2

2006-11-18T04:02:00.000-08:00

so in the first part of this article, I had mentiond that am embedded designers main concers are high speed operation, low power consumption, robustness and process compatibility. Let's dwell into these in this section.

Designing for high speed operation

Designing a fast read/write operation for nanometer memories requires consideration of several key issues, such as banking, power delivery, clocking speed, sense-amp sensing and timing, the wire loads on the bit lines, and the reference voltage and word-line driver strength, to name just a few.

In traditional sub-micron designs, pessimistic designers performed a critical-path analysis with a wire-load model with lumped parasitics that reflected the worst-case read/write scenario. While this provided an adequate lower-bound estimation of the design performance, a considerable amount of potential power savings and performance was wasted.

Given the coupling and interference issues, approaching nanometer embedded memory designs with lumped parasitics is unacceptable. Today's design flows utilize comprehensive load models with silicon-accurate parasitic values and simulating the designs as is, rather than abstract models of older flows.

Designing for low power consumption

Power measurement is a system-level activity requiring a comprehensive operational view of the module and the blocks that interact with it. Understanding power consumption in embedded memories requires a better understanding not only of the memory's V-I profile over combinations of read-write cycles, but also the power profile of the surrounding blocks that the memory interacts with.

Leakage power increases with lower geometries and is exacerbated with today's low-voltage transistor thresholds. It is therefore essential to consider all these elements in the memory along with the clocks and switching signals and be able to accurately simulate the entire design to estimate the power consumption.

Designing for robustness

The robustness requirement of the ideal embedded memory that includes redundancy, instance-specific simulation, and so on, further strains the capabilities of nanometer design flows. High robustness requires comprehensive verification and characterization of the entire memory.

Today's embedded memories in an SOC design vary from 2 MB to over 20 MB. For a robust design, one must not only simulate the critical path but also the entire memory with associated parasitics. This, alas, produces very large transistor-level netlists that may be multi-GB in size.

Current transistor-level simulation tools provide a less-than-adequate solution to this critical problem as they are either too slow or quickly run out of capacity to handle these very large netlists. To design a highly reliable embedded memory, precious computation resources are expended in lengthy verification and characterization runs, which have a detrimental effect on the design cycle time and the time to market.

Designing for physical effects at nanoscale

SOC designs at the nanometer level have a distinct set of physical effects that need to be accounted for. The current practice of estimating the transistor behavior on silicon is done through esoteric models and is just that: an estimate. This estimation served well when digital operations were granular enough to ignore a lot of electrical effects (noise, leakage current, coupling, etc.) and physical effects (well proximity effect (WPE), sidewall capacitances, and so on).

As geometries and voltages scale down, these effects can no longer be ignored and the ability to accurately predict silicon behavior has become much more complex. In an attempt to account for these effects, nanoscale transistor models have incorporated parameters designed to reflect physical effects such as WPE, STI (shallow trench isolation) LOD (length of diffusion) effects, sidewall and non-linear capacitances, resistances, and so on. While this intricate modeling helps to provide a better estimation of the behavior of the circuit in silicon, it has the unfortunate side-effect of increasing the simulation time by traditional simulators by as much as 20 percent.

Studies have indicated that over half of the time in the design cycle is spent on verification. As future embedded memory designs add functionality through integration, it only lengthens the verification time requirement. While new processes help embedded memory to be compatible with logic processes, the physical effects get more pronounced at the nanometer level and cannot be abstracted away with simplistic voltage-based device models.

As designers are quickly realizing, the most effective path to assure reliable operation of the embedded memory is to simulate it at the transistor level. In order for designers to achieve a successful embedded memory design, they must accurately simulate very large memories in a comprehensive manner in a relatively short amount of time. Judging from the extensive designer feedback we have obtained from numerous customers, there are no adequate solutions in the marketplace.

Several static timing analysis (STA) tools exist that provide a fast solution by abstracting key memory blocks, but these tools must trade off accuracy to achieve this speed, which results in analyses that may be off by more than 25%. For designs larger than 130nm, traditional fast Spice simulators provided a relatively good solution with a combination of accuracy and speed, but their performance quickly deteriorated as the size of the memories increased and nanometer physical effects became more pronounced.

So whats the key? These are discussed in Part three.

Happy Designing

Will we ever need memory in excess of 640K? - Part 1

2006-11-18T03:23:00.000-08:00

Couple of decades ago we would have told ourselves that who's ever gonna need more than 640K of RAM. But today we ask ourselves can memory requirements be bound? Every new generation of consumer electronic gadget has applications that bedazzle the senses, greedily devouring more memory in the process. One can watch the latest video on a cell phone, take a picture with a pen and get the latest weather info on a wristwatch. Try doing that with 640KB of RAM! This article is a three part series dealing with the challenge of Embedded memory devices.

As we push towards greater integration, current system-on-chip (SOC) designs dramatically increase memory content and show no signs of relenting. According to the Semiconductor Industry Association (SIA), memory already dominates over 60% of silicon area in SOC designs, and is projected to represent over 90% of the die area by end of the decade. New SOC designs are beginning to take on the appearance of a memory-chip with logic surrounding it.

The predominance of memory in SOC designs is made more acute by the variety of memory types that are being used today. The multi-functional nature of current designs is reflected by the International Technology Roadmap for Semiconductors (ITRS). Having an SOC design embedded with a DRAM along with a CAM, an EPROM, and a multi-port SRAM is not uncommon.

There can be several instances of the same memory that might exist on the chip with different architectures for high-performance, low-power, other form-factors, and so on. These variations require that, for design and analysis purposes, multiple instances of the same memory be treated as distinct entities.

The rule is - smaller device sizes, greater the advantage including greater functionality per chip, lower overall cost and higher portability, but they have also resulted in an ever-increasing set of design and manufacturing challenges. We shall restrict our discussion to issues that affect the simulation and verification of these embedded memory designs and some possible solutions.

From the Embedded designer's view, the key points to consider are high speed operation, low power consumption, robustness (i.e., correct data at correct location) and process compatibility

I'll be dealing with each of these in part two.

QNX, VoiceBox Team On Next-Gen Telematics

2006-11-17T21:42:00.000-08:00

Two software giants have joined forces to improve the user experience of voice recognition systems for in-car telematics and infotainment applications. QNX Software Systems and VoiceBox Technologies are working together to improve the reliability and user experience in next-generation telematics, consumer electronics, and digital home applications. One result: the VoiceBox Conversational Voice Search Platform, deployed on the QNX Neutrino realtime operating system (RTOS), lets users speak in natural and conversational ways to more easily search for digital content and to control in-car and consumer devices.

Leading auto suppliers are already implementing technology from QNX and VoiceBox to enable hands-free and eyes-free management of a variety of in-car functions, including navigation, climate control, and radio control through spoken requests. The system can understand the context and intent of queries, which allows users to speak in a conversational way. For example, the driver can ask "What's the temperature in Detroit?" and then say "Raise the temperature to 70 degrees," and the car will respond to the different requests accordingly.

"The fault-tolerant environment offered by the QNX Neutrino RTOS enables us to better support the high standards necessary for in-car conversational voice applications," said Tom Freeman, Senior Vice President of Marketing at VoiceBox Technologies. "The synergies between our technologies will also lend themselves to the development of sophisticated voice search applications for emerging markets such as the digital home."

"VoiceBox is the market leader in conversational voice search and is currently being used by many of our automotive development partners," said Andrew Poliak, Automotive Segment Manager at QNX Software Systems. "This partnership is key to improving the user experience and performance of electronic devices as the markets for telematics and consumer applications merge."

The VoiceBox Conversational Platform is based on advanced algorithms that determine context and intent from conversational speech. Users aren't required to memorize exact preset commands and can simply ask for what they want, even in noisy environments such as the automobile.

AMI Launches Automotive Grade Embedded Flash Technology

2006-11-17T21:05:00.000-08:00

AMI Semiconductor has launched its automotive grade embedded Flash memory for its 0.35 μ ‘Smart Power’ high-voltage mixed-signal system-on-chip (SoC) process technology. The combination of the proven CMOS mixed-signal technology and the new non-volatile memory (NVM) allows designers to create cost-effective smart sensor interfaces, intelligent actuators and other sophisticated single-chip devices for operation in automotive and other harsh environment applications.

AMI Semiconductor’s latest High Injection MOS (HiMOS) embedded memory IP and technology provide designers with the flexibility to configure the size of the on-board Flash memory capacity from 2Kbytes to 64Kbytes in target applications expected to operate in harsh conditions. Memory can be delivered in single-bank or dual-bank configurations with memory retention for code storage of up to 15 years.
Single-bank configurations can provide up to 64kBytes of code storage. The dual-bank option allows code storage up to 62kBytes and data storage of 2kBytes, emulating an EEPROM capable of a minimum of 10,000 erase cycles. In addition to providing Flash functionality in the final product, HiMOS NVM can also be used for rapid development and prototyping, prior to shrinking to a ROM-based solution for final manufacture. Sector and multiple sector erase time is 0.5s, while page programming takes just 20μs (with 32-pages per sector). Random access read time is 100ns for either 8- or 16-bit words. The memory is fully qualified to the AEC-Q100 critical stress test for automotive electronic components.

Capable of operation to 80V, AMI Semiconductor’s 0.35μ CMOS-based mixed-signal technology allows system designers to reduce component count, save space, and lower costs through ICs that integrate high-density digital circuits, high-voltage circuitry and high-precision analog blocks. The automotive grade embedded HiMOS Flash memory offers a cost-effective route to reliable on-chip code and data storage and will operate at temperatures from -40ºC to 125ºC. The memory can also continue to provide read functionality at temperatures as high as 150ºC.

AMI Semiconductor’s mixed-signal Smart Power ICs can incorporate a wide variety of digital, analog and high-voltage functions including processors, communication interfaces, bus protocol controllers and interfaces for CAN and LIN connectivity, high-voltage functions such as motor control drivers and DC/DC converters, and analog blocks including filters, ADCs and DACs. Because the AMIS HiMOS Flash is implemented using only three additional mask layers to the base technology mask set, intelligent, smart power Flash-based ICs provide a highly cost-effective alternative to discrete and other SoC alternatives.

The embedded Flash memory process and custom design service provide benefits to users such as memory sized to specific needs, and supply of SoCs with integrated HiMOS Flash memory for the lifetime of a project; in automotive and industrial applications this can be 10 years or more. This protects against the risk of needing to periodically re-qualify a design due to the phasing out of current technology in favor of newer approaches, a problem that often occurs when using stand-alone non-volatile memory.

To help speed development of applications based on the latest mixed-signal and NVM technology, AMIS offers an emulation board and mixed-signal test ICs for designers to develop and debug their software in parallel to hardware development.

Atmel Introduces AT98SC032CT-USB for Embedded Systems and e-Tokens

2006-11-17T07:52:00.000-08:00

Atmel Corporation has introducced its new AT98SC032CT-USB, a fully-integrated solution designed to secure embedded systems. Based on Atmel’s smart card chip-design expertise and leadership, the AT98SC032CT-USB is intended for hardware security-solution integrators like USB tokens, secure Flash drives, media centers and other related products. The AT98SC032CT-USB is ideally suited for USB security devices used in various computer security applications like single sign-on, 2-factor authentication, web-portal strong-user authentication, secure login, digital rights management and more.

Thanks to its CCID-compliant, full-speed USB 2.0 interface, the AT98SC032CT-USB is seen as a smart card by the host platform. This chip features an increased storage memory of 32KB with a password-protected file system and meets FIPS 140-2 requirements.

The AT98SC032CT-USB embeds complex firmware that provides advanced functionalities including strong authentication, one-time password generation, digital signature (3DES MAC, RSA PKCS#1, EC-DSA), data encryption (3DES, RSA PKCS#1), message digest (SHA1 & 256), random number generation and public key generation (RSA, ECC). It also includes an administration application to manage the contents and configuration of the chip. This firmware makes the AT98SC032CT-USB perfectly adapted to PKCS#11 or MS-CAPI standard specifications which allows a straightforward integration into any application.

“High-tech goods counterfeiting, multimedia content copying and identity theft have an increasing cost to industry and consumers. AT98SC security modules are perfectly suited to protect your applications against these threats by offering low-cost, ease of integration, higher security and proven technology,” said Jean-Charles Lesage, Atmel’s smart card IC marketing manager.

NI, Freescale, Wind River Simplify Embedded Design with CompactRIO Controller

2006-11-17T07:46:00.000-08:00

National Instruments releaseso the new NI cRIO-9012 high-performance, real-time controller in collaboration with Freescale Semiconductor and Wind River. The controller is based on Freescale’s MPC5200 processor built on Power Architecture™ technology and Wind River VxWorks real-time operating system (RTOS) to deliver fast performance while maintaining the ruggedness, reliability and low cost of the NI CompactRIO platform.

The companies are working together to help engineers simplify embedded system development through graphical system design, which combines open software and commercial off-the-shelf (COTS) programmable hardware in a single, unifying platform to rapidly design, prototype and deploy embedded systems. The collaboration on the cRIO-9012 controller illustrates the three companies’ ongoing strategic relationship dedicated to improving the development of embedded devices.

In addition to increased performance, the cRIO-9012 controller incorporates proven technologies from all three companies to deliver more memory and nonvolatile disc space as well as more digital signal processing and faster streaming for logging and networking than its precursor, the cRIO-9002 controller. Freescale’s 400MHz MPC5200 processor, containing an integrated floating-point unit, is well suited for networking, media, industrial control and automotive applications. The MPC5200, which is programmed with the National Instruments LabVIEW Real-Time Module, gives the cRIO-9012 controller up to 4X processing performance and nearly 2X lower power consumption.

Running on the MPC5200, the Wind River VxWorks RTOS delivers dependable performance and a fault-tolerant file system that provides reliable data logging, making it possible for engineers to operate the controller for long periods of time in remote applications using a battery or solar power. The NI LabVIEW Real-Time Module provides shared variable technology for simplified network communication between distributed systems as well as the new LabVIEW Project, which streamlines code control and application deployment to multiple CompactRIO systems. With the technologies in the new cRIO-9012 real-time controller, the CompactRIO embedded system is ideal for applications such as machine control and monitoring, in-vehicle logging and embedded system prototyping and for a variety of industries such as automotive, military, industrial equipment and energy and environmental.

“Engineers require a development platform that helps them create embedded system solutions more quickly, with higher quality and with lower costs,” said Steve Rosebaugh, senior product manager for Freescale’s Infotainment, Multimedia and Telematics operation. “Our collaboration with National Instruments is bringing the benefits of Power Architecture technology and Freescale’s MPC5200 processors to the CompactRIO graphical system design platform, which gives engineers a more streamlined approach to embedded system development.”

Using a standard architecture and COTS components, graphical system design helps engineers streamline the development process and quickly prototype and deploy new designs without the need to build custom embedded systems for every project. The openness of the graphical system design approach also gives engineers the opportunity to incorporate and take advantage of state-of-the-art technology from multiple vendors. With the CompactRIO graphical system design platform, for example, engineers benefit from the processing speed of the MPC5200 processor and the dependability of the Wind River VxWorks operating system in the controller as well as the customization of a Xilinx chipset in the reconfigurable chassis. Engineers also can take advantage of the reliability and ease of use of the graphical programming tools in LabVIEW to target the VxWorks operating system and Xilinx FPGA. The combination of these technologies in a single platform makes graphical system design an ideal methodology for embedded system design.

“Device software has been exponentially increasing in complexity, which makes it much more challenging for engineers to be productive,” said Warren Kurisu, director of product management at Wind River. “We see graphical system design as a valuable methodology for moving customized device software from design to deployment quickly. The combination of state-of-the-art VxWorks RTOS technology, easy-to-use LabVIEW rapid development programming tools and the CompactRIO platform provides device software engineers with a powerful and flexible foundation for their design, so they can focus on the complete system and delivering the features their customers care about most.”

Samsung Creates Industry’s Highest-Density MMC Cards

2006-11-17T07:42:00.000-08:00

Samsung Electronics has developed the industry’s highest density MMC card (popular removable MultiMediaCard for portable electronics) based on its most advanced MLC (multi-level cell) NAND flash memory. It also has developed the highest performing MMC card, based on SLC (single-level cell) NAND flash, in rounding out its large portfolio of MMC memories. With added density and higher performance, the new Samsung MMCplusTM cards are designed to greatly enhance user convenience for a variety of mobile applications.

Based on Samsung’s 8-gigabit (Gb) NAND flash memory, the MMCplus card will be introduced with an 8-gigabyte (GB) density, allowing it to store 2,000 MP3 music files or eight hours of DVD-quality movies. The 8GB card will be part of a full line up of MLC-based MMCplus cards that also will include 1GB, 2GB, and 4GB offerings.

According to Semico Research, a market research firm, the worldwide high-density memory card market is expected to show substantial growth from 115 million units in 2006 to 750 million units by 2009.

Intel, Micron Create 50nm NAND Flash Memory Devices

2006-11-17T07:38:00.000-08:00

Micron and Intel sample industry’s first NAND flash memory built on industry-leading 50 nanometer (nm) process technology. The samples were manufactured through IM Flash Technologies, a joint development and manufacturing venture from Micron and Intel. Both companies are sampling 4 gigabit (Gb) devices now, with plans to mass produce a range of densities on the 50nm node in 2007.

This move to 50nm process technology will enable Intel and Micron to meet the growing demand for higher density NAND flash across a range of computing and consumer electronics applications such as digital music players, removable storage and handheld communications devices. According to industry research forecasts, the NAND market segment is estimated to reach $13 to $16 billion in 2006 and grow to approximately $25 to $30 billion by 2010.

Micron and Intel formed IM Flash Technologies (IMFT) in January to manufacture NAND flash memory products for the two companies. IMFT has been aggressively ramping its manufacturing facilities since the company’s formation. Micron is currently supplying the venture NAND flash from its Boise fabrication facilities, and Micron’s 300 mm facility in Manassas, Va., will be online later this year to supply IMFT with NAND. Meanwhile, the Lehi, Utah facility that is dedicated to IMFT and serves as its headquarters is expected to be online producing NAND early next year.

STMicroelectronics Debuts 32-Mbit Flash Memory for Automotive Applications

2006-11-17T07:31:00.000-08:00

STMicroelectronics's enhanced version of its 32-Mbit Flash memory chip that is intended specifically for the automotive market is out of the clean room. Offering high-speed memory access over a wide operating temperature range, the M58BW32F fits perfectly with automotive customers’ needs for powertrain and transmission- control modules, and for other high-performance automotive systems that use the latest generation of 32-bit microcontrollers.

The new M58BW32F is manufactured with an advanced 0.11-micron technology and benefits from ST’s long experience as a leader in standalone and embedded Flash memory products. Automotive-Grade certified, and qualified to the AEC- Q100 standard (revision F) as defined by the Automotive Electronics Council, the new device uses a state-of-the-art architecture to reduce access times to as low as 45nsec over the full automotive temperature range (-40 degrees C to +125 degrees C for the packaged device, -40 degrees C to +150 degrees C in bare die form). Maximum burst frequency is 75MHz across the full temperature range.

The M58BW32F features a wide 32-bit data bus and operates on a nominal 3.3V memory core supply. Enhanced protection techniques include flexible hardware/software protection, a secured command set for Modify operations, a Bank Erase command and a one-shot program from an internal buffer (loaded up to an 8 x Double word maximum). For security, each die embeds a unique device ID to allow the use of cryptographic algorithms to protect against illegal software modifications.

The new automotive Flash memory is offered in an LBGA80 package, which uses ST’s ECOPACK RoHS-compliant lead-free technology, as well as in Certified Bare Die form. All devices are manufactured in ST facilities qualified to ISO/TS 16949:2002, and use ST’s volume-proven state-of-the-art manufacturing and testing technologies to offer reliable solutions for automotive applications.

Intel's 65nm NOR Flash

2006-11-17T07:21:00.000-08:00

Intel Corporation rolls out the industry’s first volume shipments of 65-nanometer (nm) NOR flash Multi-Level Cell (MLC) products, including the industry’s first 65nm 1Gigabit (Gb) monolithic part for cell phones. These new products are based on Intel’s StrataFlash® Cellular Memory (M18) architecture and are drop-in compatible with Intel’s high-volume, 90nm-based flash chips, ensuring an easy migration path for cellular Original Equipment Manufacturers (OEMs).

Targeted for multimedia phones with mega-pixel cameras, video and high-speed data capabilities, the single chip, 1Gb MLC NOR aligns nicely with next-generation phones coming to market.

“The density of our 1Gb product provides nearly double the storage for multimedia files and enables ever-slimmer form factor phones, both key elements for our customers,” said Darin Billerbeck, vice president and general manager, Intel Flash Products Group. Intel also has a 65nm roadmap to support 512Mb, 256Mb and 128Mb densities of the M18 product family in 2007.

The new 65nm NOR MLC parts from Intel offer fast read speeds of up to 133 MHz, improved write speeds of up to 1.0MB/sec for faster response times and storage capabilities for 4 mega-pixel cameras and MPEG-4 video. The write speed improvement on the 65nm version is twice as fast as Intel’s previous product. Battery life is also extended through low power consumption, 1.8-volt operation and a deep power-down mode.

“The Intel StrataFlash Cellular Memory (M18) architecture provided Sony Ericsson with a simple migration path from 90nm to 65nm products, which resulted in faster time-to-market for our next generation of phones,” said Peter Carlsson, vice president and head of sourcing, Sony Ericsson Mobile Communication.

Intel also continues to work closely with a variety of cellular companies to ensure quick adoption of this new family of products. The M18 is validated on the top 10 chipsets in the market and offers third-party software support for added OEM flexibility.

“The 1Gb family of the M18 device will enable Infineon to utilize NOR flash memory for high-end mobile handsets, while allowing us the benefit of retaining the same interface as the 90nm version of the device,” said Clemons Jargon, vice president and head of the feature phones business unit for Infineon Technologies.

This new product family is based on an ongoing cellular memory architecture collaboration between Intel and STMicroelectronics. This collaboration assures cell phone makers of a common architecture with standard memory interfaces and configurations, as well as offers multi-source supply of fast-performing, high-density, low-power chips.

Microchip Unveils Three Products for IEEE 802.15.4 Wireless Networking

2006-11-17T06:33:00.000-08:00

Microchip Technology Inc., has three new offerings for IEEE 802.15.4 wireless networking. Microchip’s first RF transceiver, the MRF24J40, is a 2.4GHz IEEE 802.15.4 transceiver targeted for the ZigBee™ protocol—and proprietary wireless protocols—in RF applications requiring low power and excellent RF performance. The ZENA™ wireless network analyzer tool further enables development of ZigBee protocol systems using Microchip’s semiconductors. Finally, the MiWi™ protocol is a free, small-footprint protocol developed by Microchip for customers who do not need ZigBee protocol interoperability but want to use IEEE 802.15.4 transceivers in low-cost peer-to-peer, star and mesh networks. In fact, the MiWi protocol provides the lowest-cost fully functional network protocol for IEEE 802.15.4 transceivers.

According to In-Stat, the market for IEEE 802.15.4 wireless Personal Area Networking, via the ZigBee specification network layer and other proprietary protocols, could grow 200% by 2009—with annual shipments surpassing 150 million units in 2009. Microchip is currently addressing the needs of this market with the only zero-cost-license and royalty-free ZigBee protocol stack, which is one of the smallest in the industry and provides a source-code format that allows designers to customize their product, utilizing Microchip’s broad portfolio of compatible PIC® microcontrollers.

ith the MRF24J40 transceiver, Microchip now offers a complete ZigBee protocol platform through the addition of a highly integrated RF transceiver that requires very few external components. Microchip’s radio also offers low power consumption and performance that exceeds all IEEE 802.15.4 specifications, with full Media Access Controller (MAC) support and an Advanced Encryption Standard (AES) hardware encryption engine.

“Microchip’s MRF24J40 IEEE 802.15.4 transceiver can be combined with roughly 200 8-bit and 16-bit PIC microcontrollers, and dsPIC® DSCs, to provide the most cost-optimized wireless networking solutions,” said Ganesh Moorthy, Microchip’s executive vice president. “In combination with our free ZigBee protocol stack, Microchip now offers a complete solution for one of the fastest growing technology market segments.”

ue to the fact that the ZigBee protocol has grown too large and complex for many applications, a large percentage of the market for IEEE 802.15.4 wireless Personal Area Networking is likely to use alternative, proprietary protocols, such as the MiWi protocol. Additionally, ZigBee protocol certification is costly and cumbersome for small- and medium-size companies. Microchip’s MiWi protocol provides a simpler, lower-cost solution for customers who do not need interoperability but still want to use robust IEEE 802.15.4 radios. No certification is required for MiWi protocol systems, and the protocol stack is provided under a free license, when the combination of Microchip’s microcontrollers and MRF24J40 transceiver is used.

“The MiWi protocol addresses the market need for a protocol that is simpler and lower cost to implement than the ZigBee protocol. Microchip recognized this need and developed the MiWi protocol for smaller networks that can be implemented on lower-cost PIC microcontrollers,” Moorthy added.

Regardless of which protocol a design engineer selects, Microchip’s complete solution enables them to rapidly evaluate and begin developing a vast array of wirelessly networked IEEE 802.15.4 applications, including: building/home automation (security, lighting, HVAC, access); industrial (monitors, sensors, automation, control, lighting); personal healthcare (diagnostic tools, monitors); and consumer electronics (RF wireless remotes for TV/VCR/DVD/CD, toys, personal-computer peripherals).

TI TMS570 Symmetrical Dual-Core Microcontroller

2006-11-17T06:29:00.000-08:00

The Texas Instruments TMS570 symmetrical dual-core microcontroller (MCU) is the first automotive processor solution to support a certification according to the International Electrotechnical Commission (IEC) 61508 SIL3 standard – the highest level of safety that is designated for automotive applications. Co-developed with Robert Bosch GmbH, a leading global supplier of automotive technology, the TMS570 MCU will be implemented in next generation braking, steering and chassis control applications.

The TMS570 MCU platform uses two identical ARM® Limited Cortex™ R4 cores combined with an initial two Mbytes of on-chip flash memory. Targeted applications include chassis control, braking/electronic vehicle stability and steering with higher and lower memory and performance variations planned. The dual cores are tightly coupled by a patent pending architecture for maximum reliability, while memory is protected by Error-Correcting Code (ECC) bit checking.

As vehicles become more complex and integrate more features, safety standardization is becoming increasingly important among automakers and OEMs. The TMS570 device integrates the Cortex R4 cores in an innovative and unprecedented design that enables failure detection and response times required by the IEC 61508 standard. Software development for the dual-core TMS570 MCU becomes less complex by eliminating a dedicated checker MCU algorithm and communication overhead between the main controller and the checker MCU thus reducing development time and cost.

The FlexRay™ networking protocol is also implemented directly on the TMS570 MCU further increasing integration. This deterministic communications standard developed by the leading automotive manufacturers and suppliers offers fully deterministic and fault tolerant communications for advanced automotive systems.

EtherCAT Enables Fastest Industrial Ethernet for Xilinx FPGAs

2006-11-17T06:24:00.000-08:00

Xilinx, Inc. announced the implementation of a scalable EtherCAT slave controller functionality in an intellectual property (IP) core for its Spartan™ series of FPGAs. The code was developed and is supported by Beckhoff Automation GmbH, a Xilinx Alliance Program partner.

EtherCAT is an innovative high-performance industrial Ethernet solution backed by a large worldwide vendor and user community. The implementation of the EtherCAT slave controller in Xilinx FPGAs enables superior and efficient management of system cost and product lifecycles, enabling system vendors to explore new market opportunities ahead of their competitors.

EtherCAT (Ethernet Control Automation Technology) is the industrial Ethernet solution that provides performance, flexibility and cost advantages. The functional principle, processing on the fly, makes EtherCAT the fastest system currently available. EtherCAT media is well suited for control environments since it can be operated with or without switches. EtherCAT is an open standard that has been published as IEC specification based on input from the EtherCAT Technology Group.

Freescale Improves Motor Control with MC34929 Motor Driver IC

2006-11-17T06:16:00.000-08:00

Freescale Semiconductor has introduced a three-phase brushless DC (BLDC) motor driver integrated circuit (IC) designed to help drive small motors reliably with reduced board space. The MC34929 IC provides a cost-effective, small-footprint BLDC motor driver solution for a variety of consumer, portable and office equipment applications containing small motors.

The single-chip MC34929 IC has built-in over-temperature, under-voltage and stalled-rotor protection circuitry, making it ideal for small-motor applications. The MC34929 operates efficiently with supply voltages from 8 V to 28 V and provides continuous motor drive current up to 1A.

Designed with a built-in three-phase hall-effect sensors interface and a hall sensors voltage supply, the MC34929 motor driver IC can operate BLDC motors autonomously with a pushbutton or switch interface or under the control of an external microcontroller (MCU), such as Freescale’s 8-bit MC9S08QG8CDTE MCU. Its state machine accommodates several modes of operation, including clockwise, counterclockwise, run/stop, brake, variable speed and torque current limit.

“Freescale’s MC34929 device provides sophisticated analog/mixed-signal integrated functions that result in a highly flexible product that is adaptable and configurable to its environment,” said Arman Naghavi, vice president and general manager of Freescale’s Analog, Mixed-Signal and Power Division. “It allows designers to differentiate their products with functions such as adjustable, autonomous and continuous modes.”

Manufactured with Freescale’s proprietary SMARTMOS(TM) process, the MC34929 has built-in stall detection and protection circuitry, logic level control and various configuration and communication features for active monitoring of operation and increased reliability. Offered in a compact, low-profile 24-pin 4 mm x 4 mm x 1 mm ultra-thin QFN package, the MC34929 is ideal for industrial, home and office electronics applications that require a compact BLDC motor driver solution.

ZiLOG First to Create 8-bit MCU With Vector Control Capability

2006-11-17T06:11:00.000-08:00

ZiLOG's Z8 Encore! MC(TM) (FMC16100 Series) is the first 8-bit MCU to offer vector control capability, an innovation that significantly lowers the bill of materials (BOM) costs for appliance manufacturers, reduces both energy consumption and, in appliances such as dishwashers and washing machines, water usage, factors that benefit both consumers and the environment as well as help extend the life cycle of the product itself.

Vector control was previously claimed to be the domain of digital signal processors (DSPs), digital signal controllers (DSCs) and 16- or 32-bit microcontrollers. With the vector control capability developed by ZiLOG engineers using the award-winning Z8 Encore! FMC 16100 series, the myth that only high-end MCUs or DSPs can perform vector control algorithms has been dispelled. Combining ZiLOG’s fast CPU (up to 10 MIPS), fast Analog to Digital Converter (ADC) and integrated op-amp, and optimized C Compiler, ZiLOG can provide the equivalent of DSP functionality in vector control, which ZiLOG estimates can save up to 50 percent on overall BOM costs compared to “higher-end” MCU solutions.

In addition to the lower BOM cost to appliance manufacturers, end users also benefit from vector control. According to the United States Environmental Protection Agency (EPA), a front-loading washing machine employing vector control consumes significantly less energy and water than a similar machine not using vector control. Such benefits are likely to make the end product much more appealing to today’s increasingly environmentally sensitive, energy-conscious consumer, and therefore, more commercially competitive and attractive. Over time, households using vector control-enabled appliances can significantly reduce their annual energy costs. According to the 1997 Residential Energy Consumption Survey(1), around 27 percent of all energy used in households is consumed by appliances and lighting, accounting for more than 45 percent of total energy costs. However, current motor technologies used in large appliances, especially older models, are only 50 to 60 percent energy efficient compared to newer models. Appliances using the vector controlled FMC 16100 can improve the energy efficiency of the motor to around 90 to 95 percent as it replaces conventional motors with brushless DC (BLDC) motors, enabling extremely accurate variable speed control.

The vector control required by today’s more advanced appliances enables precise, highly-responsive speed control during changes in the load and optimizes motor efficiency during transitional operations. In front-loading washing machines, for example, where the motor typically runs at up to 18,000 rpm, the fast acceleration possible with vector control reduces power and saves time in the wash cycle. In addition, precise speed control is required to deliver the necessary clothes agitation that is key to reducing water consumption. The precise speed control, also a function of vector control, helps to further reduce the energy used during operation. In addition, by improving overall system efficiency, the designer can minimize wear and tear, helping to extend the overall operation life of the product.

Commenting on the announcement of vector control for the 8-bit MCU market, ZiLOG interim CEO Robin Abrams said: “In today’s competitive landscape, commercial advantage is critical to a product’s success and the company’s bottom line. Vector control capability is a key feature that appliance engineers are focusing on, and represents a huge market opportunity for ZiLOG. Vector control brings significant commercial benefits, both for manufacturers and end consumers, in terms of overall system cost, power usage and product lifespan. The business case for employing vector control right across the spectrum of devices using MCUs for digital power control is compelling. As one of the leading suppliers of motor control MCUs, we are extremely proud to have developed an industry ‘first’ solution which addresses the market demands for power efficient, cost conscious devices that can be readily employed rapidly and cheaply across the motor control market.”

BMW adding traffic system

2006-11-17T06:06:00.000-08:00

BMW is offering Real Time Traffic Information for the first time on any production vehicle sold in the U.S. The system uses Clear Channel Radio’s broadcast network to update traffic information from a variety of sources including FM radio stations, highway-embedded sensors, video monitors on bridges and roadways and local traffic monitoring centers.

Traffic data is then streamed to a dedicated tuner in the car’s radio and is transferred directly to the navigation system.

This allows drivers to receive traffic updates 24/7 even if the radio is turned off or the driveris listening to another audio source such as CDs or an iPod. The nav system then calculates the best route considering traffic problems and potential delays. If a delay is more than 5 minutes, the system will offer an alternative route around the congestion either automatically or at the choice of the driver.

The system requires no monthly fees and no recurring cost for four years, its part of the cost of the navigation system. It is available on X5, M5, M6 and 3, 5 and 6 series cars.

The regulatory challenge to wireless embedded control

2006-11-16T20:42:00.000-08:00

Most of us have used short-range-wireless technologies in the form of point-to-point Bluetooth connectivity between mobile phones and headsets or between a PC and a wireless mouse. Short-range-wireless technologies typically have a range of 10 to 50m and data rates of less than 4 Mbps. These technologies enable a new concept, WiEC (Wireless Embedded Control). The philosophy of WiEC calls for the ubiquitous embedding of simple wireless transceivers in host systems beyond PC peripherals and consumer electronics. You can use these transceivers to report data or receive commands, creating networks out of otherwise-stand-alone machines. You can then use these networks to enhance the performance and the efficiency of member nodes.

WiEC-friendly transceivers vary based on data rate, range, occupied bandwidth, collocation ability, and immunity to interference. Local agency regulations for the transceiver band in which the transceiver operates directly impact some of these properties. Therefore, the choice of frequency band affects system performance. A wireless system may operate in a licensed or an unlicensed frequency band. Licensed bands have the advantage of guaranteeing a slice of spectrum dedicated to the wireless system, thus reducing the possibility of interference. However, licensing costs and regulatory certification procedures can significantly increase costs and time to market. Unlicensed frequency bands offer an alternative, but with a caveat. A wireless system can operate in an unlicensed band as long as it complies with restrictions on power output, spectral density, and duty cycle and simultaneously accepts potential interference from other devices in the same band.

But unlicensed bands are not all the same. Typically, the higher the center frequency of the band, the wider the band itself and, thus, the more devices it can accommodate. Conversely, free-space propagation of lower frequencies is typically better than that of higher frequencies, implying that a lower frequency wireless transceiver would have more range for a given RF output power.

The center frequency and bandwidth of unlicensed bands vary by local regulatory agency, which can cause headaches for companies that want to sell a product globally. But the 2.4-GHz ISM (industrial/scientific/medical) band is unique in that most regulatory bodies worldwide have adopted a center frequency of approximately 2450 MHz and bandwidth with sufficient overlap to allow for relatively easy global deployment. This adoption has had the positive effect of the proliferation of consumer and WiEC-type wireless devices but has caused severe spectrum crowding.

Nonetheless, because of international availability, bandwidth, and simplified regulatory requirements, the 2.4-GHz ISM band is possibly the most suited to WiEC applications. But this suitability presents a challenge to WiEC-type transceivers, because they must be able to coexist in a crowded spectrum. Wireless devices that inhabit the same unlicensed bands as WiEC devices provide two challenges. First, they may occupy more bandwidth than a WiEC-type transceiver and thus consume spectrum that WiEC networks can otherwise occupy. For example, an IEEE 802.11g access point occupies 22 MHz of spectrum, compared with a WiEC-type transceiver, which typically occupies 5 MHz or less. Second, these other wireless devices can be of much higher RF output power than a low-power WiEC transceiver, thus interfering with WiEC networks operating in nearby frequencies. For example, IEEE 802.11g access points can have power outputs as much as 100 times those of a typical WiEC transceiver.

Therefore, a WiEC transceiver must employ effective interference avoidance, including the ability to detect RF energy on a frequency, to recover from transmission errors, to provide automatic acknowledgment and retransmission, and to possibly provide spread-spectrum modulation. Furthermore, a WiEC transceiver must occupy minimal spectrum, thus enabling it to find a clear communication channel even in a busy RF environment.

Collocation poses another challenge. For WiEC to realize its full potential, the underlying radio technology must enable a large number of nodes to operate simultaneously. This ability is critical for applications such as environmental control in large buildings, inventory tracking in warehouses, and appliance control in dense housing units. A WiEC transceiver that occupies a small operating bandwidth would be appropriate because it would increase frequency diversity and possibly enable dozens of nodes to collocate in close proximity. A better transceiver would also employ some form of code diversity, as in the case of DSSS (direct-sequence-spread-spectrum) modulation, which can raise the number of collocatable nodes to hundreds instead of dozens.

We all stand to benefit from the added intelligence WiEC will bring to familiar systems. The challenge to system designers lies in selecting an underlying transceiver technology that will be easy to design in and to deploy globally.

Broadcom's Revolutionary M-Stream Technology Delivers Vastly Superior Voice Quality in Upcoming Palm(R) Treo(TM) 680

2006-11-16T20:31:00.000-08:00

Broadcom Corporation, has announced that the new Palm® Treo(TM) 680 smartphone is the first commercial cell phone to implement M-Stream technology from Broadcom. M-Stream technology provides significant improvements in handset reception and voice quality over legacy cell phones for no additional bill of materials (BOM) cost, and without the need for an upgrade or modifications to an existing network infrastructure. The Palm Treo 680 is the third Treo model to integrate Broadcom's baseband processors and industry-leading Bluetooth® solution, and now added M-Stream technology to deliver enhanced user experience through higher voice quality and larger coverage area.

With fewer dropped calls and a noticeable improvement in the quality of voice communications, M-Stream provides consumers with an enhanced mobile phone experience. Utilizing M-Stream technology enables the new Palm Treo 680 to offer dramatically better voice quality compared to other handsets without increasing the overall BOM cost. In addition, the technology enables network operators to maintain call quality while nearly doubling existing cellular network capacity without requiring costly infrastructure upgrades.

Broadcom M-Stream Technology

Millions of cell phone users are familiar with "garbled" conversations due to weak signal reception or signal interference. M-Stream technology applies advanced error correction algorithms to incoming voice streams, and reconstructs lost information to restore reception quality. Based on Broadcom's proprietary signal enhancement algorithms developed for mobile phones, M-Stream technology enables handsets to operate on standard GSM or WCDMA 3G networks with significant improvements in demodulated speech quality in poor signal conditions and measurable improvements in voice clarity.

For GSM networks, M-Stream typically provides a 2 to 3 dB signal/noise improvement over a wide range of channels, including weak signals, fading and in areas where radio interference is present. In WCDMA 3G networks, M-Stream enables a 1 to 1.5 dB typical improvement. Using the industry standard PESQ (perceptive evaluation of speech quality) method of scoring voice quality, M-Stream improves voice intelligibility in poor channel conditions by 0.5-1 unit on the PESQ, where PESQ's quality scale ranges from -1 to 4.5 points. These enhancements provide a direct benefit to consumers by improving call quality while allowing carriers to dramatically increase the number of callers who can be supported on existing networks.

M-Stream is complementary, and not a replacement, to other signal improvement technologies that are commonly deployed in handsets, including Broadcom's own implementation of industry-standard DARP (downlink advanced receiver performance) capabilities. The powerful combination of Broadcom DARP implementation with M-Stream provides up to 6 dB signal/noise improvement under impaired GSM network conditions. This improvement enables carriers to significantly increase their coverage and overall network capacity due to decreased downlink power requirements. DARP -- which is also referred to as single antenna interference cancellation (SAIC) -- is a technique for mitigating high co-channel interference in mobile phones to provide a "cleaner" signal for the handset.

EDGE/GPRS/GSM Baseband Processor

The single-chip BCM2133 baseband processor features a comprehensive EDGE/GPRS/GSM system design that enables broadband-like connectivity with low power consumption. The small footprint baseband solution enables the development of cost effective EDGE feature phones, smart phones, PC cards and embedded modules, and its EDGE Class 12 capability enables receive (RX) and transmit (TX) data speeds in excess of 200 Kbps to achieve broadband-like connectivity. Broadcom also integrates the interface functions and drivers to enable auxiliary components, such as a handset and headset microphone, handset, headset and speakerphone speaker and switching SIM that connects directly to the device.

Advanced Bluetooth Solution

The new Treo 680 smartphone also includes Bluetooth silicon from Broadcom. The Blutonium® BCM2045 is an advanced single-chip solution designed from the ground up to promote and enable the adoption of Bluetooth in phones, computers, peripherals and other devices. The chip addresses every major challenge confronting equipment manufacturers when adopting Bluetooth wireless technology, including power consumption, board space, radio performance and cost. The BCM2045 can provide advantages in all these areas that are unmatched by competing devices developed from older technologies.

In addition to best-in-class power and performance, the BCM2045 also features the highest level of integration in the industry, resulting in approximately 50% lower OEM/ODM external bill of materials and significantly smaller printed circuit board space utilization versus competing Bluetooth solutions. The BCM2045 also supports the new Bluetooth Extended Data Rate (EDR) that provides 3 Megabits per second of raw bandwidth for wireless applications and the broadest range of Bluetooth software 'profiles' in the industry, including those supporting advanced multimedia applications.

Microchip Technology Announces PIC® Microcontrollers with Internal Shunt Regulator

2006-11-15T18:43:00.000-08:00

Microchip Technology Inc., a leading provider of microcontroller and analog semiconductors, today announced the first general-purpose, Flash PIC® microcontrollers with several peripherals for more cost-effective control of fans or small motors. The 14-pin PIC16F616/610 and the 8-pin PIC12F615/609 microcontrollers can substantially reduce system component counts and costs through the integration of specialized peripherals, such as a full-bridge Pulse-Width Modulator (PWM) with deadband control, a Timer1 Gate for pulse width measurement, a comparator for hall-effect sensor interfaces, and an A/D converter for temperature and various monitoring functions. In the case of the PIC16HV616/610 and PIC12HV615/609 variants, the addition of an internal shunt regulator allows the PIC microcontroller to run from higher voltage rails without the addition of voltage regulators.

Engineers designing small-motor control systems are always looking for ways to eliminate components and reduce board size and cost, while achieving higher levels of functionality and flexibility. For example, in cooling fans, the PIC16F616/610 and PIC12F615/609 Flash microcontrollers provide greater functionality than discrete fan-control components, such as linear speed control, improved dynamic response and the ability to customize the design with firmware changes rather than expensive hardware redesigns. At the same time, board space and cost is reduced with features such as comparator hysterisis, to allow direct interfacing to a hall-effect element without additional signal-conditioning circuitry.

Many high-voltage-rail applications, such as motor control and power supplies, require components to step down the input voltage for various control devices. However, these new PIC microcontrollers—available with an integrated shunt regulator option (designated with “HV” in the part number), allow engineers to design systems without having to add a regulator, reducing costs and board space even further. Additionally, motor and power applications often require intermediate voltages for power drivers and other power components. The PIC16F616/HV616 family addresses these requirements with a built-in S/R latch to design a switch-mode power supply for these intermediate voltages.

"Engineers who used to rely solely on analog and discrete semiconductors for their designs have discovered the flexibility and lower system cost benefits of using a PIC microcontroller,” said Steve Drehobl, vice president of Microchip’s Security, Microcontroller and Technology Development Division. “Microchip continues to lead the way in providing these engineers with new PIC microcontrollers that enable them to design compact, programmable and cost-effective applications.”

Specific application examples include: home appliances (such as blenders, toasters, smoke alarms and thermostat controls), cooling-fan control and other motor control, power tools, system control and monitoring, battery chargers, automated door sensors, speedometers, and power supplies.

Development Tools
These new microcontrollers are supported by the full suite of Microchip’s development tools, including the free MPLAB® IDE (Integrated Development Environment), the low-cost MPLAB ICD 2 (In-Circuit Debugger) and the MPLAB PM3 Universal Device Programmer.

The PICkit™ 2 Starter Kit (DV164120) enables engineers, students and anyone with an interest to easily begin development and experimentation with the PIC16F616/HV616 family for a very low initial investment of $49.99. The kit connects to any personal computer via full-speed USB 2.0, which allows faster programming and firmware upgradeability, and requires no additional power supply for the programmer or target application board.

Embedded technology transforms the automobile

2006-11-14T20:26:00.000-08:00

Every year, automobile manufacturers worldwide pack new embedded processors into their vehicles. Tiny processors under the hood and in the deep recesses of the car gather and exchange information to control, optimize, and monitor many of the functions that just a few years ago were purely mechanical.

Power-train computers adjust the engine and transmission for best performance, and safety processors remind you to use seat belts, warn you of hazards, and deploy air bags during an accident. Embedded controllers also drive motors to operate power seats, windows, and mirrors. Driver-information processors display or announce navigation and traffic information along with vehicle diagnostics. Embedded controllers are even keeping track of your driving habits". In addition, enormous activity occurs in the entertainment and mobile-computing areas. These features add up to plenty of opportunities in automotive electronics for embedded designers, software engineers, and development-tool suppliers.

To take advantage of these electronics opportunities, designers must concentrate on the automotive industry's primary design goals of safety, cost, and reliability. Safety is paramount in automotive-embedded-system design. An unexpected actuation of any system while an automobile is traveling at 70 mph could be disastrous. As you have seen in recent news, an air bag that is too powerful or that deploys at the wrong time may also be life-threatening. Manufacturers insure against safety problems by doing extensive hardware and software testing.

In addition to underscoring product safety, designers must fight to reduce the recurring cost of automotive-electronics systems. Manufacturers may use the same engine-controller design, for example, in many automobiles over several model years. North American automotive manufacturers alone ship approximately 15 million vehicles every year. Furthermore, today's manufacturers are forming global partnerships, so an embedded system could be on a production line anywhere in the world. Reducing the parts cost by just a few cents could add up to millions of dollars in savings over the life of the system.

Reliability may be the toughest design goal to achieve because of the rugged environment of the automobile. Your circuitry must survive nearby high-voltage EMI, temperature extremes from the weather and the heat of the engine, and severe shock from bad roads and occasional collisions. Your high-reliability design tools include extended-temperature-range parts, derated components, redundant circuitry, worst-case simulations, and careful mechanical design. Although testing time grows with the complexity of the system, a reliable controller also requires complete software testing to verify every state and path. A single bug that slips through testing may force a very expensive recall to update the software.

Count the bits

A successful automotive-electronic design depends on careful processor selection. Modern power-train controllers for the engine and transmission generally require 32-bit CPUs to process the real-time algorithms. Other areas of the automobile, such as safety, chassis, and body systems, use both 16- and 32-bit processors, depending on control complexity. For example, a 16-bit processor is sufficient for a single-air-bag system. However, for multiple air bags and occupant sensing, the peak computing load dictates a 32-bit processor. Newer air-bag-control systems may have to sense multiple collisions from the front and side, then sequentially release front, side, and possibly headrest air bags to protect occupants. Although an air-bag controller simply scans sensors for most of its life, the processing power must be available to complete the entire decision algorithm and actuation routines in just a few milliseconds.

Historically, low-cost 8- and 16-bit processors were the norm in automotive controllers, and software engineers developed most of the code in assembly language. However, today's shorter development schedules and increased software complexity have forced designers to resort to a higher level language in which designers can easily reuse modules from project to project. Although some critical timing situations still use assembly language, the software trend in automotive embedded systems is toward C.

In addition to analyzing the language, controller designers must analyze the need for an operating system. Although there is substantial deterministic activity in automotive embedded controllers, few real-time operating systems (RTOSs) exist. With just a small number of asynchronous inputs, most automotive controllers meet the real-time requirements by sequentially polling sensors. Power-train controllers sample inputs according to engine speed; safety, chassis, and body controllers check sensors based on time.

However, as the complexity of embedded systems increases, the automotive industry will adopt RTOSs and more sophisticated software-development tools. Highly integrated entertainment, speech-recognition, and navigation systems already employ real-time software to deal with asynchronous inputs from the user and communications sources. For example, an RTOS from QNX Software coordinates real-time Global Positioning System (GPS) information with map displays and audio commands for an in-car navigation system. What's more, IBM visionaries predict pervasive computing and plan to include a mobile client-server architecture and embedded Java in the company's next generation of automotive software.

Nonetheless, automotive embedded-system designers complain that commercial RTOSs are just too large and feature-rich for high-volume, memory- stingy vehicle controllers. To address these complaints, European automotive manufacturers have defined the OSEK standard as a common platform and application-programming interface for automotive-embedded-controller development. (OSEK derives its name from the German phrase for "open systems and interfaces for in-car electronics.") OSEK specifies a communications protocol, network-management rules, and a memory-efficient operating system for automotive controllers. Although industry experts have questioned the readiness of the OSEK standard, Wind River Systems, Accelerated Technology, and Integrated Systems have announced compatible operating systems.

Car networks

Designers face not only the challenge of dealing with extra RTOS software but also the challenge of squeezing in the hardware and code for in-car networking. Networks are a recent addition to embedded controllers. The first automotive network was simply a UART connection between two processors. This serial connection allowed two controllers to easily share information, but there was no simple way to add more nodes to the network. Then, to satisfy new government emissions regulations, vehicle manufacturers and the Society of Automotive Engineers (SAE) developed J1850, a specialized automotive-network protocol. J1850 met the requirements of the California Air Resources Board and the Environmental Protection Agency (EPA) for a standard interface into the engine and transmission controller to retrieve emissions data. J1850 soon became the in-car-networking standard and replaced the UART serial communications. Manufacturers also found that they could use networks to reduce harness wiring and its associated weight and manufacturing costs.

In a global economy, a single network standard would solve several problems. Current EPA regulations require that test and diagnostic tools interface to J1850 even though embedded-systems designers might prefer CAN because of its higher data rate. Some North American engine and transmission systems use CAN to communicate, but these systems use a gateway processor to adapt to J1850. The SAE is investigating the possibility of changing the EPA test tools to CAN. However, the SAE's biggest obstacle is the large number of facilities that uses J1850. Every dealership would have to retrofit its test and diagnostic tools at significant costs. A single network standard would also lower development and production costs, because US automobile makers have agreements with manufacturers worldwide to exchange engine and power-train components, including controllers.

Algorithm development

Controller-software development begins with a dynamic system-simulation tool, such as Simulink from The MathWorks or MATRIXx from Integrated Systems. By integrating an engine model with proposed sensors, actuators, and a controller algorithm, the designer can adjust fuel, air, and exhaust gas to optimize performance under varying loads. The simulation produces and documents an algorithm for one feature of the control system. For example, engine controllers include an algorithm to recirculate exhaust gas under certain engine load conditions and to minimize uncombusted fuel emissions. The designer can adjust the algorithm for the best engine horsepower and meet EPA emissions requirements.

When the simulation is complete and engineering approves it for production, the specification for the algorithm goes to the software-development group for implementation. Software engineers use off-the-shelf compilers, debuggers, and simulators from tool suppliers such as Wind River Systems and Software Development Systems to code and test the algorithm. A systems engineer then combines individual engine-control algorithms, communications software, and diagnostic software with prototype hardware for integration testing. Manufacturers use a number of intermediate test stands to verify controller operation before installation in a test vehicle. Test stands can be anything from a simple electromechanical tester with a switch for adding or removing a load from the controller harness to a dedicated piece of hardware that simulates an engine in real time.

Finally, engineers install the controller and software into an actual automobile to test the control system as well as the physical engine and transmission. Based on measured performance, engineers can adjust control-system coefficients to maximize performance and to account for inaccuracies in the original engine model. Nonvolatile memory stores control-system coefficients to facilitate field changes . For example, Cadillac rcently delivered cars that had emissions tests with the air conditioning off. The EPA later retested the vehicles with the air conditioning on and found significant emissions outside of the acceptable range. Cadillac corrected the problem by updating engine-controller coefficients in the field.

The automotive world presents some interesting challenges to the embedded-systems designer. As silicon increases its presence in the automobile's mechanical world, the embedded-systems designer must analyze and select from the flood of new technology to stay near the leading edge and to maintain the traditional automotive goals of reliability, cost, and safety.

Analog Devices’ Latest Blackfin Family

2006-11-14T20:15:00.000-08:00

Targeting the increasingly demanding requirements of embedded automotive and industrial applications, Analog Devices, Inc. is introducing its newest series of Blackfin® processors: the ADSP-BF54x family (ADSP-BF542/BF544/BF548/BF549). The Blackfin ADSP-BF54x family features a balance of increased I/O and memory bandwidth, on-chip memory, and integration of CAN and MOST system peripherals to deliver high performance and cost-effectiveness to industrial and multimedia/networked in-vehicle automotive applications. The BF54x family also embeds new Lockbox™ Secure Technology that protects developers’ software code, which represents the valuable intellectual property that differentiates their products.

“Analog Devices’ newest Blackfin processor family brings developers more of what they need to design performance-hungry and connectivity-ready electronics, making it ideal for manufacturers of automotive electronics as well as industrial manufacturers, particularly those designing applications requiring field upgradeability,” said John Croteau, general manager, Convergent Platforms and Services Group, Analog Devices, Inc. “The Blackfin processor is unmatched for enabling these products because of its blend of signal- and control-processing multimedia support. The software flexibility is critical for automotive applications in particular because media formats and communications standards inevitably change in the time it takes applications to go from concept to the highway.”

Increased System Performance Drives Convergent Applications

“System performance has become a crucial enabler for in-vehicle electronics because audio, video, and hands-free communication continue to intensify processing demands,” said Peter Kohlschmidt, director, Development Infotainment, Audi AG, Ingolstadt. "The Blackfin processor has proven a good fit for our audio head units.”

Operating at speeds up to 600MHz, the new ADSP-BF54x family doubles the internal bus bandwidth of Blackfin to 532 Mbytes per second to meet the demands of system peripheral integration. This internal bandwidth is matched by up to 260Kbytes of on-chip memory. Additionally, the high-performance processing is complemented by a rich set of integrated peripherals that reduces system cost and development risk by minimizing the need for external components. High Speed USB on-the-go (OTG) with integrated PHY, ATAPI controller, and NAND flash controller are just a few of the peripheral options on the ADSP-BF54x family. Up to 152 general-purpose I/O ports are also supported. Furthermore, these new Blackfin processors offer a MXVR (Media Transfer) interface that easily integrates automotive telematics and infotainment systems with vehicles through a MOST network.

The ADI CROSSCORE^® software and hardware development tools that support other Blackfin Processors support the ADSP-BF54x family. These tools include the award-winning VisualDSP++^® integrated development and debug environment (IDDE), emulators, and EZ-KIT Lite^® evaluation hardware.

Automotive Leadership in Telematics and Infotainment Systems

A different processing profile characterizes today’s automotive telematics and infotainment systems because multimedia content standards are changing constantly, threatening to out-date automotive electronics before the vehicle even hits the road. With its outstanding system performance and rich set of integrated peripherals, the new code- and pin-compatible Blackfin ADSP-BF549, which includes CAN (Controller Area Network) and MOST (Media-Oriented System Transport), is a platform capable of addressing a wide scope of applications such as audio/video rear seat entertainment systems (RSEs), digital radios, driver assistance systems, navigation head units, and hands-free phones.

Industrial Focus

The new Blackfin family is ideal for a wide-variety of industrial applications where field upgradeability, local storage and display capabilities are critical. Target markets include factory automation, wireless instrumentation, wireless telecommunications radios and switching, and security systems where the signal processing performance and rich peripheral set of the Blackfin BF54x family works to differentiate the end application.

Lockbox Security Features Protect Intellectual Property

The Blackfin ADSP-BF54X family also incorporates new Lockbox^™ Secure Technology that allows developers to ensure code and data integrity through authentication, and to safeguard confidentiality by means of encrypting any or all of the system. Not only does this provide a means for developers to protect the intellectual property of their own products, but it also offers a platform for the digital rights management (DRM) content protection that is required for devices such as media players. In addition, the programmable aspect of the Lockbox software-based system gives system designers the opportunity to choose any encryption algorithm they prefer.

A Convergent Future Demands Blackfin-Class Processing

Analog Devices’ Blackfin embodies a new breed of 16/32-bit embedded processor with the industry’s highest performance and power efficiency for applications where a convergence of capabilities -- multi-format audio, video, voice and image processing; multi-mode baseband and packet processing; and real-time security and control processing -- are critical. It is this powerful combination of software flexibility and scalability that has gained Blackfin widespread adoption in convergent applications such as digital home entertainment, networked and streaming media, automotive telematics and infotainment, and digital radio and mobile TV.

Firmware--not so firm anymore

2006-11-11T21:40:00.000-08:00

My dad complained to me about a problem he faced in his office PC. I tried to explain to my dad last week when he complained that pictures he pastes into documents appear on the monitor with lines through them. His video drivers were originals, and we know that darn near every PC shipped goes with buggy drivers. He was appalled that the computer industry ships flawed products and treat customers so shabbily. I've gotten used to these annoying upgrades and haven't thought about them in years. But he's right.

In the pre-flash days firmware was all but impossible to upgrade. Fewer products suffered from customer-discovered bugs. Did the horrific cost of a field upgrade make developers more careful in their tests? Are time-to-market pressures pushing products out the door before their time? Or is it possible that our products are so complex now, with so much code, that bugs are inevitable?

There's a parallel with the auto industry of the '70s. Then, Detroit expected dealers and customers to resolve long lists of problems. The Japanese came to America and showed the error of those ways and almost destroyed the domestic car industry. Today PC users -- and, it seems, more and more embedded systems consumers -- are also expected to work their way through punch-lists of defects.

In the '70s American automakers and consumers thought there was no practical solution to the problem of shoddy cars. Consumers were resigned to a series of dealer visits during the first few months of new ownership. If we assume today that big systems are inherently buggy, will some brilliant upstart prove us wrong? America is the world's largest exporter of software. Is that hegemony as tenuous as we found Detroit's to be?