<?xml version="1.0" encoding="UTF-8" standalone="no"?><?xml-stylesheet type="text/xsl" href="https://community.cadence.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:itunes="http://www.itunes.com/dtds/podcast-1.0.dtd" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" version="2.0"><channel><title>Cadence PCB Skill Forum</title><link>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor</link><description></description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator><language>en-us</language><itunes:explicit>no</itunes:explicit><itunes:subtitle>Upload your SKILL files here. Give a brief summary of how to best use the SKILL code.</itunes:subtitle><item><title>Conversion from Orcad Layout .MAX to Allegro X .BRD</title><link>https://community.cadence.com/thread/65832?ContentTypeID=0</link><pubDate>Thu, 12 Mar 2026 17:53:03 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:393f39e8-c63d-4fae-9e00-1e0e3e2b7661</guid><dc:creator>metalimi</dc:creator><slash:comments>2</slash:comments><comments>https://community.cadence.com/thread/65832?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65832/conversion-from-orcad-layout-max-to-allegro-x-brd/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;I recently had the need to work on old designs created using Orcad Layout 10.3. We have since (many years ago) migrated to Allegro PCB. Back in Allegro 17.2 there was a &amp;quot;Unsupported&amp;quot; feature to convert from layout to Allegro. Now that I have Allegro X 24.1, I no longer see that option. Is it simply not supported at all anymore? Is there any work around?&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Unable to generate ODB++ for a particular board</title><link>https://community.cadence.com/thread/65824?ContentTypeID=0</link><pubDate>Tue, 10 Mar 2026 12:25:22 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:5c1d9a12-2f27-4379-9a32-b169c097bfca</guid><dc:creator>Shashank</dc:creator><slash:comments>3</slash:comments><comments>https://community.cadence.com/thread/65824?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65824/unable-to-generate-odb-for-a-particular-board/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;While trying to generate ODB++ for the board below error pops up, it happens only for this particular board.&lt;/p&gt;
&lt;p&gt;Kindly let me know what could be the issue here&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&amp;#39;C:/test-/log_brd2odb.log&amp;#39; does not exist.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>System Variables in Allegro X PCB Editor for page border</title><link>https://community.cadence.com/thread/65821?ContentTypeID=0</link><pubDate>Tue, 10 Mar 2026 07:11:36 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:c63f1866-6ef2-41c5-aa57-c0b6611552b1</guid><dc:creator>MZ20250602835</dc:creator><slash:comments>3</slash:comments><comments>https://community.cadence.com/thread/65821?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65821/system-variables-in-allegro-x-pcb-editor-for-page-border/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Dear all,&amp;nbsp;&lt;/p&gt;
&lt;p&gt;in system capture schema we have variables such as&amp;nbsp;CON_TOTAL_PAGES and TOTAL_DESIGN_SHEETS for page title. May i ask if the variables with the same function also available in allegro x pcb editor(&lt;span&gt;Allegro X Designer&lt;/span&gt;25.1) which can be used directly for page border? If not may i ask how could be possible define such a variables&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:319px;max-width:258px;" height="319" src="https://community.cadence.com/resized-image/__size/516x638/__key/communityserver-discussions-components-files/28/pastedimage1773125621275v4.png" width="258" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Many thanks.&lt;/p&gt;
&lt;p&gt;Moyan&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Create shape from lines comand</title><link>https://community.cadence.com/thread/65808?ContentTypeID=0</link><pubDate>Thu, 05 Mar 2026 13:12:22 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:8f641834-b007-42f2-a249-5a8dc1f4a519</guid><dc:creator>BB202506061452</dc:creator><slash:comments>3</slash:comments><comments>https://community.cadence.com/thread/65808?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65808/create-shape-from-lines-comand/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;I use Allegro 25.1&lt;/p&gt;
&lt;p&gt;I imported a .dxf file and created a shape out of the imported lines (its a logo that I want to put on the board geometry sst layer). Then I switched to a different pcb to do the exact same thing with the exact same .dxf file and now the comand cant select anything. It worked just fine on my other pcb. I can also not select or unselect any option in the &amp;#39;Desgin Object Find Filter&amp;#39; when the create shape from lines comand is active. Everything is greyed out. What is going on?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>step mapping best practices</title><link>https://community.cadence.com/thread/65805?ContentTypeID=0</link><pubDate>Wed, 04 Mar 2026 16:29:14 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:f19291d9-d8ac-44f2-86ae-03dff6f20113</guid><dc:creator>drdanmc</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/65805?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65805/step-mapping-best-practices/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;I have some questions about best practices for step mapping.&amp;nbsp; In our symbol (footprint) library, some of them are very specific for a particular vendor component and so it is easy to just edit the .dra file to do the mapping.&amp;nbsp; But we have some others where one layout symbol is shared across multiple devices.&amp;nbsp; So far the only thing I&amp;#39;ve been able to do is to open the 3d mapper in the layout and under 3D mapper -&amp;gt; Device, set up the mapping.&amp;nbsp; But of course this is tied to a particular board design and so that work gets recreated every time a particular device is used.&amp;nbsp; Also I&amp;#39;ve noticed that sometimes some symbols and devices that are placed in the layout won&amp;#39;t even show up in the list in the 3d mapper and I have no idea why.&lt;/p&gt;
&lt;p&gt;So is there any &amp;quot;standard&amp;quot; way of specifying a device level mapping that will get used automatically?&amp;nbsp; Or do I need to maintain a large .map file with entries like:&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&amp;nbsp;&amp;lt;MapItem device=&amp;quot;device_name&amp;quot; package=&amp;quot;symbol_name&amp;quot;&amp;gt;&lt;/p&gt;
&lt;p&gt;and then load this mapping file manually into the layout?&amp;nbsp; Would there be any simple way to automate this or is the process to manually first do place-&amp;gt;update symbols to update the mapping in the .dra files and then in the 3d mapper import a map file for the device level mappings?&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Also, any idea why some symbols and devices that are place in the layout don&amp;#39;t show up in the 3d mapper window?&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Thanks&lt;/p&gt;
&lt;p&gt;-Dan&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Introducing Positive Masks for Enhanced Mask Layer Visualization and Manufacturability</title><link>https://community.cadence.com/thread/65800?ContentTypeID=0</link><pubDate>Tue, 03 Mar 2026 10:00:47 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:1d040010-015c-4478-9f31-e1d11f22f33f</guid><dc:creator>vidhyaparameswari</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/65800?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65800/introducing-positive-masks-for-enhanced-mask-layer-visualization-and-manufacturability/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hello everyone,&lt;/p&gt;
&lt;p&gt;We&amp;#39;re excited to announce the introduction of positive masks in Release 25.1, a significant enhancement for mask layer visualization and manufacturability. Traditionally, mask layers have been represented as negative, requiring designers to mentally invert the image to understand the manufactured outcome. This approach can be counterintuitive and error-prone, adding complexity to the design and review process.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;What are Positive Masks?&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;Positive masks allow mask layers to be treated as positive, making it easier to visualize and verify mask shapes. With this new feature, a dynamic shape is generated on a new Positive Mask class, representing the mask layer. Openings in this dynamic shape use the same use model as dynamic copper shapes, while voiding is performed using traditional negative mask pads in padstacks and objects on mask subclasses.&lt;/p&gt;
&lt;p&gt;To take advantage of this feature, follow these steps:&lt;/p&gt;
&lt;ol&gt;
&lt;li&gt;Navigate to Setup &amp;gt; Cross-section&amp;gt; Physical, and select the Positive Mask option.&lt;/li&gt;
&lt;li&gt;In the Cross-Section Editor, enable the Positive Mask option to generate new positive mask layers with a default dynamic shape.&lt;/li&gt;
&lt;/ol&gt;
&lt;p&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; You will be able to enable positive mask only for solder mask top/bottom and not for any other layers.&lt;br /&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/28/pastedimage1772531959558v1.png" alt=" " /&gt;&lt;/p&gt;
&lt;ol start="3"&gt;
&lt;li&gt;To customize the positive mask, adjust the shape in the Color Dialog box.&lt;/li&gt;
&lt;/ol&gt;
&lt;p&gt;&lt;strong&gt;&amp;nbsp;Visualizing Positive Masks&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;To view the new Positive Mask column, follow these steps:&lt;/p&gt;
&lt;ol&gt;
&lt;li&gt;Open the Visibility Pane and move PosMask from Available classes to Visible classes.&lt;/li&gt;
&lt;li&gt;Select the PMSk checkbox in the Visibility panel of the layout editor user interface.&lt;br /&gt;&lt;br /&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/28/pastedimage1772532016687v2.png" alt=" " /&gt;&lt;/li&gt;
&lt;/ol&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>SPMHGE-268 netin had erros, use Viewlog to review the log file</title><link>https://community.cadence.com/thread/65783?ContentTypeID=0</link><pubDate>Thu, 26 Feb 2026 14:58:29 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:2898fb9c-3590-403c-bf11-00e44179a9f8</guid><dc:creator>hnguyen2310</dc:creator><slash:comments>2</slash:comments><comments>https://community.cadence.com/thread/65783?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65783/spmhge-268-netin-had-erros-use-viewlog-to-review-the-log-file/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;I have a brd file that I want to add some&amp;nbsp;decoupling caps in a &amp;quot;quick and dirty&amp;quot; way, just so I can run some simulation quickly. I put these additional caps in a netlist (.txt file) and make sure the formatting is correct. I push this netlist in the board using &amp;#39;import --&amp;gt; logic/netlist --&amp;gt; Other&amp;#39;. I get the above error &amp;quot;SPMHGE-268 netin had erros, use Viewlog to review the log file&amp;quot;&lt;/p&gt;
&lt;p&gt;A collegue of mine tried importing this same .txt and was successful. So it was not because of the txt file. Has anyone run into this issue before? Thanks.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Missing 3D Icon</title><link>https://community.cadence.com/thread/65768?ContentTypeID=0</link><pubDate>Tue, 24 Feb 2026 08:59:05 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:43347e9b-a3fb-49ef-8d9b-df02b28d00a8</guid><dc:creator>QI202602231047</dc:creator><slash:comments>5</slash:comments><comments>https://community.cadence.com/thread/65768?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65768/missing-3d-icon/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;I&amp;#39;m using OrCAD X PCB&amp;nbsp; Designer on 25.1 with the path S010 and the 3D icon (Not the 3D Canva icon) is missing, I have check all the icon in the menu but i still don&amp;#39;t have the 3D icon.&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/28/pastedimage1771923490796v5.png" alt=" " /&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/28/pastedimage1771923525377v6.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Allegro hangs when trying to edit vias in CM</title><link>https://community.cadence.com/thread/65767?ContentTypeID=0</link><pubDate>Mon, 23 Feb 2026 22:33:26 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:61e1c261-6217-4289-8346-13528c16c44f</guid><dc:creator>pmillett</dc:creator><slash:comments>9</slash:comments><comments>https://community.cadence.com/thread/65767?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65767/allegro-hangs-when-trying-to-edit-vias-in-cm/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;When I try and edit the via list in CM by double clicking on the via list, Allegro hangs. Sometimes it comes back in a minute, sometimes not. It doesn&amp;#39;t matter what PCB is open - even if I create a new blank PCB, it hangs.&lt;/p&gt;
&lt;p&gt;Any ideas why?&lt;/p&gt;
&lt;p&gt;Otherwise opening and editing a PCB works fine.&lt;/p&gt;
&lt;p&gt;Thanks in advance!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>BUG? Allegro 17.4S022: Made new project and PSM or PAD files normally located in "local" directory have disappeared</title><link>https://community.cadence.com/thread/65746?ContentTypeID=0</link><pubDate>Mon, 16 Feb 2026 09:56:49 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:8a567266-b8c0-4d03-b817-860a2ebcbd39</guid><dc:creator>istBrook</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/65746?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65746/bug-allegro-17-4s022-made-new-project-and-psm-or-pad-files-normally-located-in-local-directory-have-disappeared/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hi all,&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;I&amp;#39;m using the&amp;nbsp;&lt;span&gt;17.4S022 of Capture and PCB editor and as of this week the footprints located in the install DIR under&amp;nbsp;&amp;quot;X:\Cadence\share\local\pcb\padstacks&amp;quot; no longer exists nor do the standard passive compoents that cadence has by default, i.e. C0603, R0603 etc.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Upon making a new allegro file for a new project from capture (schematic to PCB designing) I&amp;#39;m met with the below for all standard components.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&amp;nbsp;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;#1 WARNING(SPMHNI-192): Device/Symbol check warning detected. [help]&lt;/span&gt;&lt;/p&gt;
&lt;pre&gt;&lt;/pre&gt;
&lt;pre&gt;&lt;span&gt;WARNING(SPMHNI-194): Symbol &amp;#39;C0805&amp;#39; used by RefDes C171 for device &amp;#39;CAP NP_C0805_10U&amp;#39; not found. &lt;/span&gt;&lt;/pre&gt;
&lt;pre&gt;&lt;span&gt;The symbol either does not exist in the library path (PSMPATH) or is an old symbol from a previous release.  &lt;br /&gt;&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;At the bottom I can see that the locations are all there that I&amp;#39;d expect (see below).&lt;/pre&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;------ Library Paths ------&lt;/span&gt;&lt;/p&gt;
&lt;pre&gt;&lt;span&gt;MODULEPATH =  . &lt;/span&gt;&lt;/pre&gt;
&lt;pre&gt;&lt;span&gt;           d:/cadence/share/local/pcb/modules &lt;/span&gt;&lt;/pre&gt;
&lt;pre&gt;&lt;/pre&gt;
&lt;pre&gt;&lt;span&gt;PSMPATH =  . &lt;/span&gt;&lt;/pre&gt;
&lt;pre&gt;&lt;span&gt;           symbols &lt;/span&gt;&lt;/pre&gt;
&lt;pre&gt;&lt;span&gt;           .. &lt;/span&gt;&lt;/pre&gt;
&lt;pre&gt;&lt;span&gt;           ../symbols &lt;/span&gt;&lt;/pre&gt;
&lt;pre&gt;&lt;span&gt;           d:/cadence/share/local/pcb/symbols &lt;/span&gt;&lt;/pre&gt;
&lt;pre&gt;&lt;span&gt;           d:/cadence/share/pcb/pcb_lib/symbols &lt;/span&gt;&lt;/pre&gt;
&lt;pre&gt;&lt;span&gt;           d:/cadence/share/pcb/allegrolib/symbols &lt;br /&gt;           d:/8_PCB-parts/psm&lt;br /&gt;&lt;/span&gt;&lt;/pre&gt;
&lt;pre&gt;&lt;/pre&gt;
&lt;pre&gt;&lt;span&gt;PADPATH =  . &lt;/span&gt;&lt;/pre&gt;
&lt;pre&gt;&lt;span&gt;           symbols &lt;/span&gt;&lt;/pre&gt;
&lt;pre&gt;&lt;span&gt;           .. &lt;/span&gt;&lt;/pre&gt;
&lt;pre&gt;&lt;span&gt;           ../symbols &lt;/span&gt;&lt;/pre&gt;
&lt;pre&gt;&lt;span&gt;           d:/cadence/share/local/pcb/padstacks &lt;/span&gt;&lt;/pre&gt;
&lt;pre&gt;&lt;span&gt;           d:/cadence/share/pcb/pcb_lib/symbols &lt;/span&gt;&lt;/pre&gt;
&lt;pre&gt;&lt;span&gt;           d:/cadence/share/pcb/allegrolib/symbols &lt;/span&gt;&lt;/pre&gt;
&lt;pre&gt;&lt;span&gt;           D:/8_PCB-parts/pad &lt;br /&gt;&lt;/span&gt;&lt;/pre&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;I did read that there was an issue with the reading of files etc should you favorite the locations should you need to add more, so have removed that from the &amp;quot;user preferences&amp;quot; and yet I haven&amp;#39;t got the footprints back.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Would I need to delete the &amp;quot;bugged&amp;quot; allegro folder and remake it in order to move past it?&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Library not existing when downloading external symbols</title><link>https://community.cadence.com/thread/65728?ContentTypeID=0</link><pubDate>Tue, 10 Feb 2026 10:21:16 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:51790b26-1ae5-4b8d-a344-18119275d2d4</guid><dc:creator>jritter</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/65728?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65728/library-not-existing-when-downloading-external-symbols/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hi all,&lt;/p&gt;
&lt;p&gt;after a short pause of designing PCBs I wanted to do a schematic,&lt;/p&gt;
&lt;p&gt;now I try to import a Symbol/Footprint from any external source with the help of the integrated Component Explorer and its plugin to Samacsys and Ultra Librarian.&lt;/p&gt;
&lt;p&gt;For both the following error occurs neglecting which component I want to integrate.&lt;/p&gt;
&lt;p&gt;ERROR(ORCAP-2472): Failed to place symbol instance for model &amp;#39;AD7314ARMZ&amp;#39; because library &amp;#39;&amp;#39; does not exist.&lt;/p&gt;
&lt;p&gt;Even the try to include a new library does give a solution. After upgrading to 25.1 it is not working either.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;After modifying the capture.ini to&amp;nbsp;&lt;/p&gt;
&lt;p&gt;[Part Selector Configured Libraries]&lt;br /&gt;Dir0=C:\Users\julian ritter\Documents\Cadence_Workspace\LIBRARY1.olb&lt;br /&gt;Number of Configured Libraries=1&lt;/p&gt;
&lt;p&gt;the same error occurs.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Is there any solution for this problem?&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>New Feature Alert: Smart Search Revolutionizes Designing Experience</title><link>https://community.cadence.com/thread/65708?ContentTypeID=0</link><pubDate>Wed, 04 Feb 2026 06:02:58 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:676e1cb5-8c74-4b65-afb8-c8659c7fb621</guid><dc:creator>vidhyaparameswari</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/65708?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65708/new-feature-alert-smart-search-revolutionizes-designing-experience/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hello designers,&lt;/p&gt;
&lt;p&gt;Exciting news! With the latest update in version 25.1, we&amp;#39;ve got an intuitive tool that is going to change the way you modify designs. Introducing Smart Search - a powerful feature that helps you quickly locate specific property names and user preferences without requiring an in-depth knowledge of exact property names or preferences.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;What can Smart Search do for you?&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;Search for properties, settings, and preferences using keywords, partial keywords, or &amp;#39;fuzzy&amp;#39; search terms&lt;/p&gt;
&lt;p&gt;Efficiently find and access specific properties and user preferences with the intuitive search function&lt;/p&gt;
&lt;p&gt;Modify designs with ease, making informed decisions when adding attributes&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Enhanced Features:&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;1. The Edit Property dialog box has been revamped to display property descriptions when a property in the list is clicked, empowering you to make informed decisions.&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/28/pastedimage1770184841006v1.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;2.The User Preference search has been enhanced to return predictive results, making it easier for you to choose the most suitable preference.&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/28/pastedimage1770184867315v2.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;What do you think of this new feature? Share your thoughts and feedback.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Can you please provide some means of freely viewing old .brd files?</title><link>https://community.cadence.com/thread/65702?ContentTypeID=0</link><pubDate>Fri, 30 Jan 2026 18:02:16 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:04410408-f792-4d6d-aa96-5eace3ec0c15</guid><dc:creator>GM202601306333</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/65702?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65702/can-you-please-provide-some-means-of-freely-viewing-old-brd-files/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;I&amp;#39;m working on a new hardware design (not in your tools, sorry...)&lt;/p&gt;
&lt;p&gt;With a couple of the IC&amp;#39;s I&amp;#39;m using, the manufacturers&amp;#39; evaluation board PCB design is only provided as an Allegro .brd file. It&amp;#39;d be nice if they provided gerbers at least, but they don&amp;#39;t.&lt;/p&gt;
&lt;p&gt;Unfortunately the current 25.1 PCB viewer won&amp;#39;t open them, throwing a &amp;quot;this was last saved using 16.5 and must be updated using DB Doctor&amp;quot; error, and of course you don&amp;#39;t provide DB Doctor as part of the viewer. And you don&amp;#39;t have earlier versions of the viewer available for download anymore.&lt;/p&gt;
&lt;p&gt;So now my options are:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Drop several thousand dollars on the paid tools to update the file (ain&amp;#39;t gonna happen...)&lt;/li&gt;
&lt;li&gt;Try and get the IC manufacturer to update their .brd file or provide gerbers (tried already, they won&amp;#39;t)&lt;/li&gt;
&lt;li&gt;Try and find someone with the paid tools to upgrade the board files for me (any volunteers?)&lt;/li&gt;
&lt;li&gt;Since you don&amp;#39;t provide the old viewers anymore, download an earlier version of the viewer in a .RAR file from a sketchy website and infect my computer with malware.&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;Skimming the forum, there&amp;#39;s plenty of other people with the same issue, and it looks like some have been helped on an individual basis. I&amp;#39;d definitely appreciate it if you&amp;#39;d help me somehow.&lt;/p&gt;
&lt;p&gt;But I think the electronics design community as a whole would greatly appreciate it if you&amp;#39;d either provide the earlier viewer version, or include DB Doctor or whatever with the free viewer.&lt;/p&gt;
&lt;p&gt;Thanks!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Constraint Region</title><link>https://community.cadence.com/thread/65696?ContentTypeID=0</link><pubDate>Wed, 28 Jan 2026 17:10:39 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:738b43f5-04fa-4911-914e-498c6047faa8</guid><dc:creator>PCB6453</dc:creator><slash:comments>2</slash:comments><comments>https://community.cadence.com/thread/65696?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65696/constraint-region/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;In the Allegro Constraint Manager under Physical and Spacing, I can make a region for certain areas of the design.&amp;nbsp; Is there such a thing under Manufacturing?&amp;nbsp; My intent is to have different &amp;quot;Manufacturing&amp;quot; rules for certain parts of the PCB.&amp;nbsp; ie.&amp;nbsp; the whole board will follow Class 3 rules.&amp;nbsp; But on a smaller BGA area, I would like it to be Class 2 due to the pitch of the BGA.&amp;nbsp; I would create a region under Physical and Spacing but I&amp;#39;m wondering if we can do the same un &amp;quot;Manufacturing&amp;quot;.&amp;nbsp; If this is not possible, any ideas on how to approach this?&amp;nbsp; Right now, the best thing I can do is run the check twice.&amp;nbsp; Once for Class 3 and ignore the errors within the BGA and run another one for Class 2.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Net Logic</title><link>https://community.cadence.com/thread/65689?ContentTypeID=0</link><pubDate>Tue, 27 Jan 2026 16:16:21 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:d151e80f-73fd-4df9-af35-c2551d1e48fe</guid><dc:creator>Wildwpe</dc:creator><slash:comments>14</slash:comments><comments>https://community.cadence.com/thread/65689?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65689/net-logic/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Had a really fun task I&amp;#39;ve been working and I am at the last step.&lt;br /&gt;&lt;br /&gt;We had Gerbers from over 20 yrs ago and of course no board or schematic file, so I had to recreate the layout from the Gerber files.&amp;nbsp; I used DXF imports and the logic commands and have finished the work.&amp;nbsp; We&amp;nbsp;did&amp;nbsp;output artwork compares using a Gerber tool to confirm accuracies.&amp;nbsp;&lt;br /&gt;&lt;br /&gt;So here&amp;#39;s my question:&lt;br /&gt;I created 6 nets that have no logic assigned to them, and I can&amp;#39;t seem to delete them form the database.&amp;nbsp; I am able to rename them, and confirm they are unassigned. Tried every trick I could think of.&amp;nbsp; Any suggestions? (please no skill code).&lt;br /&gt;Thanks,&lt;br /&gt;Wild&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Two layer vs multi-layer: Working Layer via selection does not work when routing two layers?</title><link>https://community.cadence.com/thread/65678?ContentTypeID=0</link><pubDate>Sat, 24 Jan 2026 16:44:33 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:7e7273e0-7c6a-41f6-9680-7ccbfe2cd1c5</guid><dc:creator>Ulf K</dc:creator><slash:comments>2</slash:comments><comments>https://community.cadence.com/thread/65678?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65678/two-layer-vs-multi-layer-working-layer-via-selection-does-not-work-when-routing-two-layers/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Forum,&lt;/p&gt;
&lt;p&gt;Uising PCB Editor 25.1 HF001&lt;/p&gt;
&lt;p&gt;When routing a simple two layer board I have two via definitions defined in the Constraint Manager.&lt;/p&gt;
&lt;p&gt;But when routing I cannot select any other than the one defined at the top of the Constraint Manager via list (Physical Constraint Set - All layers, column &amp;quot;Vias&amp;quot;) . There is no &amp;quot;[...]&amp;quot; entry in the Working layer (small menu) that appears if WL is selected. Only the two layers and their check marks. When opening a multi-layer design with two vias defined, the via select menu [...] appears every time i want to go from one layer to another.&lt;/p&gt;
&lt;p&gt;The only way to change via when routing the two layer board is to invoke the CNS, and from there do &amp;quot;UP&amp;quot; or &amp;quot;DOWN&amp;quot; the via list. This is cumbersome.&lt;/p&gt;
&lt;p&gt;I have not found any set-up menu item that defines this behavior or in the way the PCB router should not present this via selection when only doing simple two layer boards.&lt;/p&gt;
&lt;p&gt;Bug or RTFM?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Why can I not reply to a post?</title><link>https://community.cadence.com/thread/65667?ContentTypeID=0</link><pubDate>Wed, 21 Jan 2026 20:46:48 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:475723cc-8b73-4646-8b29-7815b4c9bfdd</guid><dc:creator>avant</dc:creator><slash:comments>3</slash:comments><comments>https://community.cadence.com/thread/65667?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65667/why-can-i-not-reply-to-a-post/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;I cannot reply to a new post, only to someone else who has replied to the post.&lt;/p&gt;
&lt;p&gt;Why?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>What is the best PCB Editor Command?</title><link>https://community.cadence.com/thread/65665?ContentTypeID=0</link><pubDate>Wed, 21 Jan 2026 15:08:59 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:88f1867b-998f-4e70-834c-fc197f450412</guid><dc:creator>John T</dc:creator><slash:comments>20</slash:comments><comments>https://community.cadence.com/thread/65665?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65665/what-is-the-best-pcb-editor-command/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;&lt;span style="font-size:150%;"&gt;You may already know how to type function commands directly into the PCB Editor Command panel. This can be a great time saver and performance boost.&amp;nbsp;&amp;nbsp;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" alt=" " src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/28/pastedimage1769007409983v1.png" /&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;span style="font-size:150%;"&gt;We have compiled a list of some of our engineers&amp;#39; favorite commands&amp;nbsp;which we recommend.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span style="font-size:150%;"&gt;Let us know what your favorite commands are?&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span style="font-size:150%;"&gt;Any questions, recommendations or other commands you think are more helpful?&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;So far we&amp;nbsp;gathered the following:&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Command&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Explanation&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;filemgr&lt;/strong&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Opens the file explorer in the current design directory&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;reopen&amp;nbsp;&amp;nbsp;&lt;/strong&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Reopens the current design to remove unsaved changes&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;done&amp;nbsp; &amp;nbsp;&lt;/strong&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;Closes current active command&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;record &amp;nbsp;&amp;nbsp;&lt;/strong&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Initiates the recording of a script under a specified name&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;stop&amp;nbsp;&lt;/strong&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; Halts the recording of scripts or macros and closes the .scr file&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;replay&amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;/strong&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;Executes a specified script; prompts for a script filename if none is provided&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;enved&amp;nbsp; &amp;nbsp;&lt;/strong&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;Opens the User Preferences Editor UI &amp;ndash; normally located in the Setup menu&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;cns cmmodes&amp;nbsp; &amp;nbsp;&lt;/strong&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;Opens the Constraints Analysis Modes UI&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;design compare&amp;nbsp;&lt;/strong&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;Opens design comparison ui ( xml netlist version)&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;set&amp;nbsp;&lt;/strong&gt; &amp;nbsp;&lt;strong&gt; &amp;nbsp; &amp;nbsp;&lt;/strong&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; Display a list of all currently defined variables for&amp;nbsp;the session&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;funckey&amp;nbsp;&amp;nbsp;&lt;/strong&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Opens a list of all currently defined Alias Keys and Function Shortcut Keys&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;(up arrow key)&amp;nbsp; &amp;nbsp;&lt;/strong&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; Recall the previous command &amp;ndash; consecutive use possible&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;span style="font-size:150%;"&gt;Any more?! Comments or questions appreciated...&amp;nbsp;&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>How to unlock symbol?</title><link>https://community.cadence.com/thread/65663?ContentTypeID=0</link><pubDate>Wed, 21 Jan 2026 09:40:45 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:d1030cb3-6f09-42bd-a770-44be3827d957</guid><dc:creator>bdc66a938f164d</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/65663?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65663/how-to-unlock-symbol/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;I have a symbol that somehow got locked and cannot be moved. I do right click, property edit, look for &amp;quot;Locked&amp;quot; and cannot change its value as shown below:&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;img src="https://i.ibb.co/QFRzDkmq/Screenshot-From-2026-01-21-10-37-15.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;If I select the option without value and hit &amp;quot;apply&amp;quot; then Allegro says &amp;quot;Property `LOCKED` requires a value`. If I try to delete that property by checking the box and hitting apply, Allegro says:&lt;/p&gt;
&lt;p&gt;```&lt;br /&gt;(SPMHA1-147): No such child. Contact Cadence Customer Support with the design file and the steps resulting in the error.&lt;br /&gt;(SPMHGE-248): No instances of property LOCKED found on the selected element(s).&lt;br /&gt;```&lt;/p&gt;
&lt;p&gt;How can I unlock the symbol?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Can't find ASIZEH for manufacturing files</title><link>https://community.cadence.com/thread/65660?ContentTypeID=0</link><pubDate>Tue, 20 Jan 2026 11:14:44 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:36755bd1-88dd-4c4b-b39f-39ef48ec03b2</guid><dc:creator>CarlosC</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/65660?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65660/can-t-find-asizeh-for-manufacturing-files/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;I am making a PCB in OrCAD X PCB Professional 24.1. I want to generate the manufacturing files and add the format symbol ASIZEH following this tutorial:&amp;nbsp;&lt;a href="https://www.youtube.com/watch?v=LQjdiZackGk&amp;amp;list=PL5i-0nGB3ScnIsNEI4Vn8nzobYuD67dIG&amp;amp;index=9"&gt;https://www.youtube.com/watch?v=LQjdiZackGk&amp;amp;list=PL5i-0nGB3ScnIsNEI4Vn8nzobYuD67dIG&amp;amp;index=9&lt;/a&gt;. However, it can&amp;#39;t find it. I thought it was an issue of environment variables so I added this paths to the environment variables:&amp;nbsp;&lt;/p&gt;
&lt;p&gt;C:/Cadence/SPB_24.1/share/local/pcb/symbols&amp;nbsp;&lt;/p&gt;
&lt;p&gt;C:/Cadence/SPB_24.1/share/pcb/pcb_lib/symbols&lt;/p&gt;
&lt;p&gt;C:/Cadence/SPB_24.1/share/pcb/allegrolib/symbols&lt;/p&gt;
&lt;p&gt;But it still can&amp;#39;t find it.&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:379px;max-width:472px;" alt=" " height="379" src="https://community.cadence.com/resized-image/__size/944x758/__key/communityserver-discussions-components-files/28/pastedimage1768907467406v1.png" width="472" /&gt;&lt;/p&gt;
&lt;p&gt;Yes, I checked &amp;quot;Library&amp;quot; in Advanced Settings. So I don&amp;#39;t know what else is missing if I follow the tutorial. I am using an university license, I don&amp;#39;t know if I have restricted that option but I don&amp;#39;t think so.&lt;/p&gt;
&lt;p&gt;Thanks.&lt;/p&gt;
&lt;p&gt;Carlos&lt;/p&gt;
&lt;p&gt;Update: I added another library, the ASIZEH file wasn&amp;#39;t in the paths I included, but in&amp;nbsp;C:\Cadence\SPB_24.1\share\pcb\examples\board_design\symbols. However, it still doesn&amp;#39;t work.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Join us for a Lunch and Learn Session at Cadence’s Noida Office on Wednesday, January 28, 2026 and learn all about the exceptional features of Allegro X System Capture</title><link>https://community.cadence.com/thread/65657?ContentTypeID=0</link><pubDate>Tue, 20 Jan 2026 06:12:27 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:5e327211-3a8b-4695-abf8-985775df2816</guid><dc:creator>Renu Vibha</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/65657?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65657/join-us-for-a-lunch-and-learn-session-at-cadence-s-noida-office-on-wednesday-january-28-2026-and-learn-all-about-the-exceptional-features-of-allegro-x-system-capture/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;In today&amp;rsquo;s fast-paced electronic design landscape, engineers need a modern, forward-looking schematic capture tool that goes beyond basic schematics. Traditional technologies often fall short, offering limited functionality, consuming excessive time, relying on manual processes, and struggling to handle the complexity of contemporary designs.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;&lt;em&gt;Allegro X System Capture&lt;/em&gt;&lt;/strong&gt; is sophisticated front-end technology for all your schematics needs. It provides a highly integrated, automated, and collaborative workspace for the modern hardware engineer. Here are the differentiated capabilities of Allegro X System Capture:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;strong&gt;Once stop library cockpit&lt;/strong&gt;: Unified search, Part Manager&lt;/li&gt;
&lt;li&gt;&lt;strong&gt;Core features&lt;/strong&gt;: Version control, variant editor, functional diagram, Decap Wizard&lt;/li&gt;
&lt;li&gt;&lt;strong&gt;Reliability analysis&lt;/strong&gt;: 120+ audit checks, electrical over-stress, and MTBF&lt;/li&gt;
&lt;li&gt;&lt;strong&gt;Integrated layout&lt;/strong&gt;: View, floorplan edit with full-fledged constraint manager&lt;/li&gt;
&lt;li&gt;&lt;strong&gt;In-design analysis&lt;/strong&gt;: Signal and power integrity, topology explorer, and thermal&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;strong&gt;Are you interested in learning about the exceptional features of Allegro X System Capture?&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Join us for a Lunch and Learn Session at Cadence&amp;rsquo;s Noida Office.&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;Please send an email to &lt;a href="mailto:hbhargav@cadence.com"&gt;hbhargav@cadence.com&lt;/a&gt; or &lt;a href="mailto:dshikhar@cadence.com"&gt;dshikhar@cadence.com&lt;/a&gt; to confirm your participation.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Event Details&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;Date: Wednesday, January 28, 2026&lt;/p&gt;
&lt;p&gt;Time: 10:00am &amp;ndash; 2:00pm IST&lt;/p&gt;
&lt;p&gt;Location: Darbaar Conference Room, Plot 57A, B &amp;amp; C, Noida Special Economic Zone - Noida&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Installing True Type Text Fonts and adding stroke text in Orcad X 25.1</title><link>https://community.cadence.com/thread/65649?ContentTypeID=0</link><pubDate>Fri, 16 Jan 2026 00:16:29 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:2361572c-57d1-4765-8f9d-4c0da6ccd8d4</guid><dc:creator>TomLinkECU</dc:creator><slash:comments>3</slash:comments><comments>https://community.cadence.com/thread/65649?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65649/installing-true-type-text-fonts-and-adding-stroke-text-in-orcad-x-25-1/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;I&amp;#39;m very happy to see the True-Type text features that have been added to the recent releases of Orcad X, but I have a couple of issues with them.&lt;/p&gt;
&lt;p&gt;Firstly, my company uses non-windows default fonts as part of its brand, which I have installed on my computer. These fonts don&amp;#39;t show up in the PCB editor for me to use, so I still need to use my old workarounds of converting text to bitmaps and importing it. Is there a way to install fonts on Windows that will allow them to be used in Orcad PCB editor?&lt;/p&gt;
&lt;p&gt;Secondly, for consistency with older parts in our library we still want to use vector fonts for designators and similar labels. Since 24.1 I have not been able to find a way to add vector text - only true type. As a workaround I have been converting the true-type text to a text block style after placing the text, but I would prefer to cut out this additional step. Is it possible?&lt;/p&gt;
&lt;p&gt;Thanks!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Productivity Toolbox - Post Processing - ODB++ Generation</title><link>https://community.cadence.com/thread/65639?ContentTypeID=0</link><pubDate>Tue, 13 Jan 2026 14:18:04 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:c050f06b-5963-4a23-9d78-62bf049500e3</guid><dc:creator>ersgfserg645</dc:creator><slash:comments>2</slash:comments><comments>https://community.cadence.com/thread/65639?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65639/productivity-toolbox---post-processing---odb-generation/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;I can export ODB++&amp;nbsp;from Allegro PCB Editor 25.1.&lt;/p&gt;
&lt;p&gt;I would like to add ODB++ generation to the Post Processing output generation job, so that it is generated as part of the default&amp;nbsp;output data.&lt;/p&gt;
&lt;p&gt;How to achieve this?&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Like this (timestamp 1:55, creating an ODB++ task and including a .scr file):&lt;/p&gt;
&lt;p&gt;&lt;a href="https://www.youtube.com/watch?v=8-p4AfQ9apU"&gt;https://www.youtube.com/watch?v=8-p4AfQ9apU&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;I can do that, but what is in the .scr file?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Help with linking schematic to PCB symbol, pin assignment</title><link>https://community.cadence.com/thread/65627?ContentTypeID=0</link><pubDate>Sun, 11 Jan 2026 19:57:19 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:4e3f47dd-2333-4009-aaa4-9530f86ee222</guid><dc:creator>ML202512236951</dc:creator><slash:comments>2</slash:comments><comments>https://community.cadence.com/thread/65627?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65627/help-with-linking-schematic-to-pcb-symbol-pin-assignment/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;I&amp;#39;m working with a custom defined ball grid array (BGA).&amp;nbsp; I have created the PCB footprint with Presto, a grid of 18 x 18 pads.&amp;nbsp; Then I created the schematic symbol, and specified pins using the spreadsheet option.&amp;nbsp; Pins are labeled as A1, A2...D1,D2, etc. When I attempt to place the PCB footprint, I can see that the nets exist.&amp;nbsp; When I try to actually place it on the PCB and compete the operation, I get an error message that says: &amp;quot;&lt;span&gt;(SPMHGE-82): Pin numbers do not match between symbol and component. Run dev_check on device file for more information.&amp;quot;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;In the screenshot example I have to two pins wired to the BGA.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Any insight would be great, thank you.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/28/Screenshot-from-2026_2D00_01_2D00_11-11_2D00_51_2D00_26.png" alt=" " /&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>request powerSI trial for academy analyzing ALTIUM layout</title><link>https://community.cadence.com/thread/65601?ContentTypeID=0</link><pubDate>Sun, 28 Dec 2025 10:43:17 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:f4548e9f-cabe-4819-85e2-6177b7651cf8</guid><dc:creator>YV202508175258</dc:creator><slash:comments>2</slash:comments><comments>https://community.cadence.com/thread/65601?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65601/request-powersi-trial-for-academy-analyzing-altium-layout/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hello , I am working In Altium to design PCB, and I want to extract S-params S21 in perticular.Three questions:&lt;/p&gt;
&lt;p&gt;1.Is there a way to imprt PCB data from Altium to PowerSI so I could analize the S-params between two IC&amp;#39;s?&lt;/p&gt;
&lt;p&gt;2.Is there university program which could give a trial license for powerSI?&lt;/p&gt;
&lt;p&gt;3.Is there more suitable forum for These questions?&lt;/p&gt;
&lt;p&gt;Thanks.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>