Cadence Functional Verification Shared Code Forum

e-code: Shareware RAM

snaptube — Thu, 20 Apr 2023 02:17:26 GMT

Modified version of shr_ram from erm_lib to support mvl_values
regards: snaptube

How to transfer trained an artificial neural network to Verilog-A

CJL — Mon, 17 Oct 2022 11:58:59 GMT

Hi all, I've trained a device model with the approach of an artificial neural network, and it shows well fit.

May I know how to transfer the trained model to Verilog-A, so that, we can use this model to do circuit simulation?

And I've searched for some lectures that provide the Verilog-A code in the appendix, but I'm freshman in the field of Verilog-A,

could anyone tell me each statement? such as

real hlayer-w[0:(NI*NNHL)-1

Creating cover items for sparse values/queue or define in specman

rgarcia071 — Fri, 12 Jul 2019 17:51:31 GMT

Hello,

I have a question I want to create a cover that consists a sparse values, pre-computed (a list or define) for example l = {1; 4; 7; 9; 2048; 700} I'd like to cover that data a (uint(bits:16)) had those values, Any suggestion on how to achieve this, I'd prefer to stay away from macros, and avoid to write a lot of code

struct inst {

data :uint(bits:16);
opcode :uint(bits:16);
!valid_data : list of uint(bits:16) = {0; 12; 10; 700; 890; 293;};
event data_e;
event opcode_e;

cover data_e is {
item data using radix = HEX, ranges = {
//I dont want to write all of this
range([0], "My range1");
range([10], "My range2");
//... many values in between
range([700], "My rangen");
};

item opcode;

cross data, opcode;
};

post_generate() is also {
emit data_e;
};
};

help for $sscanf

jaichandra — Fri, 22 Apr 2016 04:03:22 GMT

Can anyone tell me how i can supress few strings or integers while reading with $sscanf.

I read a line from a file into a string. there are few strings and integers seperated by white spaces in the line. I am interested in one string which comes at postion 5 in the line. how can i suppress all other strings and integers with $scanf.

i tried the following syntax but it dint work.

$sscanf(line,"* * * * %s",string_arg);

i am tring to supress first 4 integers/strings in the line.

help with automating adding CLP files to DRA files

jen11 — Thu, 12 Jun 2014 16:50:37 GMT

Question for forum:

I’m currently working on a code to automatically add CLP files to DRA files and then add two classes called “APPROVED” and “CLP”. To do this manually you have to open a DRA file, click file import subdrawing and choose the clp file with the same name as dra. (path already set). You then set the clp to position x 0 0. And then click on Set Up > Subclasses > Package geometry and type in “Approved” and “Clp.”

So far we’ve recorded the macros in Allegro for all of these actions. The macros correspond to one specific file name and we want to apply this to numerous files. To do this we created a python program that locates all of the specified CLP and DRA files, and if they have a matching name, runs a for loop that puts each file name into a stored variable that runs a loop for each file. We converted this script into batch and then added a function that we thought would run Allegro macros from batch.

In order to get the script working, we need to have an allegro batch command that will run the script without opening the Allegro start popup, or closing the popup when it appears. We need to do this to run any script from starting Allegro.

I’ve done another similar program in batch where I made a for loop for each dra file and within the loop there was a batch a2dxf command that converted all dra files to dxf files. Is there a similar batch command for adding clp files to position 0 0 and/ or adding classes? If anyone has done something similar please let me know!

Thank you very much for the help.

Jen

Specman Mode for Emacs

hannes — Tue, 11 Feb 2014 13:16:39 GMT

Attached is the latest emacs mode for e/Specman - version 1.23

Please follow the install instructions in the top section of the actual file
(after unzipping it) to install/load this package with your emacs.

memory leak in ncsim

whiteriver1 — Fri, 16 Aug 2013 06:32:51 GMT

ncsim will consume an increasing ammount of memory when a function has an output port that return an associative array which was not initialized. My simulator version is 12.10-s011.

Below is a code example to reproduce the failure. The code is inside a class (uvm_object):

function void a_function(output bit ret_val[int]);

// empty

endfunction : get_cov

each time the call is done a small ammount of memory is allocated. I n my case I call this function several (millions of) times during simulation and then I can see the memory leaking.

Hold violation at post P&R simulation

shahein — Mon, 08 Oct 2012 04:28:27 GMT

Hello,

I am working in a digital design. The functional, post synthesis and post P&R without IO pads are all working fine, i.e., functionally and with clean timing reports "no setup/hold violations". I just added the IO pads to the same design, I had to change the timing constraints a bit for the synthesis but I have a clean design at SOC Encounter, i.e., clean DRC and clean timing reports "no setup/hold violations". However, when I perform simulation using the exported net-list from SOC Encounter together with SDF exported from the same tool, I got a lot of hold violations. Consequently, the design is not funcitioning.

Why and how I can overcome or trobleshoot this issue?

In waiting for your feedback and comments.

Regards.

Simvision - Signal loading

Kirubha — Fri, 04 May 2012 04:59:11 GMT

Hi all

Good day.

Can anyone tell me whether it is possible to view the signals once it is modified from its previous values without closing the simvision window. If possible kindly let me know the command for it(Linux).

Is it possible to view the schematic for the code written?? Kindly instruct me.

Thanks all.

S K S

Einstein's puzzle (System Verilog) solved by Incisive92

Vinayhonnavara — Fri, 20 Nov 2009 17:54:07 GMT

Hello All,

Following is the einstein's puzzle solved by cadence Incisive92 (solved in less than 3 seconds -> FAST!!!!!!)

Thanks,

Vinay Honnavara

Verification engineer at Keyu Tech

vinayh@keyutech.com

// Author: Vinay Honnavara

// Einstein formulated this problem : he said that only 2% in the world can solve this problem
// There are 5 different parameters each with 5 different attributes
// The following is the problem

// -> In a street there are five houses, painted five different colors (RED, GREEN, BLUE, YELLOW, WHITE)

// -> In each house lives a person of different nationality (GERMAN, NORWEGIAN, SWEDEN, DANISH, BRITAIN)

// -> These five homeowners each drink a different kind of beverage (TEA, WATER, MILK, COFFEE, BEER),

// -> smoke different brand of cigar (DUNHILL, PRINCE, BLUE MASTER, BLENDS, PALL MALL)

// -> and keep a different pet (BIRD, CATS, DOGS, FISH, HORSES)

///////////////////////////////////////////////////////////////////////////////////////
// *************** Einstein's riddle is: Who owns the fish? ***************************
///////////////////////////////////////////////////////////////////////////////////////

/*
Necessary clues:

1. The British man lives in a red house.
2. The Swedish man keeps dogs as pets.
3. The Danish man drinks tea.
4. The Green house is next to, and on the left of the White house.
5. The owner of the Green house drinks coffee.
6. The person who smokes Pall Mall rears birds.
7. The owner of the Yellow house smokes Dunhill.
8. The man living in the center house drinks milk.
9. The Norwegian lives in the first house.
10. The man who smokes Blends lives next to the one who keeps cats.
11. The man who keeps horses lives next to the man who smokes Dunhill.
12. The man who smokes Blue Master drinks beer.
13. The German smokes Prince.
14. The Norwegian lives next to the blue house.
15. The Blends smoker lives next to the one who drinks water.
*/

typedef enum bit [2:0] {red, green, blue, yellow, white} house_color_type;
typedef enum bit [2:0] {german, norwegian, brit, dane, swede} nationality_type;
typedef enum bit [2:0] {coffee, milk, water, beer, tea} beverage_type;
typedef enum bit [2:0] {dunhill, prince, blue_master, blends, pall_mall} cigar_type;
typedef enum bit [2:0] {birds, cats, fish, dogs, horses} pet_type;

class Einstein_problem;

   rand house_color_type house_color[5];
   rand nationality_type nationality[5];
   rand beverage_type beverage[5];
   rand cigar_type cigar[5];
   rand pet_type pet[5];
        rand int arr[5];

   constraint einstein_riddle_solver {



       foreach (house_color[i])
           foreach (house_color[j])
               if (i != j)
               house_color[i] != house_color[j];
       foreach (nationality[i])
           foreach (nationality[j])
               if (i != j)
               nationality[i] != nationality[j];
       foreach (beverage[i])
           foreach (beverage[j])
               if (i != j)
               beverage[i] != beverage[j];
       foreach (cigar[i])
           foreach (cigar[j])
               if (i != j)
               cigar[i] != cigar[j];
       foreach (pet[i])
           foreach (pet[j])
               if (i != j)
               pet[i] != pet[j];


       //1) The British man lives in a red house.
       foreach(nationality[i])
               (nationality[i] == brit) -> (house_color[i] == red);


       //2) The Swedish man keeps dogs as pets.
       foreach(nationality[i])
               (nationality[i] == swede) -> (pet[i] == dogs);


       //3) The Danish man drinks tea.
       foreach(nationality[i])
               (nationality[i] == dane) -> (beverage[i] == tea);


       //4) The Green house is next to, and on the left of the White house.
       foreach(house_color[i])
               if (i<4)
                   (house_color[i] == green) -> (house_color[i+1] == white);


       //5) The owner of the Green house drinks coffee.
       foreach(house_color[i])
               (house_color[i] == green) -> (beverage[i] == coffee);


       //6) The person who smokes Pall Mall rears birds.
       foreach(cigar[i])
               (cigar[i] == pall_mall) -> (pet[i] == birds);


       //7) The owner of the Yellow house smokes Dunhill.
       foreach(house_color[i])
               (house_color[i] == yellow) -> (cigar[i] == dunhill);


       //8) The man living in the center house drinks milk.
       foreach(house_color[i])
               if (i==2) // i==2 implies the center house (0,1,2,3,4) 2 is the center
                   beverage[i] == milk;



       //9) The Norwegian lives in the first house.
       foreach(nationality[i])
               if (i==0) // i==0 is the first house
                   nationality[i] == norwegian;



       //10) The man who smokes Blends lives next to the one who keeps cats.
       foreach(cigar[i])
               if (i==0) // if the man who smokes blends lives in the first house then the person with cats will be in the second
                   (cigar[i] == blends) -> (pet[i+1] == cats);

       foreach(cigar[i])
               if (i>0 && i<4) // if the man is not at the ends he can be on either side
                   (cigar[i] == blends) -> (pet[i-1] == cats) || (pet[i+1] == cats);

       foreach(cigar[i])
               if (i==4) // if the man is at the last
                   (cigar[i] == blends) -> (pet[i-1] == cats);

       foreach(cigar[i])
               if (i==4)
                   (pet[i] == cats) -> (cigar[i-1] == blends);


       //11) The man who keeps horses lives next to the man who smokes Dunhill.
       foreach(pet[i])
               if (i==0) // similar to the last case
                   (pet[i] == horses) -> (cigar[i+1] == dunhill);

       foreach(pet[i])
               if (i>0 & i<4)
                   (pet[i] == horses) -> (cigar[i-1] == dunhill) || (cigar[i+1] == dunhill);

       foreach(pet[i])
               if (i==4)
                   (pet[i] == horses) -> (cigar[i-1] == dunhill);


       //12) The man who smokes Blue Master drinks beer.
       foreach(cigar[i])
               (cigar[i] == blue_master) -> (beverage[i] == beer);


       //13) The German smokes Prince.
       foreach(nationality[i])
               (nationality[i] == german) -> (cigar[i] == prince);


       //14) The Norwegian lives next to the blue house.
       foreach(nationality[i])
               if (i==0)
                   (nationality[i] == norwegian) -> (house_color[i+1] == blue);

       foreach(nationality[i])
               if (i>0 & i<4)
                   (nationality[i] == norwegian) -> (house_color[i-1] == blue) || (house_color[i+1] == blue);

       foreach(nationality[i])
               if (i==4)
                   (nationality[i] == norwegian) -> (house_color[i-1] == blue);


       //15) The Blends smoker lives next to the one who drinks water.
       foreach(cigar[i])
               if (i==0)
                   (cigar[i] == blends) -> (beverage[i+1] == water);

       foreach(cigar[i])
               if (i>0 & i<4)
                   (cigar[i] == blends) -> (beverage[i-1] == water) || (beverage[i+1] == water);

       foreach(cigar[i])
               if (i==4)
                   (cigar[i] == blends) -> (beverage[i-1] == water);

   } // end of the constraint block


   // display all the attributes
   task display ;
       foreach (house_color[i])
           begin
               $display("HOUSE : %s",house_color[i].name());
           end
       foreach (nationality[i])
           begin
               $display("NATIONALITY : %s",nationality[i].name());
           end
       foreach (beverage[i])
           begin
               $display("BEVERAGE : %s",beverage[i].name());
           end
       foreach (cigar[i])
           begin
               $display("CIGAR: %s",cigar[i].name());
           end
       foreach (pet[i])
           begin
               $display("PET : %s",pet[i].name());
           end
       foreach (pet[i])
           if (pet[i] == fish)
               $display("THE ANSWER TO THE RIDDLE : The %s has %s ", nationality[i].name(), pet[i].name());

   endtask // end display


endclass

program main ;

   initial
       begin
           Einstein_problem ep;
           ep = new();
           if(!ep.randomize())
               $display("ERROR");
           ep.display();
       end
endprogram // end of main

latest Specman-Matlab package

teamspecman — Tue, 15 Sep 2009 05:56:14 GMT

Attached is the latest revision of the venerable Specman-Matlab package (Lead Application Engineer Jangook Lee is the latest to have refreshed it for a customer in Asia to support 64 bit mode. Look for a guest blog post from him on this package shortly.)

There is a README file inside the package that gives a detailed overview, shows how to run a demo and/or validate it’s installed correctly, and explains the general test flow. The test file included in the package called "test_get_cmp_mdim.e" shows all the capabilities of the package, including:

* Using Specman to initialize and tear down the Matlab engine in batch mode

* Issuing Matlab commands from e-code, using the Specman command prompt to load .m files, initializing variables, and other operational tasks.

* Transfering data to and from the Matlab engine to Specman / an e language test bench

* Comparing data of previously retrieved Matlab arrays

* Accessing Matlab arrays from e-code without converting them to e list data structure

* Convert Matlab arrays into e-lists

Happy coding!

Team Specman

ctags for e code, Vim compatible

jpatel — Mon, 13 Jul 2009 17:56:07 GMT

In a nutshell, tags allows you to navigate through program code distributed over multiple files effectively. e.g if you see a function call or a struct in e-code and want to "jump" to the definition (which may be in a different file) then you just hit CTRL+] in Vim! Pressing CTRL+t will take you back where you came from. Check out http://vim.wikia.com/wiki/Browsing_programs_with_tags#Using_tags if you want to learn more about how to use tags with Vim.

This utility can generate tags file for your e files. It can either walk through e import order, a directory recursively or all directories on SPECMAN_PATH recursively! The tags file will have tags for struct, unit, types, events, defines, fields, variables, etc.

For help and some examples, just run ctags4e -help.

IntelliGen Statistics Metrics Collection Utilility

Corey Goss — Thu, 04 Jun 2009 16:24:28 GMT

As noted in white papers, posts on the Team Specman Blog, and the Specman documentation, IntelliGen is a totally new stimulus generator than the original "Pgen" and, as a result, there is some amount of effort needed to migrate an existing verification environment to fully leverage the power of IntelliGen. One of the main steps in migrating code is running the linters on your code and adressing the issues highlighted.

Included below is a simple utility you can include in your environment that allows you to collect some valuable statistics about your code base to allow you to better gauge the amount of work that might be required to migrate from Pgen to IntelliGen. The ICFS statistics reported are of particular benefit as the utility not only identifies the approximate number of ICFSs in the environment, it also breaks the total number down according to generation contexts (structs/units and gen-on-the-fly statements) allowing you to better focus your migration efforts.

IMPORTANT: Sometimes a given environment can trigger a large number of IntelliGen linting messages right off the bat. Don't let this freak you out! This does not mean that migration will be a long effort as quite often some slight changes to an environment remove a large number of identified issues. I recently encountered a situation where a simple change to three locations in the environment, removed 500+ ICFSs!

The methods included in the utility can be used to report information on the following:
- Number of e modules
- Number of lines in the environment (including blanks and comments)
- Number and type of IntelliGen Guidelines linting messages
- Number of Inconsistently Connected Field Sets (ICFSs)
- Number of ICFS contexts and how many ICFSs per context
- Number of soft..select overlays found in the envioronment
- Number of Laces identified in the environment

To use the code below, simply load it before/after loading e-code and then
you can execute any of the following methods:

- sys.print_file_stats()             : prints # of lines and files
- sys.print_constraint_stats()   : prints # of constraints in the environment
- sys.print_guideline_stats()    : prints # of each type of linting message
- sys.print_icfs_stats()          : prints # of ICFSs, contexts and #ICFS/context
- sys.print_soft_select_stats() : prints # of soft select overlay issues
- sys.print_lace_stats()           : *Only works for SPMNv6.2s4 and later* prints # of laces identified in the environment

Each of the above calls to methods produces it's own log files (stored in the current working directory) containing relevant information for more detailed analysis.
- file_stats_log.elog : Output of "show modules" command
- constraint_log.elog : Output of the "show constraint" command
- guidelines_log.elog : Output of "gen lint -g" (with notification set to MAX_INT in order to get all warnings)
- icfs_log.elog : Output of "gen lint -i" command
- soft_select_log.elog: Output of the "gen lint -s" command
- lace_log.elog : Output of the "show lace" command

Happy generating!

Corey Goss

e-code: Macro example code for Team Specman blog post

Hilmar — Mon, 27 Apr 2009 07:11:19 GMT

Hi everybody,

The attached package is a tiny code example with a demo for an upcoming Team Specman blog post about writing macros.

Hilmar

vr_ad register definition utility

StephenH — Tue, 13 Jan 2009 06:55:41 GMT

Hi All.

I put together a small Perl script to generate vr_ad register definitions from SPIRIT (IP-XACT) XML.
If you've got not idea what IP-XACT is, have a look here www.spiritconsortium.org/, then start pestering your design manager to use it :-)

The script can filter out registers and override R/W access types if needed.

An example XML file is included with the package so that you can play with it, and there's a detailed README.txt as well.

Here's an example of the generated e code:

// Automatically generated from xdmac.xml
// DO NOT EDIT, or your changes may be lost
<'

import vr_ad/e/vr_ad_top;

// Component = XDMAC
// memoryMap = xdmac
extend vr_ad_map_kind : [XDMAC];

// addressBlock = dma_eth
extend vr_ad_reg_file_kind : [DMA_ETH];

extend DMA_ETH vr_ad_reg_file {
  keep size == 20;
  keep addressing_width_in_bytes == 4;
};

// Register = command
// Reset    = 0x00
reg_def COMMAND DMA_ETH 0x0 {
  // Field resv3 = command[31:29]
  reg_fld resv3 : uint(bits:3) : R : 0 : cov ;
  // Field transfer_size = command[28:19]
  reg_fld transfer_size : uint(bits:10) : RW : 0 : cov ;
  // Field dma_transfer_target = command[18:14]
  reg_fld dma_transfer_target : uint(bits:5) : RW : 0 : cov ;
  // Field resv2 = command[13:10]
  reg_fld resv2 : uint(bits:4) : R : 0 : cov ;
  // Field transmit_receive = command[9:9]
  reg_fld transmit_receive : uint(bits:1) : RW : 0 : cov ;
  // Field resv1 = command[8:5]
  reg_fld resv1 : uint(bits:4) : R : 0 : cov ;
  // Field dest_address_enable = command[4:4]
  reg_fld dest_address_enable : uint(bits:1) : RW : 0 : cov ;
  // Field source_address_enable = command[3:3]
  reg_fld source_address_enable : uint(bits:1) : RW : 0 : cov ;
  // Field word_size = command[2:0]
  reg_fld word_size : uint(bits:3) : R : 0 : cov ;
};

// Register = queue_exec
// Reset    = 0x00
reg_def QUEUE_EXEC DMA_ETH 0x10 {
  // Field resv = queue_exec[31:1]
  reg_fld resv : uint(bits:31) : R : 0 : cov ;
  // Field exec = queue_exec[0:0]
  reg_fld exec : uint(bits:1) : RW : 0 : cov ;
};

extend XDMAC vr_ad_map {
  dma_eth : DMA_ETH vr_ad_reg_file;

  post_generate() is also {
    add_with_offset(0x00, dma_eth);
    dma_eth.reset();
  };
}
'>

Any comments, please feed them back to me so I can enhance the script.
Note that this forum forces me to post a .zip file rather than .tgz, please be careful to unpack the file under Linux, not Windows, else the DOS linefeeds will corrupt the Perl and XML files.

Steve

Specman Makefile generator utility

StephenH — Tue, 02 Dec 2008 08:31:45 GMT

I've heard lots of people asking for a way to generate Makefiles for Specman code, and it seems there are some who don't use "irun" which takes care of this automatically. So I wrote this little utility to build a basic Makefile based on the compiled and loaded e code.

It's really easy to use: at any time load the snmakedeps.e into Specman, and use "write makefile <name> [-ignore_test]".
This will dump a Makefile with a set of variables corresponding to the loaded packages, and targets to build any compiled modules.
Using -ignore_test will avoid having the test file in the Makefile, in case you switch tests often (who doesn't?).

It also writes a stub target so you can do "make stub_ncvlog" or "make stub vhdl" etc.

The targets are pretty basic, I thought it was more useful to #include this into the main Makefile and define your own more complex targets / dependencies as required.

The package uses the "reflection" facility of the e language, which is now documented since Specman 8.1, so you can extend this utility if you want (please share any enhancements you make).

Enjoy! :-)

Steve.

Register Classes for SystemVerilog OVM

AnilRaj — Tue, 09 Sep 2008 23:20:24 GMT

Hi, I am uploading a register class, which can be used for modeling hardware registers. I am uploading the source code and examples on how to run it. I also have a user guide which has all the APIs listed and explained. The user guide is ARV.pdf in the attached tar file. I have named the class ARV, which stands for Architect's Register View. It has got very good randomization and coverage features. Users have told me that its better than RAL. You can download it from http://verisilica.info/ARV.php
. There is a limit of 750KB in this cadence website. The ARV file is 4MB. That is why, I am uploading it at this site. I have a big pdf documentation and a doxygen documentation there. That is the reason for the bigger file size. The password to open the ZIP file is ovm_arv. I hope, everyone will use these classes.

Please contact me for any help.
Regards ANil

Welcome! Please use this forum to upload your code

archive — Tue, 05 Aug 2008 21:01:43 GMT

Please include a brief summary of how to use it.

ce_tools directory no longer shipped with Specman

archive — Tue, 22 Apr 2008 08:59:07 GMT

Hello All,

starting with version 8.1 the contents of the ce_tools directory will no longer
be shipped with Specman. The directory contains some unsupported AE/R&D
ware and has not been updated for several releases (i.e. most of those old
packages don't work with the latest release).

Attached is the contents of this directory. Please read the README before
using any of the packages.

Regards,
-hannes

Originally posted in cdnusers.org by hannes

Item constraint macro

archive — Wed, 31 Oct 2007 09:15:20 GMT

The following macros encapsulates a design pattern that enables constraining data item fields by 'do' actions of a high level sequence. This can be done without presupposing anything about the sequence tree generated under the do-ing sequence.

The tar file consists of 4 files:
- item_constraint_macro.e - the 'item_constraint' and 'sequence_export' macros definition
- item_constraint_example.e and sequence_export_example.e - use examples (one per each new construct)
- packet_seq.e - an auxiliary definition file for the examples

This topic was discussed in a Club-T presentation (Israel, Sophia-Antipolis, Munich). The presentation is also publicly avaiable.

Originally posted in cdnusers.org by matanvax

Macro for multiple-value when definitions

archive — Wed, 31 Oct 2007 08:23:28 GMT

The two macros below introduce new syntax for adding definitions to more than one 'when' determinant value at the same time. The first macro overloads 'extend' keyword and the second is the equivalent for 'when' keyword.

A use example:

extend [HUGE, BIG] packet {
    // definitions that pertain to these subtypes
};

The above code would be expanded in the following (naive) way:

extend HUGE packet {
    // definitions that pertain to these subtypes
};
extend BIG packet {
    // definitions that pertain to these subtypes
};

The macros code:

define 'statement>
       "extend \['name>,...\] 'name> ({;...})" as computed {
    for each in 'names> do {
        result = appendf("%sextend %s %s %s;",result,it,'name>,);
    };
    result = appendf("{%s}",result); // required only for versions 6.1.1 or earlier
};

define 'struct_member>
       "when \['name>,...\] 'name> ({;...})" as computed {
    for each in 'names> do {
        result = appendf("%swhen %s %s %s;",result,it,'name>,);
    };
    result = appendf("{%s}",result); // required only for versions 6.1.1 or earlier
};

Originally posted in cdnusers.org by matanvax

Posting code to the forum

archive — Tue, 24 Jul 2007 14:01:07 GMT

When posting code to the forums, copy from a text editor such as notepad, not from word or Outlook. Be sure to click the HTML tab BEFORE you paste your text.

Click on the "html" mode tab on your "reply" dialog box. Then wrap your text with like this: pasted text NOTE: Do not put a space in the I have done that here so it will show up as text. Also, be sure to click the HTML tab BEFORE you paste your text. This is how it will look when coded correctly pasted text

Originally posted in cdnusers.org by Administrator

Cisco's utilities library donation

archive — Fri, 18 May 2007 16:56:47 GMT

Dear users,

Cisco has graciously agreed to donate a library of several utilities packages to the e community. Please refer to the LIBRARY_README.txt for general information, and to each of the packages' PACKAGE_README.txt file for more information on each package. The tar file containing the utilities library is attached to this message.

The zip file containing informational slides on Cisco's utility library packages is also attached. The zip file is 9 mg so may take a bit to download. The file is too big to fit on this post, so the unzipped files are posted in three separate entries below.

For your convenience, we have also extracted the document “Directory Structure.doc” from the csco_base_env/docs location.

Note: The library contains the csco_testflow package, adding phases to e's run phase. Cadence strongly encourages Customers to adopt the testflow phases feature that Cadence is releasing in Specman6.2. The new phases in e will be similar to the phases defined in the csco_testflow package, but will be a formal part of the e language. For more information please contact IPCM@cadence.com.

Originally posted in cdnusers.org by meirav

c interface with specman

archive — Thu, 05 Apr 2007 01:56:58 GMT

Hi,

I need to call a c function form specman . I had followed the below steps.

File vb_pattern.e
---------------------------------

struct vb_pattern_s
{
%data_in_ch0 : uint (bits : 4);   // data on channel 0
%data_in_ch1 : uint (bits : 4);   // data on channed 1
%data_in_ch2 : uint (bits : 4);   // data on channel 2
%mode : uint (bits : 1);          // mode
%enable : uint (bits : 1);        // enable

};

C export vb_pattern_s;

------

file x_output_bfm.e
--------------------------------------------

check_patterns()@clk_e is
{

...
exp_viterbi_op();

}

routine exp_viterbi_op() is C routine viterbi_c_func;

---- EOF------

X.c
#include "vb_pattern.h"

void viterbi_c_func ()
{
SN_TYPE(vb_pattern_s) vb_packet;
SN_TYPE(mode) mode;
vb_packet = SN_SYS->ops
mode = vb_packet->mode;
printf("\n Printing from C environment MODE = %h \n", mode);

}

------------------- EOF----

x_top.e
------------
import tb/vb_pattern.e;
import tb/x_input_bfm.e;
import tb/x_output_bfm.e;
import tb/x_cover_dut.e;
import tb/x_env.e;

I did the following comand

>> sn_compile.sh -h_only x_top.e -o vb_pattern.h
>> gcc -c viterbi.c -o viterbi.o

I am getting the following error

viterbi.c: In function `viterbi_c_func':
viterbi.c:6: error: `t__mode' undeclared (first use in this function)
viterbi.c:6: error: (Each undeclared identifier is reported only once
viterbi.c:6: error: for each function it appears in.)
viterbi.c:6: error: syntax error before "mode"
viterbi.c:7: error: `mode' undeclared (first use in this function)

Please help me resolve this.

Kesav

Originally posted in cdnusers.org by kesava

Using "add net constraints" command in Conformal

archive — Thu, 01 Mar 2007 08:37:14 GMT

Hi

I have tried using "add net constraints" command to place one-cold constraints on a tristate enable bus. In the command line we need to specify the "net pathname" on which the constraints are to be enforced.

The bus here is 20-bit. How should the net pathname be specified to make this 20-bit bus signals one_hot or one_cold.

The bus was declared as follows:
ten_bus [19:0]

The command I used was

add net constraints one_hot /ren_bus[19]

What would the above command mean?
Should we not specify all the nets' pathnames on the bus?
Is it sufficient to specify the pathname of one net on the bus?
I could not get much info regarding the functionality of this command. I would be obliged if anyone can throw some light.

Thanks
Prasad.

Originally posted in cdnusers.org by anssprasad