Cadence Press Releases

Hitachi Achieves 40% Reduction in PCB Place-and-Route Design Time With Cadence Global Route Environment

Tuesday, 30 Jun 2009 00:00:00 GMT

Hitachi?s Deployment of Allegro Global Route Environment Technology Significantly Streamlines PCB Design Process

Cadence Collaborates with Toshiba Corporation on Integrated Design Environment for COT and SoC Design

Monday, 29 Jun 2009 00:00:00 GMT

Cadence Encounter Digital Implementation System and Virtuoso Custom Design Solution Form the Basis of Advanced Design Environment

Cadence CDNLive! EMEA User Conference Energizes the Electronics Industry

Monday, 29 Jun 2009 00:00:00 GMT

Cadence and Xilinx Simplify SoC Development with Enterprise Verification Capabilities for FPGA Targeted Design Platforms

Wednesday, 24 Jun 2009 00:00:00 GMT

IEEE-Standard Encryption for SecureIP Models Offers 2X Performance Boost; Open Verification Methodology (OVM) to Increase Schedule Predictability and Quality

IP Talks! 2009: IP Returns to Center Stage at DAC

Wednesday, 17 Jun 2009 00:00:00 GMT

Leading IP Suppliers Discuss Latest in Semiconductor IP at ChipEstimate.com Booth

Kaben Wireless Silicon Achieves up to 7X Performance Boost with Cadence Virtuoso Accelerated Parallel Simulator

Tuesday, 16 Jun 2009 00:00:00 GMT

Leading RFIC IP Provider Cites Success While Catching Flaws Early in the Design Process Enabling First-Pass Silicon Tapeout

Cadence Board Member Alberto Sangiovanni-Vincentelli Honored With 2009 IEEE/RSE Wolfson James Clerk Maxwell Award

Monday, 15 Jun 2009 00:00:00 GMT

Global Professional Societies Jointly Bestow Prestigious Award on EDA Pioneer

Cadence Design Systems, Inc. (Nasdaq:CDNS), the leader in global electronic design innovation, announced today that Dr. Alberto Sangiovanni-Vincentelli, member of the Cadence Board of Directors and a co-founder of the company, is being honored by IEEE and the Royal Society of Edinburgh (RSE) with the prestigious 2009 IEEE/RSE Wolfson James Clerk Maxwell Award for his pioneering research in the field of electronic design automation (EDA). In addition to acknowledging his many contributions to major advancements in the semiconductor and electronics industry, the award recognizes his enthusiasm and love of engineering, which have helped create an industry, establish leading companies, and inspire a new generation of innovators.

Taiwan?s Industrial Technology Research Institute Achieves Digital Video Tuner Tapeout Success with Cadence Virtuoso IC 6.1

Monday, 15 Jun 2009 00:00:00 GMT

ITRI Deployment to Boost Design Capabilities and Strengthen Taiwan?s Technological Competitiveness

Media Alert: Power Forward Initiative presents: Power-Aware Design Summit

Friday, 12 Jun 2009 00:00:00 GMT

Cadence Announces Restructuring

Wednesday, 10 Jun 2009 00:00:00 GMT

Expects to Achieve Annual Operating Expense Savings of $30 Million