FPGA TechChannel

Holt’s IP core product achieves formal MIL-STD-1553 validation

2018-08-23T20:43:23Z

Validation was performed on a Xilinx KCU116 Evaluation Kit utilizing a Xilinx Kintex UltraScale+ FPGA. The tested terminal featured Holt IP for MIL-STD-1553 protocol and synchronous host interface. Xilinx IP for AXI4 PCIe Endpoint provided PCI Express compatibility for host PC read/ write access and power-up configuration purposes. A custom board was designed by Holt to interface the HI-1587 transceiver/security IC and MIL-STD-1553 bus to the Xilinx FPGA board.

The IP Core supports Bus Controller (BC), Monitor Terminal (MT) or Remote Terminal (RT) functions, with all options having a high-performance synchronous host interface allowing connection to AMBA AXI4 interface protocol or PCI-Express. Enabled terminals communicate with the MIL-STD-1553 buses through a dual bus transceiver, HI-1587, and external isolation transformer.

The Holt IP core product includes the HI-6300 IP Core, a Verilog test bench and supporting documentation, allowing designers to instantiate the core in a variety of FPGA implementations.

Deepwave releases AI radio developed for RF deep learning applications

2018-07-27T15:48:36Z

Deep wave Digital’s aim is to enable the next-generation of RF systems to utilize deep learning by combining high performance computing (HPC) with a SDR in a single embedded platform. In response to the limited number of applications that have been demonstrated, deep learning algorithms within wireless technology have yet to achieve widespread adoption due to the lack of readily available hardware platforms, limited software tools, and the abstract nature of AI algorithms when compared to traditional Digital Signal Processing (DSP).

The AIR-T is a development and deployment SDR that pairs a 2×2 multiple-in multiple-out (MIMO) transceiver with a triad of signal processors: a Xilinx field programmable gate array (FPGA), an embedded central processing unit (CPU), and an embedded NVIDIA GPU.

John Ferguson, CEO at Deepwave Digital, says “It may be utilized as an AI signal identification receiver, a small-cell wireless node, or an ad-hoc wireless signal data interpreter. Alternatively, the FPGA can be used for traditional demodulation and the GPU for deep learning algorithms. For example, the FPGA would demodulate a video broadcast signal, sending the video frames to the onboard GPU where an existing computer vision algorithm is leveraged. The number of ways to use the AIR-T increases daily. Right now, using AI within RF system is an untapped technological market.”

Pentek releases new member of Jade family at IMS 2018

2018-06-12T19:41:34Z

The 2-channel Jade Model 71865 is a 200 MHz 16-bit A/D channelizer with 762 narrowband digital down converters (DDCs) and 4 wideband DDCs, based on the Xilinx Kintex UltraScale FPGA.

Model 71865. Image by Pentek.

The Model 71865 functions include two A/D acquisition IP modules for simplifying data capture and transfer. Each acquisition IP module contains a powerful controller for all data clocking, triggering and synchronization functions. From each of the two acquisition modules, A/D sample data flows into identical IP modules consisting of banks of wideband and narrowband DDCs. Finally, data is delivered to four DMA controllers linked to the PCIe Gen.3 x8 interface for transfer to a signal processor.

The four wideband DDCs can be set for decimation values between 8 and 128 in steps of 4, providing usable output bandwidths from 1.25 MHz to 20 MHz. The wideband DDCs can be quite effective in locating signals of interest.

Each of the six narrowband DDC banks can be configured to operate in three different modes, where each mode provides a different quantity of DDC channels and range of decimations. Output bandwidths range from 20 kHz to 1.25 MHz. All DDCs can be independently tuned from 0 Hz to 200 MHz with 32 bits of resolution.

Three banks of resampling filters accept input samples from each narrowband DDC at one sample rate and deliver output samples at another rate. Resampling filters are often used for better symbol recovery of signals using modern digital modulation schemes. Programmable ratios ensure flexibility to cover a wide range of wireless standards.

For more information, visit Pentek.

Ada and GNAT Pro selected to help run NASA CLARREO Pathfinder mission

2018-05-29T11:50:22Z

CLARREO Pathfinder is tasked with deploying a reflected solar spectrometer on the International Space Station (ISS) — starting in 2021 — that will detect the complete spectrum of radiation from the sun reflected by Earth.

Officials at LASP say that the center has selected the Ada language – instead of the C language — to develop the orchestration and interface portions of the CLARREO Pathfinder flight software, the portion responsible for controlling the instruments and interfacing with the ISS. The Ada application will run on an ARM Cortex M1 FPGA [field-programmable gate array] board, using a bare-metal configuration together with the Ravenscar microkernel provided by the GNAT Pro toolchain.

Mathew Merkow, CLARREO Pathfinder flight software lead at LASP, said of the selection: “We selected Ada and the Ravenscar microkernel for several reasons: it is as efficient as C, allows object-oriented design, will increase reliability, and provides a tasking system without introducing a great deal of complexity like many of the other options we considered. Ada provided an extremely robust and efficient foundation for our framework, Adamant. We partnered with AdaCore to port Ravenscar to the Cortex M1; they have been a great partner, and we are excited to continue our relationship with them on this and future projects.”

“The CLARREO Pathfinder project represents a new generation of applications developed with Ada, in areas where C has been the traditional choice,” said Quentin Ochem, lead of business development at AdaCore. “We are excited to support the usage of our technology to meet the ever-increasing reliability requirements and challenges of space missions.”

Cobham features PDMs for space applications in product showcase at NSREC

2017-07-19T13:18:37Z

NEW ORLEANS, La. Cobham officials showcased a series of products at this year’s Nuclear Space Radiation Effects Conference (NSREC).

Verific Acquires INVIO Platform from Invionics Software

2017-06-12T16:52:03Z

Rapid Application Development Platform will be added to Verific’s Parser Platform

Pentek introduces 8-channel A/D XMC module for communications and radar systems at Embedded Tech Trends

2017-01-25T19:21:50Z

UPPER SADDLE RIVER, N.J. Officials at Pentek, Inc. introduced a high-performance data converter XMC module based on the Xilinx Kintex Ultrascale FPGA during Embedded Tech Trends 2017. The Model 71131 is an eight-channel, 250 MHz XMC module featuring 16-bit A/Ds with programmable multiband digital down converters (DDCs).

Altera SoC Board Solution Adds OpenCL Support

2016-12-21T13:47:24Z

Critical Link’s MitySOM Cyclone SoC Module Adds OpenCL Support

Signal-processing challenges ongoing and evolving

2016-12-05T15:00:00Z

Advancements in processor technology mean that engineers and designers are able to meet the demand of signal-processing requirements in applications ranging from radar and software-defined radios to high-performance embedded computing (HPEC), and space systems. Designing for exacting high- bandwidth as well as size, weight, and power (SWaP) requirements are no longer a major challenge, but now are simply a checkbox in the design process. Even so, challenges remain, but designers are finding ways to face those issues by using fiber-optic technology, multicore processors, commercial off-the-shelf (COTS) components, and codesign methodologies.

Abaco Systems buys 4DSP as well as Technobox I/O product line

2016-11-30T15:27:53Z

HUNTSVILLE, Alabama. It’s been less than a year since Abaco left the GE umbrella when they were acquired by Veritas Capital out of New York City, but they have already started growing through acquisition with two embedded computing additions in the last month, acquiring 4DSP LLC of Austin, Texas as well as acquiring the Micro Mezzanine System (MMS) product line from Technobox in West Berlin, N.J.

Microsemi is First FPGA Provider to Offer Open Architecture RISC-V IP Core and Comprehensive Software Solution for Embedded Designs

2016-11-17T19:06:37Z

Company’s IGLOO2, SmartFusion2 and RTG4 Devices are the Ideal FPGAs to Build RISC-V CPU Subsystems, Offering Lower Power and Proven Security

4DSP Announces a High I/O Density, SWAP Optimized Compact Embedded System for Accelerating Development

2016-11-15T14:11:37Z

The CES821 can serve as a customizable standalone lab platfrom or a deployed embedded solution for applications such as digital beamforming, MIMO software defined radio, multi-channel RADAR, direction finding and more.

RFEL awarded a further phase of the Osborne programme for Defence Science and Technology Laboratory, Porton Down

2016-11-14T09:50:11Z

RFEL has been awarded a further phase of the Osborne programme for Defence Science and Technology Laboratory (DSTL), Porton Down, UK. The Osborne programme provides DSTL with the capability to conduct Electronic Warfare (EW) Systems development using Model-Based Design.

MYIR Introduced the High-performance Xilinx Zynq-7015 SoM and DevKit

2016-11-08T08:41:39Z

MYIR Introduced Linux-ready CPU Module and development board based on Xilinx Zynq-7015 SoC with dual-core ARM Cortex-A9 processor and Artix-7 FPGA.

Using DSP and RF circuit co-design to reduce risk and cost

2016-10-11T15:00:00Z

In all areas of business, increased communication leads to more streamlined processes and greater potential for success. This is no less true in system design. Within large design organizations, baseband field programmable gate array (FPGA) and radio frequency (RF) signal processing communities have traditionally been separated both physically and by the resources available to them–with each group using very different techniques and tools. Today, however, many RF functions are moving into the algorithmic world and this is making communication between the two areas more crucial than ever.

XJTAG Delivers Fast ISP Flash Configuration for ARM-Based FPGA SoCs

2016-10-04T11:56:59Z

XJTAG announces up to 20 times faster In-System Programming capability for Flash memories connected to dual ARM-Cortex-A9 based FPGAs.

Aldec Delivers Verification Support for Embedded Applications with New TySOM Embedded Development Kit

2016-08-17T00:19:56Z

Henderson, NV – August 17, 2016 – Aldec, Inc., a pioneer in mixed-HDL language simulation and hardware-assisted verification solutions for FPGAs and ASICs, today announced the release of TySOM(tm) Embedded Development Kit (EDK). The TySOM EDK targets embedded designers who require a platform with higher-performance RTL simulation and debugging for developing leading-edge embedded applications for IoT, Computer Vision, Automotive, Robotics and Factory Automation.

Intel selects Mercury Systems to join FPGA tech-based network

2016-05-13T16:00:40Z

CHELMSFORD, Mass. Intel officials selected Mercury Systems to join the company’s FPGA technology-based Design Solutions Network (DSN) as a platinum-tier provider.

Microsemi Announces Definitive Agreement to Divest Business to Mercury Systems, Inc.

2016-03-30T17:09:08Z

- Company Focusing on Core Strategic Solutions, Continuing Move Toward Higher Value IC and SoC Offerings – Improves Company’s Overall Profitability Metrics and Growth Profile

R&D Aviation Centre of Excellence facility opens its doors in Ireland

2016-02-02T21:35:41Z

ALISO VIEJO, Calif. The Aviation Centre of Excellence has opened its doors in Ennis, Ireland. The research and development facility will support design, development, and manufacturing of Microsemi’s product line of aviation intelligent power solutions (IPS).

COTS processing drives modern electronic warfare systems

2016-02-01T15:00:00Z

“Cognitive EW represents a significant new step in EW… being able to create new responses on the fly.”

IR-Enhanced CCD Camera for Scientific Imaging

2016-01-25T14:39:45Z

Critical Link’s newest MityCCD camera with Hamamatsu’s S11501 sensor; superior near infrared performance and the latest in scientific image sensor technology.

Aggios Announces Software-defined Power Management Solution For Xilinx Zynq Ultrascale+ Mpsoc

2015-11-11T13:36:13Z

Seed Energy Manager for Zynq UltraScale+ MPSoC debuts at ARM TechCon, Nov 11-12

Avnet Opens Registration in the Americas for Introduction to Vivado Design Suite SpeedWay Design Workshop Series

2015-10-14T15:39:42Z

Avnet, Inc. (NYSE: AVT), a leading global technology distributor, today announced that registration is now open in the Americas for a series of SpeedWay Design Workshops(tm) featuring Avnet’s newly released ARTY Xilinx(r) Artix(r)-7 35T FPGA Evaluation Kit.

X-ES Introduces the XCalibur5090 6U Digital Signal Processing Module with Dual Xilinx Virtex-7 FPGAs

2015-10-13T21:17:21Z

Extreme Engineering Solutions, Inc. (X-ES) announces the XCalibur5090, a dual Xilinx Virtex-7 based Digital Signal Processing (DSP) 6U LRM FPGA module featuring high-speed serial interfaces, DAC and ADC channels, external memory, and flexible, high-density I/O for customizable, high-bandwidth, signal-processing applications.