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	<title>Gadget Factory</title>
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		<title>ChipHack: Introduction to FPGA programming</title>
		<link>http://blog.gadgetfactory.net/2017/10/chiphack-introduction-to-fpga-programming/?utm_source=rss&amp;utm_medium=rss&amp;utm_campaign=chiphack-introduction-to-fpga-programming</link>
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		<dc:creator><![CDATA[Jack Gassett]]></dc:creator>
		<pubDate>Tue, 17 Oct 2017 15:46:00 +0000</pubDate>
				<category><![CDATA[FPGA News]]></category>
		<guid isPermaLink="false">http://blog.gadgetfactory.net/?p=8432</guid>

					<description><![CDATA[Here is an interesting FPGA course put together to help people learn the basics of writing Verilog. http://chiphack.org/ ChipHack aims to provide a gentle introduction to FPGA programming using the Verilog hardware description language (HDL) and is: a set of learning materials and workshop notes; and an event. No prior experience with HDLs and FPGA [&#8230;]]]></description>
										<content:encoded><![CDATA[<p>Here is an interesting FPGA course put together to help people learn the basics of writing Verilog.</p>
<p><a href="http://chiphack.org/">http://chiphack.org/</a></p>
<blockquote><p>ChipHack aims to provide a gentle introduction to FPGA programming using the Verilog hardware description language (HDL) and is:</p>
<ul>
<li>a set of learning materials and workshop notes; and</li>
<li>an event.</li>
</ul>
<p>No prior experience with HDLs and FPGA workflows is assumed, but some programming experience and an understanding of basic digital electronics is required.</p></blockquote>
<p>&nbsp;</p>
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		<post-id xmlns="com-wordpress:feed-additions:1">8432</post-id>	</item>
		<item>
		<title>RetroArch project running on FPGA.</title>
		<link>http://blog.gadgetfactory.net/2017/10/retroarch-project-running-on-fpga/?utm_source=rss&amp;utm_medium=rss&amp;utm_campaign=retroarch-project-running-on-fpga</link>
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		<dc:creator><![CDATA[Jack Gassett]]></dc:creator>
		<pubDate>Thu, 12 Oct 2017 14:12:00 +0000</pubDate>
				<category><![CDATA[FPGA News]]></category>
		<guid isPermaLink="false">http://blog.gadgetfactory.net/?p=8429</guid>

					<description><![CDATA[We ran across this post recently and thought we would share it in case anyone has any more information about this. Can it be ported to a Papilio board? RetroArch FPGA &#8211; cores are beginning to run! &#160; Consider this project still in an experimental phase &#8211; but cores are already beginning to run! What [&#8230;]]]></description>
										<content:encoded><![CDATA[<p>We ran across this post recently and thought we would share it in case anyone has any more information about this. Can it be ported to a Papilio board?</p>
<p>RetroArch FPGA &#8211; cores are beginning to run!</p>
<p><a href="https://i0.wp.com/www.gadgetfactory.net/wp-content/uploads/2017/10/DEeDxGWW0AAFx5N.jpg"><img data-recalc-dims="1" decoding="async" data-attachment-id="8430" data-permalink="http://blog.gadgetfactory.net/2017/10/retroarch-project-running-on-fpga/deedxgww0aafx5n/" data-orig-file="https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/10/DEeDxGWW0AAFx5N.jpg?fit=1280%2C853" data-orig-size="1280,853" data-comments-opened="1" data-image-meta="{&quot;aperture&quot;:&quot;0&quot;,&quot;credit&quot;:&quot;&quot;,&quot;camera&quot;:&quot;&quot;,&quot;caption&quot;:&quot;&quot;,&quot;created_timestamp&quot;:&quot;0&quot;,&quot;copyright&quot;:&quot;&quot;,&quot;focal_length&quot;:&quot;0&quot;,&quot;iso&quot;:&quot;0&quot;,&quot;shutter_speed&quot;:&quot;0&quot;,&quot;title&quot;:&quot;&quot;,&quot;orientation&quot;:&quot;0&quot;}" data-image-title="DEeDxGWW0AAFx5N" data-image-description="" data-image-caption="" data-large-file="https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/10/DEeDxGWW0AAFx5N.jpg?fit=1024%2C682" loading="lazy" class="alignnone size-large wp-image-8430" src="https://i0.wp.com/www.gadgetfactory.net/wp-content/uploads/2017/10/DEeDxGWW0AAFx5N-1024x682.jpg?resize=640%2C426" alt="DEeDxGWW0AAFx5N" width="640" height="426" srcset="https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/10/DEeDxGWW0AAFx5N.jpg?resize=1024%2C682 1024w, https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/10/DEeDxGWW0AAFx5N.jpg?resize=300%2C200 300w, https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/10/DEeDxGWW0AAFx5N.jpg?w=1280 1280w" sizes="auto, (max-width: 640px) 100vw, 640px" /></a></p>
<p>&nbsp;</p>
<blockquote><p>Consider this project still in an experimental phase &#8211; but cores are already beginning to run! What you see is a FPGA devboard with RetroArch that is outputting a random libretro core to the screen.</p>
<p>It&#8217;s still far too premature to speculate on what this project will amount to ultimately, and what our future plans are for it, but we felt we ought to share with you this latest breakthrough in development since it has taken quite a while to get there!</p></blockquote>
<p><a href="https://www.patreon.com/posts/12886887">Full post via Patreon</a></p>
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		<post-id xmlns="com-wordpress:feed-additions:1">8429</post-id>	</item>
		<item>
		<title>Flashback Project: SOCZ80 FPGA Retro Computer</title>
		<link>http://blog.gadgetfactory.net/2017/09/flashback-project-socz80-fpga-retro-computer/?utm_source=rss&amp;utm_medium=rss&amp;utm_campaign=flashback-project-socz80-fpga-retro-computer</link>
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		<dc:creator><![CDATA[Jack Gassett]]></dc:creator>
		<pubDate>Thu, 28 Sep 2017 15:57:00 +0000</pubDate>
				<category><![CDATA[Papilio]]></category>
		<category><![CDATA[User Submitted]]></category>
		<guid isPermaLink="false">http://blog.gadgetfactory.net/?p=8425</guid>

					<description><![CDATA[Here&#8217;s a really great Papilio project that we wanted to revisit: The SOCZ80 Retro Computer! Here is some more info: I built a small FPGA microcomputer for the Papilio Pro board. I&#8217;ve ported a few operating systems to run on it. These 8-bit machines have very minimal features but (somewhat unexpectedly) I found they can run a multi-user, multi-tasking [&#8230;]]]></description>
										<content:encoded><![CDATA[<p>Here&#8217;s a really great Papilio project that we wanted to revisit:</p>
<p><a href="https://i0.wp.com/www.gadgetfactory.net/wp-content/uploads/2017/09/socz80-vt510.jpg"><img data-recalc-dims="1" decoding="async" data-attachment-id="8426" data-permalink="http://blog.gadgetfactory.net/2017/09/flashback-project-socz80-fpga-retro-computer/socz80-vt510-2/" data-orig-file="https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/09/socz80-vt510.jpg?fit=3264%2C2448" data-orig-size="3264,2448" data-comments-opened="1" data-image-meta="{&quot;aperture&quot;:&quot;2.4&quot;,&quot;credit&quot;:&quot;&quot;,&quot;camera&quot;:&quot;Nexus 5&quot;,&quot;caption&quot;:&quot;&quot;,&quot;created_timestamp&quot;:&quot;1398894163&quot;,&quot;copyright&quot;:&quot;&quot;,&quot;focal_length&quot;:&quot;3.97&quot;,&quot;iso&quot;:&quot;549&quot;,&quot;shutter_speed&quot;:&quot;0.030303030303&quot;,&quot;title&quot;:&quot;&quot;,&quot;orientation&quot;:&quot;0&quot;}" data-image-title="socz80-vt510" data-image-description="" data-image-caption="" data-large-file="https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/09/socz80-vt510.jpg?fit=1024%2C768" loading="lazy" class="alignnone size-large wp-image-8426" src="https://i0.wp.com/www.gadgetfactory.net/wp-content/uploads/2017/09/socz80-vt510-1024x768.jpg?resize=640%2C480" alt="socz80-vt510" width="640" height="480" srcset="https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/09/socz80-vt510.jpg?resize=1024%2C768 1024w, https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/09/socz80-vt510.jpg?resize=300%2C225 300w, https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/09/socz80-vt510.jpg?w=2000 2000w, https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/09/socz80-vt510.jpg?w=3000 3000w" sizes="auto, (max-width: 640px) 100vw, 640px" /></a></p>
<p>The SOCZ80 Retro Computer! Here is some more info:</p>
<blockquote><p>I built a small <a href="http://en.wikipedia.org/wiki/FPGA">FPGA</a> microcomputer for the <a href="http://papilio.cc/index.php?n=Papilio.PapilioPro">Papilio Pro</a> board. I&#8217;ve ported a few operating systems to run on it. These 8-bit machines have very minimal features but (somewhat unexpectedly) I found they can run a multi-user, multi-tasking UNIX operating system.</p>
<p>The hardware specification is:</p>
<ul>
<li>Z80 compatible T80 CPU core at 128MHz</li>
<li>4KB paged MMU (64KB virtual, 64MB physical address space)</li>
<li>8MB SDRAM (at 128MHz), with 16KB direct-mapped cache</li>
<li>4KB ROM with monitor program</li>
<li>4KB SRAM</li>
<li>UART with deep receive FIFO</li>
<li>Optional second UART with FIFO and hardware flow control</li>
<li>1MHz Timer</li>
<li>SPI master connected to SPI flash ROM</li>
<li>SPI master connected to optional SD card socket</li>
<li>GPIO</li>
</ul>
<p>I&#8217;ve ported the following operating systems:</p>
<ul>
<li>CP/M-2.2</li>
<li>MP/M-II</li>
<li>UZI</li>
</ul>
</blockquote>
<p><a href="http://sowerbutts.com/socz80/socz80-vt510.jpg">Project Link</a></p>
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		<post-id xmlns="com-wordpress:feed-additions:1">8425</post-id>	</item>
		<item>
		<title>XC6BP – FPGA ‘Bus Pirate’</title>
		<link>http://blog.gadgetfactory.net/2017/09/xc6bp-fpga-bus-pirate/?utm_source=rss&amp;utm_medium=rss&amp;utm_campaign=xc6bp-fpga-bus-pirate</link>
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		<dc:creator><![CDATA[Jack Gassett]]></dc:creator>
		<pubDate>Tue, 26 Sep 2017 16:00:00 +0000</pubDate>
				<category><![CDATA[FPGA News]]></category>
		<guid isPermaLink="false">http://blog.gadgetfactory.net/?p=8420</guid>

					<description><![CDATA[Here is an interesting project that we somehow missed. It&#8217;s an FPGA based clone of the Dangerous Prototypes Bus Pirate. Looks cool, would love to get this running on the Papilio FPGA. A FPGA based design with a soft CPU and USB device interface implemented in Verilog. This design uses an OpenRISC compatible CPU (my [&#8230;]]]></description>
										<content:encoded><![CDATA[<p>Here is an interesting project that we somehow missed. It&#8217;s an FPGA based clone of the Dangerous Prototypes Bus Pirate. Looks cool, would love to get this running on the Papilio FPGA.<a href="http://www.gadgetfactory.net/wp-content/uploads/2017/09/Bus-Pirate-FPGA.png"><br />
</a></p>
<p><a href="https://i0.wp.com/www.gadgetfactory.net/wp-content/uploads/2017/09/Bus-Pirate-FPGA.png"><img data-recalc-dims="1" decoding="async" data-attachment-id="8421" data-permalink="http://blog.gadgetfactory.net/2017/09/xc6bp-fpga-bus-pirate/bus-pirate-fpga-2/" data-orig-file="https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/09/Bus-Pirate-FPGA.png?fit=300%2C192" data-orig-size="300,192" data-comments-opened="1" data-image-meta="{&quot;aperture&quot;:&quot;0&quot;,&quot;credit&quot;:&quot;&quot;,&quot;camera&quot;:&quot;&quot;,&quot;caption&quot;:&quot;&quot;,&quot;created_timestamp&quot;:&quot;0&quot;,&quot;copyright&quot;:&quot;&quot;,&quot;focal_length&quot;:&quot;0&quot;,&quot;iso&quot;:&quot;0&quot;,&quot;shutter_speed&quot;:&quot;0&quot;,&quot;title&quot;:&quot;&quot;,&quot;orientation&quot;:&quot;0&quot;}" data-image-title="Bus-Pirate-FPGA" data-image-description="" data-image-caption="" data-large-file="https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/09/Bus-Pirate-FPGA.png?fit=300%2C192" loading="lazy" class="alignnone size-full wp-image-8421" src="https://i0.wp.com/www.gadgetfactory.net/wp-content/uploads/2017/09/Bus-Pirate-FPGA.png?resize=300%2C192" alt="Bus-Pirate-FPGA" width="300" height="192" /></a></p>
<blockquote><p>A FPGA based design with a soft CPU and USB device interface implemented in Verilog.<br />
This design uses an OpenRISC compatible CPU (my AltOR32 implementation) running at 48MHz (a convenient speed for USB) and features cut-down USB 1.1 (Full Speed), SPI and GPIO interfaces.</p></blockquote>
<p>via <a href="http://ultra-embedded.com/xc6bp-fpga-based-bus-pirate/" target="_blank">Ultra-Embedded</a></p>
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		<post-id xmlns="com-wordpress:feed-additions:1">8420</post-id>	</item>
		<item>
		<title>FPGA in the cloud at Amazon AWS?</title>
		<link>http://blog.gadgetfactory.net/2017/09/fpga-in-the-cloud-at-amazon-aws/?utm_source=rss&amp;utm_medium=rss&amp;utm_campaign=fpga-in-the-cloud-at-amazon-aws</link>
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		<dc:creator><![CDATA[Jack Gassett]]></dc:creator>
		<pubDate>Thu, 21 Sep 2017 14:44:00 +0000</pubDate>
				<category><![CDATA[FPGA News]]></category>
		<guid isPermaLink="false">http://blog.gadgetfactory.net/?p=8416</guid>

					<description><![CDATA[In the last blog post we touched on the Amazon AWS FPGA resources that are available to build cloud services that are powered by FPGA&#8217;s. In doing further research we came across this nice blog post that goes into further detail about this FPGA offering by Amazon. It is unique in that you can write [&#8230;]]]></description>
										<content:encoded><![CDATA[<p>In the last blog post we touched on the Amazon AWS FPGA resources that are available to build cloud services that are powered by FPGA&#8217;s. In doing further research we came across this nice <a href="https://aws.amazon.com/blogs/aws/developer-preview-ec2-instances-f1-with-programmable-hardware/">blog post that goes into further detail about this FPGA offering by Amazon</a>.</p>
<p><a href="https://i0.wp.com/www.gadgetfactory.net/wp-content/uploads/2017/09/Amazon_AMI.png"><img data-recalc-dims="1" decoding="async" data-attachment-id="8417" data-permalink="http://blog.gadgetfactory.net/2017/09/fpga-in-the-cloud-at-amazon-aws/amazon_ami/" data-orig-file="https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/09/Amazon_AMI.png?fit=843%2C529" data-orig-size="843,529" data-comments-opened="1" data-image-meta="{&quot;aperture&quot;:&quot;0&quot;,&quot;credit&quot;:&quot;&quot;,&quot;camera&quot;:&quot;&quot;,&quot;caption&quot;:&quot;&quot;,&quot;created_timestamp&quot;:&quot;0&quot;,&quot;copyright&quot;:&quot;&quot;,&quot;focal_length&quot;:&quot;0&quot;,&quot;iso&quot;:&quot;0&quot;,&quot;shutter_speed&quot;:&quot;0&quot;,&quot;title&quot;:&quot;&quot;,&quot;orientation&quot;:&quot;0&quot;}" data-image-title="Amazon_AMI" data-image-description="" data-image-caption="" data-large-file="https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/09/Amazon_AMI.png?fit=843%2C529" loading="lazy" class="alignnone size-full wp-image-8417" src="https://i0.wp.com/www.gadgetfactory.net/wp-content/uploads/2017/09/Amazon_AMI.png?resize=843%2C529" alt="Amazon_AMI" width="843" height="529" srcset="https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/09/Amazon_AMI.png?w=843 843w, https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/09/Amazon_AMI.png?resize=300%2C188 300w" sizes="auto, (max-width: 843px) 100vw, 843px" /></a></p>
<p>It is unique in that you can write VHDL/Verilog code to accomplish a task that is well suited to an FPGA and then easily package them up for sale on the AWS marketplace:</p>
<blockquote><p> In addition to building applications and services for your own use, you will be able to package them up for sale and reuse in <a title="" href="https://aws.amazon.com/marketplace/">AWS Marketplace</a>.  Putting it all together, you will be able to avoid all of the capital-intensive and time-consuming steps that were once a prerequisite to the use of FPGA-powered applications, using a business model that is more akin to that used for every other type of software. We are giving you the ability to design your own logic, simulate and verify it using cloud-based tools, and then get it to market in a matter of days.</p></blockquote>
<p>They even take the drudgery out of installing and using the Xilinx development tools by packaging everything up into a pre-installed Amazon Machine Instance (think virtual machine):</p>
<blockquote><p>This AMI includes a set of developer tools that you can use in the AWS Cloud at no charge. You write your FPGA code using <a href="https://en.wikipedia.org/wiki/VHDL">VHDL</a> or <a href="https://en.wikipedia.org/wiki/Verilog">Verilog</a> and then compile, simulate, and verify it using tools from the <a href="https://www.xilinx.com/products/design-tools/vivado.html">Xilinx Vivado Design Suite</a> (you can also use third-party simulators, higher-level language compilers, graphical programming tools, and <a href="https://www.xilinx.com/products/intellectual-property.html">FPGA IP libraries</a>).</p></blockquote>
<p>We would love to see if we could do the same thing with Xilinx ISE to help new Papilio users get started out without the huge download and time sink of the 6GB install.</p>
<p>The FPGA that you use is not a physical device that you purchase and have on your desktop, instead it is a PCI card with a powerful FPGA chip embedded in an Amazon server that you expose to the cloud once it runs your custom code&#8230; Pretty cool.</p>
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		<post-id xmlns="com-wordpress:feed-additions:1">8416</post-id>	</item>
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		<title>Reconfigure.io brings cloud computing and Go language to FPGA development.</title>
		<link>http://blog.gadgetfactory.net/2017/09/reconfigure-io-brings-cloud-computing-and-go-language-to-fpga-development/?utm_source=rss&amp;utm_medium=rss&amp;utm_campaign=reconfigure-io-brings-cloud-computing-and-go-language-to-fpga-development</link>
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		<dc:creator><![CDATA[Jack Gassett]]></dc:creator>
		<pubDate>Tue, 19 Sep 2017 15:57:00 +0000</pubDate>
				<category><![CDATA[FPGA News]]></category>
		<guid isPermaLink="false">http://blog.gadgetfactory.net/?p=8409</guid>

					<description><![CDATA[A new startup over at Reconfigure.io is working on a cloud computing solution that uses the Go programming language to solve problems that need the flexibility and power of an FPGA. They are providing a high level compiler that lets you code for their FPGA solution using Go instead of VHDL or Verilog. It is also intended [&#8230;]]]></description>
										<content:encoded><![CDATA[<p><a href="https://i0.wp.com/www.gadgetfactory.net/wp-content/uploads/2017/09/Reconfigure.io_.png"><img data-recalc-dims="1" decoding="async" data-attachment-id="8410" data-permalink="http://blog.gadgetfactory.net/2017/09/reconfigure-io-brings-cloud-computing-and-go-language-to-fpga-development/reconfigure-io/" data-orig-file="https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/09/Reconfigure.io_.png?fit=1202%2C583" data-orig-size="1202,583" data-comments-opened="1" data-image-meta="{&quot;aperture&quot;:&quot;0&quot;,&quot;credit&quot;:&quot;&quot;,&quot;camera&quot;:&quot;&quot;,&quot;caption&quot;:&quot;&quot;,&quot;created_timestamp&quot;:&quot;0&quot;,&quot;copyright&quot;:&quot;&quot;,&quot;focal_length&quot;:&quot;0&quot;,&quot;iso&quot;:&quot;0&quot;,&quot;shutter_speed&quot;:&quot;0&quot;,&quot;title&quot;:&quot;&quot;,&quot;orientation&quot;:&quot;0&quot;}" data-image-title="Reconfigure.io" data-image-description="" data-image-caption="" data-large-file="https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/09/Reconfigure.io_.png?fit=1024%2C497" loading="lazy" class="alignleft size-large wp-image-8410" src="https://i0.wp.com/www.gadgetfactory.net/wp-content/uploads/2017/09/Reconfigure.io_-1024x497.png?resize=640%2C311" alt="Reconfigure.io" width="640" height="311" srcset="https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/09/Reconfigure.io_.png?resize=1024%2C497 1024w, https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/09/Reconfigure.io_.png?resize=300%2C146 300w, https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/09/Reconfigure.io_.png?w=1202 1202w" sizes="auto, (max-width: 640px) 100vw, 640px" /></a></p>
<p>A new startup over at <a href="https://reconfigure.io/" target="_blank">Reconfigure.io</a> is working on a cloud computing solution that uses the <a href="https://en.wikipedia.org/wiki/Go_(programming_language)" target="_blank">Go programming language</a> to solve problems that need the flexibility and power of an FPGA. They are providing a high level compiler that lets you code for their FPGA solution using Go instead of VHDL or Verilog. It is also intended to allow a more familiar toolchain/build process that is cloud based. Part of the difficulty with current FPGA development is dealing with the toolchain and learning VHDL or Verilog, they aim to solve both of these problems&#8230;</p>
<p>It&#8217;s not clear what hardware they are targeting with their Go toolchain but best guess is that they are using <a href="https://aws.amazon.com/ec2/instance-types/f1/" target="_blank">Amazon&#8217;s FPGA resources</a> rather then a physical board like the Papilio FPGA. Nonetheless this is an interesting FPGA company to keep watching and maybe even sign up for their alpha program&#8230;</p>
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		<post-id xmlns="com-wordpress:feed-additions:1">8409</post-id>	</item>
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		<title>Papilio Projects: Chord Keypad to control CAD software</title>
		<link>http://blog.gadgetfactory.net/2017/09/papilio-projects-chord-keypad-to-control-cad-software/?utm_source=rss&amp;utm_medium=rss&amp;utm_campaign=papilio-projects-chord-keypad-to-control-cad-software</link>
					<comments>http://blog.gadgetfactory.net/2017/09/papilio-projects-chord-keypad-to-control-cad-software/#respond</comments>
		
		<dc:creator><![CDATA[Jack Gassett]]></dc:creator>
		<pubDate>Sun, 17 Sep 2017 14:29:00 +0000</pubDate>
				<category><![CDATA[Papilio]]></category>
		<category><![CDATA[User Submitted]]></category>
		<guid isPermaLink="false">http://blog.gadgetfactory.net/?p=8412</guid>

					<description><![CDATA[Here is a project that we missed from a couple years ago. A chord keypad that is used to speed up PCB development by making common key strokes easily available. This is particularly useful for EAGLE PCB development where you are continuously typing in commands on the keyboard&#8230; &#160; Our friend Ken Boak put together [&#8230;]]]></description>
										<content:encoded><![CDATA[<p><a href="https://i0.wp.com/www.gadgetfactory.net/wp-content/uploads/2017/09/Chord-Keypad.png"><img data-recalc-dims="1" decoding="async" data-attachment-id="8413" data-permalink="http://blog.gadgetfactory.net/2017/09/papilio-projects-chord-keypad-to-control-cad-software/chord-keypad/" data-orig-file="https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/09/Chord-Keypad.png?fit=618%2C500" data-orig-size="618,500" data-comments-opened="1" data-image-meta="{&quot;aperture&quot;:&quot;0&quot;,&quot;credit&quot;:&quot;&quot;,&quot;camera&quot;:&quot;&quot;,&quot;caption&quot;:&quot;&quot;,&quot;created_timestamp&quot;:&quot;0&quot;,&quot;copyright&quot;:&quot;&quot;,&quot;focal_length&quot;:&quot;0&quot;,&quot;iso&quot;:&quot;0&quot;,&quot;shutter_speed&quot;:&quot;0&quot;,&quot;title&quot;:&quot;&quot;,&quot;orientation&quot;:&quot;0&quot;}" data-image-title="Chord Keypad" data-image-description="" data-image-caption="" data-large-file="https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/09/Chord-Keypad.png?fit=618%2C500" loading="lazy" class="alignnone size-full wp-image-8413" src="https://i0.wp.com/www.gadgetfactory.net/wp-content/uploads/2017/09/Chord-Keypad.png?resize=618%2C500" alt="Chord Keypad" width="618" height="500" srcset="https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/09/Chord-Keypad.png?w=618 618w, https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/09/Chord-Keypad.png?resize=300%2C243 300w" sizes="auto, (max-width: 618px) 100vw, 618px" /></a></p>
<p>Here is a project that we missed from a couple years ago. A chord keypad that is used to speed up PCB development by making common key strokes easily available. This is particularly useful for EAGLE PCB development where you are continuously typing in commands on the keyboard&#8230;</p>
<p>&nbsp;</p>
<p>Our friend Ken Boak put together this cool project and lists this as the capabilities:</p>
<blockquote><p>The five main keys are located under the fingertips and thumb of the right hand, plus an additional shift key that can be held down with the thumb.  This combination allows up to 64 key combinations  &#8211; which is enough for simple ascii, alphas and numerals.</p></blockquote>
<p>This is what he says about its use case:</p>
<blockquote><p>However, this time the application is not for text entry, but to allow very rapid access to menu items, tools and colour options for a CAD program &#8211; without having to break concentration and use the keyboard.</p></blockquote>
<p>We also had the same desire to simplify CAD input and made a custom tablet based solution, not as cool as Ken&#8217;s but its worth putting it up here too. <img src="https://s.w.org/images/core/emoji/17.0.2/72x72/1f642.png" alt="🙂" class="wp-smiley" style="height: 1em; max-height: 1em;" /></p>
<p><iframe src="https://www.youtube.com/embed/7YJaKR9OwMw" width="560" height="315" frameborder="0" allowfullscreen="allowfullscreen"></iframe><br />
<a href="http://sustburbia.blogspot.com/2015/05/interfacing-chord-keypad-to-fpga.html" target="_blank">via Sustainable Suburbia Blog</a></p>
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		<post-id xmlns="com-wordpress:feed-additions:1">8412</post-id>	</item>
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		<title>Tetris-like game for the Papilio and Arcade Megawing</title>
		<link>http://blog.gadgetfactory.net/2017/03/tetris-like-game-for-the-papilio-and-arcade-megawing/?utm_source=rss&amp;utm_medium=rss&amp;utm_campaign=tetris-like-game-for-the-papilio-and-arcade-megawing</link>
					<comments>http://blog.gadgetfactory.net/2017/03/tetris-like-game-for-the-papilio-and-arcade-megawing/#respond</comments>
		
		<dc:creator><![CDATA[dhia.khaladi]]></dc:creator>
		<pubDate>Mon, 13 Mar 2017 15:34:00 +0000</pubDate>
				<category><![CDATA[Papilio]]></category>
		<category><![CDATA[Papilio Arcade]]></category>
		<category><![CDATA[User Submitted]]></category>
		<category><![CDATA[Arcade Game]]></category>
		<category><![CDATA[FPGA Games]]></category>
		<category><![CDATA[Tetris]]></category>
		<guid isPermaLink="false">http://blog.gadgetfactory.net/?p=8403</guid>

					<description><![CDATA[Sometris is a Tetris-like game that Papilio user Peter Ivanov has written for the Papilio One and Arcade MegaWing, the game works with DesignLab 1.0.8. This is a tetris-like game for Papilio One 500K + Aracade Megawing. You need a VGA monitor and optionally a Atari/Commodore compatible joystick. I&#8217;ve used Papilio DesignLab 1.0.8. The source [&#8230;]]]></description>
										<content:encoded><![CDATA[<p><iframe src="https://www.youtube.com/embed/mgOM_ePGLvY" width="600" height="320" frameborder="0" allowfullscreen="allowfullscreen"></iframe></p>
<p>Sometris is a Tetris-like game that Papilio user <a href="http://forum.gadgetfactory.net/index.php?/profile/37143-peter-ivanov/" target="_blank">Peter Ivanov</a> has written for the <strong>Papilio One</strong> and <strong>Arcade MegaWing</strong>, the game works with DesignLab 1.0.8.</p>
<blockquote>
<p class="p1">This is a tetris-like game for Papilio One 500K + Aracade Megawing.</p>
<p class="p1">You need a VGA monitor and optionally a Atari/Commodore compatible joystick.</p>
<p class="p1">I&#8217;ve used Papilio DesignLab 1.0.8.</p>
</blockquote>
<p><a href="https://github.com/ivanovp/sometris" target="_blank">The source code is available on Github.</a></p>
<p>Please feel free to comment or reply to <a href="http://forum.gadgetfactory.net/index.php?/topic/1231-recommended-joystick/#comment-18611" target="_blank">the game forum thread</a>.</p>
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		<post-id xmlns="com-wordpress:feed-additions:1">8403</post-id>	</item>
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		<title>New Papilio FPGA tutorial – Create custom clocks of any speed inside an FPGA with the Xilinx clocking wizard.</title>
		<link>http://blog.gadgetfactory.net/2017/02/new-papilio-fpga-tutorial-create-custom-clocks-of-any-speed-inside-an-fpga-with-the-xilinx-clocking-wizard/?utm_source=rss&amp;utm_medium=rss&amp;utm_campaign=new-papilio-fpga-tutorial-create-custom-clocks-of-any-speed-inside-an-fpga-with-the-xilinx-clocking-wizard</link>
					<comments>http://blog.gadgetfactory.net/2017/02/new-papilio-fpga-tutorial-create-custom-clocks-of-any-speed-inside-an-fpga-with-the-xilinx-clocking-wizard/#respond</comments>
		
		<dc:creator><![CDATA[Jack Gassett]]></dc:creator>
		<pubDate>Thu, 23 Feb 2017 15:55:00 +0000</pubDate>
				<category><![CDATA[FPGA]]></category>
		<category><![CDATA[Gadget Factory]]></category>
		<category><![CDATA[Papilio]]></category>
		<category><![CDATA[VHDL]]></category>
		<guid isPermaLink="false">http://blog.gadgetfactory.net/?p=8393</guid>

					<description><![CDATA[This tutorial shows you how to generate custom clocks inside your FPGA using the simple Clocking Wizard. Easily create clocks at any speeds such as 100Mhz, 75Mhz, or 50Mhz from the 32Mhz oscillator connected to your Papilio FPGA. The Xilinx clocking wizard easily generates custom clock speeds with all of the Global Clock buffers and supporting circuitry [&#8230;]]]></description>
										<content:encoded><![CDATA[<p>This tutorial shows you how to generate custom clocks inside your FPGA using the simple Clocking Wizard. Easily create clocks at any speeds such as 100Mhz, 75Mhz, or 50Mhz from the 32Mhz oscillator connected to your Papilio FPGA. The Xilinx clocking wizard easily generates custom clock speeds with all of the Global Clock buffers and supporting circuitry automatically created for you. It is definitely the easiest way to generate custom clocks for your FPGA project.</p>
<p><a href="http://gadgetfactory.net/learn/2017/02/22/fpga-clocking-clocking-wizard-in-xilinx-ise/"><img data-recalc-dims="1" decoding="async" data-attachment-id="8394" data-permalink="http://blog.gadgetfactory.net/2017/02/new-papilio-fpga-tutorial-create-custom-clocks-of-any-speed-inside-an-fpga-with-the-xilinx-clocking-wizard/step-4-clocking-wizard/" data-orig-file="https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/02/Step-4-Clocking-Wizard.jpg?fit=1289%2C808" data-orig-size="1289,808" data-comments-opened="1" data-image-meta="{&quot;aperture&quot;:&quot;0&quot;,&quot;credit&quot;:&quot;&quot;,&quot;camera&quot;:&quot;&quot;,&quot;caption&quot;:&quot;&quot;,&quot;created_timestamp&quot;:&quot;0&quot;,&quot;copyright&quot;:&quot;&quot;,&quot;focal_length&quot;:&quot;0&quot;,&quot;iso&quot;:&quot;0&quot;,&quot;shutter_speed&quot;:&quot;0&quot;,&quot;title&quot;:&quot;&quot;,&quot;orientation&quot;:&quot;0&quot;}" data-image-title="Step 4 &amp;#8211; Clocking Wizard" data-image-description="" data-image-caption="" data-large-file="https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/02/Step-4-Clocking-Wizard.jpg?fit=1024%2C642" loading="lazy" class=" size-large wp-image-8394 aligncenter" src="https://i0.wp.com/www.gadgetfactory.net/wp-content/uploads/2017/02/Step-4-Clocking-Wizard-1024x642.jpg?resize=640%2C401" alt="Step 4 - Clocking Wizard" width="640" height="401" srcset="https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/02/Step-4-Clocking-Wizard.jpg?resize=1024%2C642 1024w, https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/02/Step-4-Clocking-Wizard.jpg?resize=300%2C188 300w, https://i0.wp.com/blog.gadgetfactory.net/wp-content/uploads/2017/02/Step-4-Clocking-Wizard.jpg?w=1289 1289w" sizes="auto, (max-width: 640px) 100vw, 640px" /></a></p>
<p>&nbsp;</p>
<p><a href="http://gadgetfactory.net/learn/2017/02/22/fpga-clocking-clocking-wizard-in-xilinx-ise/">Find this tutorial and more at GadgetFactory learn website.</a></p>
<p>&nbsp;</p>
<p>&nbsp;</p>
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		<post-id xmlns="com-wordpress:feed-additions:1">8393</post-id>	</item>
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		<title>DesignLab 1.0.8 and RetroCade 1.3 Released!</title>
		<link>http://blog.gadgetfactory.net/2017/01/designlab-1-0-8-and-retrocade-1-3-released/?utm_source=rss&amp;utm_medium=rss&amp;utm_campaign=designlab-1-0-8-and-retrocade-1-3-released</link>
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		<dc:creator><![CDATA[Jack Gassett]]></dc:creator>
		<pubDate>Thu, 05 Jan 2017 22:30:00 +0000</pubDate>
				<category><![CDATA[DesignLab IDE]]></category>
		<category><![CDATA[Gadget Factory]]></category>
		<category><![CDATA[RetroCade Synth]]></category>
		<guid isPermaLink="false">http://blog.gadgetfactory.net/?p=8385</guid>

					<description><![CDATA[We just completed a new release of DesignLab and RetroCade Synth. DesignLab 1.0.8 has the following changes: DesignLab 1.0.8 &#8211; 2017.01.04 [DesignLab Libraries] -Added a new Video Audio Player example. -Fixes for RetroCade Synth libraries. RetroCade Synth 1.3 has the following changes: 1/4/2017      Version 1.3.1 -Fix for some LCDs that have contrast issues. [&#8230;]]]></description>
										<content:encoded><![CDATA[<p>We just completed a new release of DesignLab and RetroCade Synth.</p>
<p><img data-recalc-dims="1" decoding="async" loading="lazy" class="alignnone" src="https://i0.wp.com/files.gadgetfactory.net/download/screenshots/df28c265755c6b1c01ff249c78cdce68-retrocade-synth.png?resize=960%2C720" alt="" width="960" height="720" /></p>
<p><img data-recalc-dims="1" decoding="async" loading="lazy" class="alignnone" src="https://i0.wp.com/files.gadgetfactory.net/download/screenshots/4d21acfc36eec967cc5943f0f087c91e-about.jpg?resize=520%2C300" alt="" width="520" height="300" /></p>
<p><a href="http://forum.gadgetfactory.net/index.php?/files/file/236-papilio-designlab-ide/">DesignLab 1.0.8</a> has the following changes:</p>
<p>DesignLab 1.0.8 &#8211; 2017.01.04<br />
[DesignLab Libraries]<br />
-Added a new Video Audio Player example.<br />
-Fixes for RetroCade Synth libraries.</p>
<p><a href="http://forum.gadgetfactory.net/index.php?/files/category/11-retrocade-synth/">RetroCade Synth 1.3</a> has the following changes:</p>
<p>1/4/2017      Version 1.3.1<br />
-Fix for some LCDs that have contrast issues.</p>
<p>4/21/2015      Version 1.3<br />
-Updated MIDI library to better handle NoteOffs.<br />
-Moved to ZPUino 2.0 with a DesignLab schematic.</p>
<p>1/29/2014      Version 1.2<br />
-Moved to Papilio Schematic Library and drew up a schematic of the RetroCade system.<br />
-Added Analog mode to the LCD.<br />
-Made joystick interaction for smallFS more intuitive. Cannot do the same for SD Card access without a lot of rework&#8230;</p>
<p>&nbsp;</p>
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