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    <title>MRAM-Info - MRAM Industry Portal</title>
    <link>https://www.mram-info.com/</link>
    <description>MRAM Industry Portal</description>
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<lastBuildDate>Mon, 01 Jun 2026 16:02:49 +0300</lastBuildDate>
<pubDate>Fri, 08 May 26 15:27:04 +0300</pubDate>
<item>
  <title>GlobalFoundries reported growing engagement in its automotive eMRAM and new design wins</title>
  <link>https://www.mram-info.com/globalfoundries-reported-growing-engagement-its-automotive-emram-and-new-design-wins</link>
  <description>&lt;p&gt;GlobalFoundries reported its Q1 2026 financial results, with $1.63 billion in revenues, and a net profit of $227 million. The company reported its design wins increased 50% over Q1 2025 - including automotive MRAM (and &lt;a href="https://www.microled-info.com"&gt;microLED&lt;/a&gt;) wins.&lt;/p&gt;&lt;div&gt;
  
  &lt;a href="https://www.mram-info.com/sites/default/files/2026-03/GlobalFoundries-Dresden-site.jpg" target="_blank"&gt;
    
    &lt;img loading="lazy" src="https://www.mram-info.com/sites/default/files/styles/large/public/2026-03/GlobalFoundries-Dresden-site.jpg?itok=i7_50m1I" width="400" height="240" alt="GlobalFoundries Dresden site photo" typeof="Image" class="image-style-large"&gt;




  &lt;/a&gt;
&lt;/div&gt;
&lt;p&gt;GF says that it is seeing strong momentum for auto-grade embedded MRAM capability on FDX, describing "industry-leading 100 MHz class access times" and endurance and reliability. The company reported that lead customers have taped out with the MRAM feature and cited growing engagement with tier-one suppliers including Bosch as it moves toward production.&lt;/p&gt;</description>
  <guid isPermaLink="false">8721 at https://www.mram-info.com/</guid>
          <pubDate>Fri, 08 May 2026 15:27:04 +0300
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>SEMIFIVE and ICY Tech succesfully tape out a next-gen Edge AI SoC utilizing Samsung's 8nm eMRAM</title>
  <link>https://www.mram-info.com/semifive-and-icy-tech-succesfully-tape-out-next-gen-edge-ai-soc-utilizing-samsungs-8nm-emram</link>
  <description>&lt;p&gt;Custom AI ASIC solutions provider SEMIFIVE, together with China-based AI semiconductor developer ICY Tech, announced the successful tape-out of its next-generation Edge AI SoC jointly developed utilizing &lt;a href="https://www.mram-info.com/samsung-electronics-finalized-development-worlds-first-8nm-mram-process-will-produce-5nm-mram-end"&gt;Samsung Foundry's 8nm (8LPU) embedded MRAM technology&lt;/a&gt;. The two companies say that this is a significant milestone toward the first commercial deployment of 8nm eMRAM technology in Asia.&lt;/p&gt;&lt;p&gt;SEMIFIVE that by integrating eMRAM into its Edge AI accelerator, it aims to reinforce its technical leadership in the ultra-low-power, high-performance inference market.&amp;nbsp;&lt;/p&gt;</description>
  <guid isPermaLink="false">8720 at https://www.mram-info.com/</guid>
          <pubDate>Fri, 08 May 2026 10:05:42 +0300
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Everspin enters into a $40 million subcontract agreement with Amentum to establish US MRAM processes and manufacturing capabilities for the defense industry</title>
  <link>https://www.mram-info.com/everspin-enters-40-million-subcontract-agreement-amentum-establish-us-mram-processes-and</link>
  <description>&lt;p&gt;&lt;a href="https://www.mram-info.com/mram_memory_makers/everspin"&gt;Everspin Technologies&lt;/a&gt; has entered into a $40 million 30-months defense subcontract agreement with Amentum Services Inc. to support the U.S. government’s Microelectronics Research, Development, Test, and Evaluation (RDT&amp;amp;E) program.&amp;nbsp;&lt;/p&gt;&lt;p&gt;&lt;img src="https://www.mram-info.com/sites/default/files/inline-images/Everspin-chip-image.jpg" data-entity-uuid="18ad1a71-fa77-447e-b77c-a3982b61eb72" data-entity-type="file" width="369" height="222" loading="lazy"&gt;&lt;/p&gt;&lt;p&gt;Everspin updates that the contract aims to establish proven processes and manufacturing capabilities for new Toggle MRAM. Under the agreement, Everspin will manage the program and develop on-shore Toggle MRAM production capability.&lt;/p&gt;</description>
  <guid isPermaLink="false">8719 at https://www.mram-info.com/</guid>
          <pubDate>Thu, 30 Apr 2026 06:43:01 +0300
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Everspin reports excellent financial results for Q1 2026, starts to see a recovery in customer demand</title>
  <link>https://www.mram-info.com/everspin-reports-excellent-financial-results-q1-2026-starts-see-recovery-customer-demand</link>
  <description>&lt;p&gt;&lt;a href="https://www.mram-info.com/mram_memory_makers/everspin"&gt;Everspin Technologies&lt;/a&gt; reported its financial results for Q1 2026, with revenues of $14.9 million (up from $13.1 in Q1 2025), and a non-GAAP net income of $2.6 million.&amp;nbsp;&lt;/p&gt;&lt;p&gt;&lt;img class="align-center" src="https://www.mram-info.com/files/mraminfo/Everspin-chip-photo-img_assist-401x236.jpg" alt="Everspin Technologies chip photo" width="401" height="236" border="0" title="Everspin Technologies chip photo" loading="lazy"&gt;&lt;/p&gt;&lt;p&gt;Everspin says that its excellent first quarter results (at the high-end of their guidance) were driven by strength in Industrial Automation, Transportation, and Data Center applications. The company says it is starting to see a recovery in customer demand especially in Japan as inventory levels have been worked down.&amp;nbsp;&lt;/p&gt;</description>
  <guid isPermaLink="false">8718 at https://www.mram-info.com/</guid>
          <pubDate>Thu, 30 Apr 2026 06:29:54 +0300
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Samsung Electronics finalized the development of the world's first 8nm MRAM process, will produce 5nm MRAM by end of 2027</title>
  <link>https://www.mram-info.com/samsung-electronics-finalized-development-worlds-first-8nm-mram-process-will-produce-5nm-mram-end</link>
  <description>&lt;p&gt;Samsung Electronics announced that it is the world's first company to successfully developed an 8 nm process for next-generation MRAM production, and has achieved yields suitable for mass production.&lt;/p&gt;&lt;div class="align-center"&gt;
  
  &lt;a href="https://www.mram-info.com/sites/default/files/2026-04/Samsung-8nm-vs-14nm-MRAM-performance.jpg" target="_blank"&gt;
    
    &lt;img loading="lazy" src="https://www.mram-info.com/sites/default/files/styles/large/public/2026-04/Samsung-8nm-vs-14nm-MRAM-performance.jpg?itok=EIYIC97Q" width="400" height="138" alt="Samsung 8 nm vs 14 nm MRAM performance chart" typeof="Image" class="image-style-large"&gt;




  &lt;/a&gt;
&lt;/div&gt;
&lt;p&gt;Samsung says that its new 8nm MRAM demonstrated a 62.5% faster write speed and an 11.5% higher density compared to its previous 14nm generation, while also meeting the highest automotive-grade reliability standards under extreme conditions.&amp;nbsp;&lt;/p&gt;</description>
  <guid isPermaLink="false">8717 at https://www.mram-info.com/</guid>
          <pubDate>Sat, 18 Apr 2026 16:11:01 +0300
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Verticle Compute raises $67 million to accelerate its MRAM-based AI technology R&amp;D</title>
  <link>https://www.mram-info.com/verticle-compute-raises-67-million-accelerate-its-mram-based-ai-technology-rd</link>
  <description>&lt;p&gt;&lt;a href="https://www.mram-info.com/vertical-compute"&gt;Vertical Compute&lt;/a&gt;, MRAM for AI technology developer, raised $67 million. This round was led by Quantonation and included many investors, including Flanders Future Techfund (PMV), Wallonie Entreprendre, Sambrinvest, Noshaq, invest.bw, Drysdale Ventures, Kima Ventures, Eurazeo, XAnge, VCT Vector Gestion SA, imec.xpand, imec, VLAIO - Flanders Innovation &amp;amp; Entrepreneurship, and Bpifrance.&lt;/p&gt;&lt;img data-entity-uuid="6b25b9a1-a02c-4b35-91cf-36bb096aa342" data-entity-type="file" src="https://www.mram-info.com/sites/default/files/inline-images/Verticle-compute-67-million-raise-banner.jpg" height="435" width="348" loading="lazy"&gt;&lt;p&gt;Verticle Compute was spun off imec, and develops technology to stack memory directly above compute logic. In 2025, the company said that it develops MRAM in-memory computing chiplet technology. The chiplet, according to the company, can reduce power consumption by 80% and speed up the execution of large language models for AI by 100X. It is believed that the company's MRAM is based on SOT-MRAM technology.&lt;/p&gt;</description>
  <guid isPermaLink="false">8716 at https://www.mram-info.com/</guid>
          <pubDate>Sun, 12 Apr 2026 11:05:38 +0300
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Everspin signs a strategic manufacturing agreement with Microchip Technology</title>
  <link>https://www.mram-info.com/everspin-signs-strategic-manufacturing-agreement-microchip-technology</link>
  <description>&lt;p&gt;&lt;a href="https://www.mram-info.com/mram_memory_makers/everspin"&gt;Everspin Technologies&lt;/a&gt; announced that it has signed a strategic manufacturing agreement with Microchip Technology to expand its MRAM production capacity and strengthen long-term supply.&lt;/p&gt;&lt;img src="https://www.mram-info.com/sites/default/files/inline-images/Microchip-Oregon-Fab.jpg" data-entity-uuid="d060d6d6-f2c8-4253-8fae-fd850a6481b1" data-entity-type="file" width="396" height="297" loading="lazy"&gt;&lt;p&gt;Everspin entered into a 10-year agreement (that can be extended in 2-year increments) to onshore US manufacturing capacity for MRAM and Tunnel Magnetoresistive (TMR) sensor products.&lt;/p&gt;</description>
  <guid isPermaLink="false">8715 at https://www.mram-info.com/</guid>
          <pubDate>Thu, 09 Apr 2026 08:48:06 +0300
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Recent MRAM Industry News, March 2026</title>
  <link>https://www.mram-info.com/recent-mram-industry-news-march-2026</link>
  <description>&lt;p&gt;The MRAM industry is growing, as adoption of MRAM memory solutions is on the rise, and new technologies are being developed to increase capacity and performance. Here are some recent and popular news that you may find of interest:&lt;/p&gt;&lt;ul&gt;&lt;li&gt;&lt;a href="https://www.mram-info.com/globalfoundries-now-offers-auto-grade-1-ready-emram-technology-its-fdx-platform"&gt;GlobalFoundries now offers &lt;strong&gt;Auto Grade 1 ready eMRAM&lt;/strong&gt; technology on its FDX platform&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a href="https://www.mram-info.com/everspin-introduces-new-mram-code-and-data-unified-memory-embedded-systems"&gt;Everspin introduces a new &lt;strong&gt;MRAM code and data unified memory&lt;/strong&gt; for embedded systems&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a href="https://www.mram-info.com/avalanche-develops-22-nn-process-node-it-aims-increase-its-mram-memory-density-16x"&gt;Avalanche develops a 22 nn process node, as it aims to increase its MRAM memory density by 16X&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a href="https://www.mram-info.com/avalanche-filed-lawsuit-against-everspin-saying-it-infringes-upon-4-its-mram-patents"&gt;&lt;strong&gt;Avalanche filed a lawsuit against Everspin&lt;/strong&gt;, saying it infringes upon 4 of its MRAM patents&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a href="https://www.mram-info.com/truth-memory-corporation-developed-worlds-first-8mb-sot-mram-chip-using-110-nm-process"&gt;Truth Memory Corporation developed the &lt;strong&gt;world's first 8Mb SOT-MRAM 110 nm chip&lt;/strong&gt;&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a href="https://www.mram-info.com/researchers-develop-most-advanced-mram-free-layer-date"&gt;Researchers develop the most advanced MRAM free layer to date&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a href="https://www.mram-info.com/researchers-intel-and-georgia-tech-design-7-nm-sot-mram-device"&gt;Researchers from Intel and Georgia Tech design a &lt;strong&gt;7 nm SOT-MRAM device&lt;/strong&gt;&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a href="https://www.mram-info.com/renesas-introduces-new-ra8m2-and-ra8d2-mcus-1mb-embedded-mram"&gt;Renesas introduces the new RA8M2 and RA8D2 MCUs with 1Mb embedded MRAM&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a href="https://www.mram-info.com/researchers-tsmc-itri-stanford-and-ymct-developed-64-kilobit-sot-mram-based-back-end-line"&gt;Researchers from TSMC, ITRI, Stanford and YMCT developed a 64-kilobit SOT-MRAM&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a href="https://www.mram-info.com/tsmc-develop-5-nm-mram-technology-europe-targeting-automotive-ai-applications"&gt;&lt;strong&gt;TSMC to develop 5 nm MRAM technology&lt;/strong&gt; in Europe, targeting automotive AI applications&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a href="https://www.mram-info.com/researchers-tohoku-university-demonstrate-worlds-lowest-write-power-sot-mram-device"&gt;Researchers demonstrate the &lt;strong&gt;world's lowest write power SOT-MRAM&lt;/strong&gt; device&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a href="https://www.mram-info.com/vertical-compute-spun-imec-develop-mram-based-solutions-ai-raises-20-million-euro"&gt;Vertical Compute raises 20 million Euro to develop &lt;strong&gt;MRAM-based solutions for AI&lt;/strong&gt;&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a href="https://www.mram-info.com/samsung-track-start-14-nm-emram-production-end-2024-8-nm-2026-and-5-nm-2027"&gt;&lt;strong&gt;Samsung&lt;/strong&gt; details its eMRAM roadmap with 5 nm expected by 2027&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a href="https://www.mram-info.com/mram-based-memory-architecture-could-accelerate-ai-factor-1000"&gt;MRAM-based memory architecture could &lt;strong&gt;accelerate AI by a factor of 1000&lt;/strong&gt;&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a href="https://www.mram-info.com/leading-charge-mram-interview-everspins-ceo"&gt;Leading the Charge in MRAM: An Interview with Everspin's CEO&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a href="https://www.mram-info.com/kioxia-and-hynix-co-develop-worlds-smallest-1selector-1mtj-cell-can-enable-64gb-mram-chips"&gt;Kioxia and Hynix co-develop the &lt;strong&gt;world's smallest&lt;/strong&gt; 1Selector-1MTJ cell&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a href="https://www.mram-info.com/ibms-next-gen-flashcore-modules-feature-everspins-1-gbg-stt-mram"&gt;&lt;strong&gt;IBM's next-gen FlashCore&lt;/strong&gt; modules to feature Everspin's 1 Gbg STT-MRAM&lt;/a&gt;&lt;/li&gt;&lt;/ul&gt;</description>
  <guid isPermaLink="false">8714 at https://www.mram-info.com/</guid>
          <pubDate>Mon, 16 Mar 2026 14:31:52 +0200
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>GlobalFoundries now offers Auto Grade 1 ready eMRAM technology on its FDX platform</title>
  <link>https://www.mram-info.com/globalfoundries-now-offers-auto-grade-1-ready-emram-technology-its-fdx-platform</link>
  <description>&lt;p&gt;GlobalFoundries announced the availability of Auto Grade 1 ready embedded MRAM (eMRAM) technology on the company’s ultra-low power FDX platform. GF says that this is a key enhancement to its portfolio of non-volatile memory technologies and AutoPro platform of automotive-ready solutions.&lt;/p&gt;&lt;div&gt;
  
  &lt;a href="https://www.mram-info.com/sites/default/files/2026-03/GlobalFoundries-Dresden-site.jpg" target="_blank"&gt;
    
    &lt;img loading="lazy" src="https://www.mram-info.com/sites/default/files/styles/large/public/2026-03/GlobalFoundries-Dresden-site.jpg?itok=i7_50m1I" width="400" height="240" alt="GlobalFoundries Dresden site photo" typeof="Image" class="image-style-large"&gt;




  &lt;/a&gt;
&lt;/div&gt;
&lt;p&gt;The new FDX+AutoPro150 eMRAM technology delivers essential advantages over competitive industry grade memories, including proven endurance up to 500k cycles, sub-10 nanosecond read speed, and superior scalability for larger memory density. The technology is designed to address known magnetic field effects and qualified for reliable operation in harsh environments up to 150°C, enabling high-performance, system-on-chip (SoC) solutions that meet the demands of critical automotive applications.&lt;/p&gt;</description>
  <guid isPermaLink="false">8713 at https://www.mram-info.com/</guid>
          <pubDate>Wed, 11 Mar 2026 16:13:22 +0200
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Everspin introduces a new MRAM code and data unified memory for embedded systems</title>
  <link>https://www.mram-info.com/everspin-introduces-new-mram-code-and-data-unified-memory-embedded-systems</link>
  <description>&lt;p&gt;&lt;a href="https://www.mram-info.com/mram_memory_makers/everspin"&gt;Everspin Technologies&lt;/a&gt; launched a new family of unified code and data memory devices, branded as UNISYST MRAM. The new technology and platform targets high-density, non-volatile architecture for edge AI, industrial and mission-critical designs&lt;/p&gt;&lt;div&gt;
  
  &lt;a href="https://www.mram-info.com/sites/default/files/2026-03/Everspin-mram-memory-chip-image.jpg" target="_blank"&gt;
    
    &lt;img loading="lazy" src="https://www.mram-info.com/sites/default/files/styles/large/public/2026-03/Everspin-mram-memory-chip-image.jpg?itok=GBEtefWH" width="400" height="213" alt="Everspin MRAM memory chip image" typeof="Image" class="image-style-large"&gt;




  &lt;/a&gt;
&lt;/div&gt;
&lt;p&gt;Everspin's president and CEO, Sanjeev Aggarwal, says that sSystem designers are running into the physical and performance limits of NOR flash, especially as process nodes move below 40 nanometers and workloads become more demanding. With UNISYST, Everspin is extending its MRAM roadmap to higher densities while giving customers a practical way to start with PERSYST today and migrate to a code-and-data MRAM architecture as soon as it is available.&lt;/p&gt;</description>
  <guid isPermaLink="false">8712 at https://www.mram-info.com/</guid>
          <pubDate>Tue, 10 Mar 2026 14:00:13 +0200
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Everspin expands its high-reliability xSPI STT-MRAM with a new 256Mb product, completes the qualification of its 64Mb product</title>
  <link>https://www.mram-info.com/everspin-expands-its-high-reliability-xspi-stt-mram-new-256mb-product-completes-qualification-its</link>
  <description>&lt;p&gt;&lt;a href="https://www.mram-info.com/mram_memory_makers/everspin"&gt;Everspin Technologies&lt;/a&gt; is expanding its high-reliability (HR) PERSYST xSPI STT-MRAM portfolio, adding a new 256Mb density product. The company also announced that it has completed full production qualification for its 64Mb MRAM product, which has now completed full production qualification for the AEC-Q100 Grade 1 specification.&amp;nbsp;&lt;/p&gt;&lt;p&gt;&lt;img class="align-center" src="https://www.mram-info.com/files/mraminfo/Everspin-chip-photo-img_assist-401x236.jpg" alt="Everspin Technologies chip photo" width="401" height="236" border="0" title="Everspin Technologies chip photo" loading="lazy"&gt;&lt;/p&gt;&lt;p&gt;Everspin's HR xSPI 64Mb STT-MRAM It is currently available for customer orders and supports high-volume production programs, with inventory available through Everspin’s authorized distributors worldwide.&lt;/p&gt;</description>
  <guid isPermaLink="false">8710 at https://www.mram-info.com/</guid>
          <pubDate>Thu, 05 Mar 2026 17:32:23 +0200
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Everspin announces its financial results for Q4 2025, with a 12% growth in revenues</title>
  <link>https://www.mram-info.com/everspin-announces-its-financial-results-q4-2025-12-growth-revenues</link>
  <description>&lt;p&gt;&lt;a href="https://www.mram-info.com/mram_memory_makers/everspin"&gt;Everspin Technologies&lt;/a&gt; announced its financial results for Q4 2025, with a 12% increase in revenues to $14.8 million, and a net income of $2.6 million. Everspin says that its strong Q4 performance reflects the growing demand for its MRAM solutions across various sectors, especially in data centers, energy managements, aerospace and industrial automation.&lt;/p&gt;&lt;img src="https://www.mram-info.com/sites/default/files/inline-images/Everspin-chip-image.jpg" data-entity-uuid="18ad1a71-fa77-447e-b77c-a3982b61eb72" data-entity-type="file" width="369" height="222" class="align-center" loading="lazy"&gt;&lt;p&gt;Everspin ended the quarter with cash and cash equivalents of $44.5 million, down $0.8 million from $45.3 million at the end of Q3 2025.&lt;/p&gt;</description>
  <guid isPermaLink="false">8709 at https://www.mram-info.com/</guid>
          <pubDate>Thu, 05 Mar 2026 07:26:42 +0200
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Avalanche develops a 22 nn process node, as it aims to increase its MRAM memory density by 16X</title>
  <link>https://www.mram-info.com/avalanche-develops-22-nn-process-node-it-aims-increase-its-mram-memory-density-16x</link>
  <description>&lt;p&gt;&lt;a href="https://www.mram-info.com/avalanche-technology"&gt;Avalanche Technology&lt;/a&gt; announced that has achieved the phase-one milestone of its magnetic cell scaling project, as it aims to be able to produce higher-density space-grade MRAM. This cell size reduction, in concert with additional planned geometry shrink, will enable the increase in memory density by 16X.&lt;/p&gt;&lt;p&gt;&lt;img src="https://www.mram-info.com/sites/default/files/inline-images/Avalanche-VNX-Plus-storage-MRAM.jpg" data-entity-uuid="cb0c4e69-905f-42b1-999c-df27fd1ae344" data-entity-type="file" width="442" height="251" loading="lazy"&gt;&lt;/p&gt;&lt;p&gt;Avalanche has successfully established high density MTJ array manufacturing in a high volume production environment at 22 nm process node, achieving an MTJ critical dimension (CD) of 40 nm with a pitch of 100nm and below. Avalanche says that through rigorous optimization of MTJ hard mask and etch processes, the dense array delivers low bit error rates, enabling a minimum cell size of 0.01 μm² and high yield, gigabit class monolithic chip production, with demonstrated scalability to 12 nm process nodes.&lt;/p&gt;</description>
  <guid isPermaLink="false">8708 at https://www.mram-info.com/</guid>
          <pubDate>Tue, 03 Mar 2026 13:37:22 +0200
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Aitech adopts Avalanche's space-grade MRAM for its unmanned rovers and deep space exploration platform</title>
  <link>https://www.mram-info.com/aitech-adopts-avalanches-space-grade-mram-its-unmanned-rovers-and-deep-space-exploration-platform</link>
  <description>&lt;p&gt;pMTJ STT-MRAM developer &lt;a href="https://www.mram-info.com/avalanche-technology"&gt;Avalanche Technology&lt;/a&gt; announced that Aitech has chosen the company's space-grade MRAM technology for its unmanned rovers and deep space autonomous exploration platforms.&lt;/p&gt;&lt;p&gt;&lt;a href="https://www.mram-info.com/sites/default/files/2022-11/Avalanche-MRAM-chips.jpg"&gt;&lt;img class="image-style-large" src="https://www.mram-info.com/sites/default/files/styles/large/public/2022-11/Avalanche-MRAM-chips.jpg?itok=2znQ8IFq" alt="Avalanche Technology MRAM chips render" width="400" height="159" loading="lazy" typeof="Image"&gt;&lt;/a&gt;&lt;/p&gt;&lt;p&gt;These platforms, designed for harsh environments where system failure is not an option, are designed to offer unparalleled radiation immunity, survivability, adaptability and the highest-reliability performance.&lt;/p&gt;</description>
  <guid isPermaLink="false">8707 at https://www.mram-info.com/</guid>
          <pubDate>Sat, 21 Feb 2026 20:01:22 +0200
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Avalanche introduces a new storage module for military and LEO applications</title>
  <link>https://www.mram-info.com/avalanche-introduces-new-storage-module-military-and-leo-applications</link>
  <description>&lt;p&gt;&lt;a href="https://www.mram-info.com/avalanche-technology"&gt;Avalanche Technology&lt;/a&gt; is introducing its next-generation VNX+ storage module, that is designed specifically for military and Low Earth Orbit (LEO) environments.&lt;/p&gt;&lt;img data-entity-uuid="cb0c4e69-905f-42b1-999c-df27fd1ae344" data-entity-type="file" src="https://www.mram-info.com/sites/default/files/inline-images/Avalanche-VNX-Plus-storage-MRAM.jpg" height="251" width="442" loading="lazy"&gt;&lt;p&gt;Avalanche says that its new solution delivers unparalleled radiation immunity, survivability in congested electromagnetic environments, and highest-reliability performance, based on the company's Space Grade MRAM.&lt;/p&gt;</description>
  <guid isPermaLink="false">8706 at https://www.mram-info.com/</guid>
          <pubDate>Tue, 10 Feb 2026 13:54:48 +0200
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Avalanche filed a lawsuit against Everspin, saying it infringes upon 4 of its MRAM patents</title>
  <link>https://www.mram-info.com/avalanche-filed-lawsuit-against-everspin-saying-it-infringes-upon-4-its-mram-patents</link>
  <description>&lt;p&gt;On January 28, &lt;a href="https://www.mram-info.com/avalanche-technology"&gt;Avalanche Technology&lt;/a&gt; filed a lawsuit in the United States District Court for the District of Delaware, against &lt;a href="https://www.mram-info.com/mram_memory_makers/everspin"&gt;Everspin Technologies&lt;/a&gt; saying that Everspin's STT-MRAM technology infringes upon Avalanche's patents.&lt;/p&gt;&lt;p&gt;&lt;img class="align-center" src="https://www.mram-info.com/files/mraminfo/Everspin-chip-photo-img_assist-401x236.jpg" alt="Everspin Technologies chip photo" width="401" height="236" border="0" title="Everspin Technologies chip photo" loading="lazy"&gt;&lt;/p&gt;&lt;p&gt;Avalanche says that there are 4 patents that Everspin infringes upon : U.S. Patents 9,318,179, 9,419,210, 11,678,586, and 10,490,737. &amp;nbsp;The Lawsuit requests customary remedies for patent infringement and the ITC Complaint requests that the U.S. ITC &amp;nbsp;Investigation commence an investigation.&lt;/p&gt;</description>
  <guid isPermaLink="false">8705 at https://www.mram-info.com/</guid>
          <pubDate>Fri, 06 Feb 2026 02:00:19 +0200
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Truth Memory Corporation developed the world's first 8Mb SOT-MRAM chip using a 110 nm process</title>
  <link>https://www.mram-info.com/truth-memory-corporation-developed-worlds-first-8mb-sot-mram-chip-using-110-nm-process</link>
  <description>&lt;p&gt;China-based MRAM developer &lt;a href="https://www.mram-info.com/truth-memory-corporation"&gt;Truth Memory Corporation&lt;/a&gt; announced that it has successfully demonstrated the world's first 8 Mb SOT-MRAM chip, using a 110 nm technology node.&lt;/p&gt;&lt;img src="https://www.mram-info.com/sites/default/files/inline-images/Truth-Memory-Corporation-logo.jpg" data-entity-uuid="9ae154ac-9690-446c-8da7-1ab682dd1830" data-entity-type="file" width="395" height="93" class="align-center" loading="lazy"&gt;&lt;p&gt;TMC developed a fully-integrated wafer-level SOT-MRAM manufacturing flow based on an autonomous 8-inch platform compatible with mainstream CMOS back-end processes. TMC says that through optimized magnetic stack engineering and low-damage etching with precise sidewall passivation, it has developed high-performance SOT-MTJ arrays with 150 nm.&lt;/p&gt;</description>
  <guid isPermaLink="false">8704 at https://www.mram-info.com/</guid>
          <pubDate>Sat, 31 Jan 2026 06:48:33 +0200
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Avalanche and NHanced Semiconductors to jointly build MRAM-powered rad-hard system FPGAs</title>
  <link>https://www.mram-info.com/avalanche-and-nhanced-semiconductors-jointly-build-mram-powered-rad-hard-system-fpgas</link>
  <description>&lt;p&gt;pMTJ STT-MRAM developer &lt;a href="https://www.mram-info.com/avalanche-technology"&gt;Avalanche Technology&lt;/a&gt; announced that it has joined forces with NHanced Semiconductors to build a new rad-hard system-in-package FPGA integration designed to enable satellite and defense missions with dependable standby capability and high-confidence operational performance.&lt;/p&gt;&lt;a href="https://www.mram-info.com/sites/default/files/2022-11/Avalanche-MRAM-chips.jpg"&gt;&lt;img class="image-style-large align-center" src="https://www.mram-info.com/sites/default/files/styles/large/public/2022-11/Avalanche-MRAM-chips.jpg?itok=2znQ8IFq" alt="Avalanche Technology MRAM chips render" width="400" height="159" loading="lazy" typeof="Image"&gt;&lt;/a&gt;&lt;p&gt;US-based NHanced Semiconductor, an advanced packaging foundry specializing in leading-edge BEoL semiconductor technologies, selected Avalanche MRAM as its partner, saying that Avalanche's memory architecture is radiation-immune, with error detection and correction built directly into the memory die. This allows radiation-induced errors to be handled seamlessly without system resets or data loss, reducing the complexity of integration and ensuring the boot memory operates reliably in harsh space environments.&lt;/p&gt;</description>
  <guid isPermaLink="false">8701 at https://www.mram-info.com/</guid>
          <pubDate>Tue, 27 Jan 2026 10:45:19 +0200
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Russia sues RusNano's ex managers over the $125 million loss on the 2011 Crocus investment</title>
  <link>https://www.mram-info.com/russia-sues-rusnanos-ex-managers-over-125-million-loss-2011-crocus-investment</link>
  <description>&lt;p&gt;Back in 2011, &lt;a href="https://www.mram-info.com/rusnano-125-million-mram-investment-crocus-confirmed"&gt;Russia's state-owned VC RusNano invested $125 million into MRAM developer Crocus&lt;/a&gt;, aiming to bring MRAM manufacturing into Russia. The project did not succeed, and the proposed fab never saw the light of day and Crocus did not stay in business.&lt;/p&gt;&lt;p&gt;According to a report in Russia, RusNano is now suing its former chief Anatoly Chubais, and other ex-managers, seeking $150 million in damages. It claims these losses were caused by "unreasonable and irresponsible decisions" made by the fund's managers.&lt;/p&gt;</description>
  <guid isPermaLink="false">8699 at https://www.mram-info.com/</guid>
          <pubDate>Wed, 17 Dec 2025 16:22:56 +0200
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Researchers develop the most advanced MRAM free layer to date</title>
  <link>https://www.mram-info.com/researchers-develop-most-advanced-mram-free-layer-date</link>
  <description>&lt;p&gt;Researchers from the Institute of Science Tokyo (formerly Tokyo Tech), in collaboration with Western Digital, developed a new MRAM free layer with a giant perpendicular magnetic anisotropy, with the potential scaling to CMOS 5 nm process. This is said to be the most advanced MRAM free layer to date.&lt;/p&gt;&lt;div class="align-center"&gt;
  
  &lt;a href="https://www.mram-info.com/sites/default/files/2025-12/IST-most-advanced-5nm-MRAM-free-layer-research_0.jpg" target="_blank"&gt;
    
    &lt;img loading="lazy" src="https://www.mram-info.com/sites/default/files/styles/large/public/2025-12/IST-most-advanced-5nm-MRAM-free-layer-research_0.jpg?itok=Q9iPN1DR" width="400" height="148" alt="Advanced 5nm MRAM free-layer (IST, WD)" typeof="Image" class="image-style-large"&gt;




  &lt;/a&gt;
&lt;/div&gt;
&lt;p&gt;The researchers explain that by using the Boron-rich Co&lt;sub&gt;19&lt;/sub&gt;Fe&lt;sub&gt;56&lt;/sub&gt;B&lt;sub&gt;25&lt;/sub&gt; layer in combination with the Boron-blocking Mo underlayer and the spinel MgAl&lt;sub&gt;2&lt;/sub&gt;O&lt;sub&gt;4&lt;/sub&gt; oxide layer, they have realized giant perpendicular magnetic anisotropy in CoFeB with Hk as high as 17.5–19.5 kOe (x 3 improvement) and Keff as high as 6.9 -9.4 × Merg cm−3 (x 2 improvement).&amp;nbsp;&lt;/p&gt;</description>
  <guid isPermaLink="false">8698 at https://www.mram-info.com/</guid>
          <pubDate>Fri, 12 Dec 2025 10:17:47 +0200
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Everspin expands its PERSYST MRAM series with high-reliability devices </title>
  <link>https://www.mram-info.com/everspin-expands-its-persyst-mram-series-high-reliability-devices</link>
  <description>&lt;p&gt;&lt;a href="https://www.mram-info.com/mram_memory_makers/everspin"&gt;Everspin Technologies&lt;/a&gt; announced its newest high-reliability additions to the PERSYST MRAM product line: the EM064LX HR and EM128LX HR devices. &amp;nbsp;These two new xSPI MRAM products are designed for extreme operating environments, with high endurance, temperature performance and data retention. Everspin is targeting aerospace, defense, automotive and high-end industrial applications for these new chips.&amp;nbsp;&lt;/p&gt;&lt;img data-entity-uuid="18ad1a71-fa77-447e-b77c-a3982b61eb72" data-entity-type="file" src="https://www.mram-info.com/sites/default/files/inline-images/Everspin-chip-image.jpg" height="222" width="369" loading="lazy"&gt;&lt;p&gt;Everspin's new MRAM chips have received an AEC-Q100 Grade 1 qualification for operation from -40°C to +125°C. Each device undergoes a 48-hour burn-in process and provides 10-year data retention at 125°C, ensuring predictable performance even under the most demanding conditions. With 64- and 128-megabit densities achieving 90 Mbytes/sec read and write bandwidth, sustained for over a decade, the EM064LX HR and EM128LX HR are built for systems that cannot risk data loss or degradation.&lt;/p&gt;</description>
  <guid isPermaLink="false">8697 at https://www.mram-info.com/</guid>
          <pubDate>Wed, 19 Nov 2025 08:53:26 +0200
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Everspin announces its financial results for Q3 2025</title>
  <link>https://www.mram-info.com/everspin-announces-its-financial-results-q3-2025</link>
  <description>&lt;p&gt;&lt;a href="https://www.mram-info.com/mram_memory_makers/everspin"&gt;Everspin Technologies&lt;/a&gt; announced its financial results for Q3 2025, with revenues of $14.1 million (up 16% from $12.1 million in Q3 2024), non-GAAP net income of $1.5 million, and a net income of $54,000 (down from $2.3 million last year). At the end of the quarter, Everspin had $45.3 million in cash and equivalents - up $0.3 million in the quarter.&amp;nbsp;&lt;/p&gt;&lt;p&gt;&lt;img class="align-center" src="https://www.mram-info.com/files/mraminfo/Everspin-chip-photo-img_assist-401x236.jpg" alt="Everspin Technologies chip photo" width="401" height="236" border="0" title="Everspin Technologies chip photo" loading="lazy"&gt;&lt;/p&gt;&lt;p&gt;Everspin says that the strong sales were driven by high demand from its Low Earth Orbital Satellite, Casino Gaming and Energy Management segments. Its data center business remains strong with continued demand for toggle MRAM products for redundant array of independent disks or RAID from a broad selection of data center customers, including Dell, Supermicro, and others.&lt;/p&gt;</description>
  <guid isPermaLink="false">8696 at https://www.mram-info.com/</guid>
          <pubDate>Thu, 06 Nov 2025 08:55:40 +0200
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Frontgrade expands its  MRAM product line, targeting aerospace, defense and industrial applications</title>
  <link>https://www.mram-info.com/frontgrade-expands-its-mram-product-line-targeting-aerospace-defense-and-industrial-applications</link>
  <description>&lt;p&gt;Frontgrade Technologies announced that it has expanded its MRAM product line, adding two new series, the Dual Quad Serial Peripheral Interface (Dual QSPI) series and the Parallel series. With these new MRAM chips, Frontgrade is targeting aerospace, defense, and industrial applications.&lt;/p&gt;&lt;div class="align-center"&gt;
  
  &lt;a href="https://www.mram-info.com/sites/default/files/2025-11/Frontgrade-UT8MRQ-MRAM-devices.jpg" target="_blank"&gt;
    
    &lt;img loading="lazy" src="https://www.mram-info.com/sites/default/files/styles/large/public/2025-11/Frontgrade-UT8MRQ-MRAM-devices.jpg?itok=OLgCpr70" width="400" height="240" alt="Frontgrade UT8MRQ MRAM devices, 2025-11" typeof="Image" class="image-style-large"&gt;




  &lt;/a&gt;
&lt;/div&gt;
&lt;p&gt;The Dual QSPI series, powered by STT-MRAM, offers a wide range of densities, 128Mb and 1/2/4/8Gb. These new devices bring flash-like non-volatility with SRAM-level speed and endurance. The Dual QSPI interface enables high-speed, synchronous communication and seamless integration into new or existing architectures. These memory chips are designed for boot, configuration, code execution, and data logging.&lt;/p&gt;</description>
  <guid isPermaLink="false">8695 at https://www.mram-info.com/</guid>
          <pubDate>Wed, 05 Nov 2025 09:09:54 +0200
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Researchers from Intel and Georgia Tech design a 7 nm SOT-MRAM device</title>
  <link>https://www.mram-info.com/researchers-intel-and-georgia-tech-design-7-nm-sot-mram-device</link>
  <description>&lt;p&gt;Researchers from Intel, in collaboration with researchers at Georgia Institute of Technology designed a new SOT-MRAM device at 7 nm. This work spans the entire project range, from device-level characteristics to system-level power performance area.&amp;nbsp;&lt;/p&gt;&lt;div class="align-center"&gt;
  
  &lt;a href="https://www.mram-info.com/sites/default/files/2025-11/Goergia-Tech-Intel-7-nm-SOT-MRAM.jpg" target="_blank"&gt;
    
    &lt;img loading="lazy" src="https://www.mram-info.com/sites/default/files/styles/large/public/2025-11/Goergia-Tech-Intel-7-nm-SOT-MRAM.jpg?itok=TS_cB5hn" width="400" height="179" alt="Intel and Georgia Tech 7 nm SOT MRAM design" typeof="Image" class="image-style-large"&gt;




  &lt;/a&gt;
&lt;/div&gt;
&lt;p&gt;Based on ASAP7 PDK design rules, the researchers created the bit-cell and peripheral layouts for SOT-MRAM and designed the entire array. Based on place and route, the system-level PPA was calculated for various memory capacities, demonstrating bit-densities up to 14.8 Mb/mm&lt;sup&gt;2&lt;/sup&gt; and read bandwidths up to 2.98 GB/s.&amp;nbsp;&lt;/p&gt;</description>
  <guid isPermaLink="false">8694 at https://www.mram-info.com/</guid>
          <pubDate>Mon, 03 Nov 2025 16:55:53 +0200
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Renesas introduces the new RA8M2 and RA8D2 MCUs with 1Mb embedded MRAM</title>
  <link>https://www.mram-info.com/renesas-introduces-new-ra8m2-and-ra8d2-mcus-1mb-embedded-mram</link>
  <description>&lt;p&gt;Renesas Electronics Corporation introduced two new MCUs, the RA8M2 and RA8D2, both based on 1 Ghz Arm Cortex-M85 processors. Renesas says that these new MCUs deliver an unmatched 7300 Coremarks of raw compute performance, the industry benchmark for MCUs. The optional Cortex-M33 processor enables efficient system partitioning and task segregation.&lt;/p&gt;&lt;div class="align-center"&gt;
  
  &lt;a href="https://www.mram-info.com/sites/default/files/2025-10/Renesas-RA8D2-RA8M2-MRAM-MCUs.jpg" target="_blank"&gt;
    
    &lt;img loading="lazy" src="https://www.mram-info.com/sites/default/files/styles/large/public/2025-10/Renesas-RA8D2-RA8M2-MRAM-MCUs.jpg?itok=qRSmPlkp" width="400" height="225" alt="Renesas RA8M2 and RA8D2 MCUs with 1Mb embedded MRAM " typeof="Image" class="image-style-large"&gt;




  &lt;/a&gt;
&lt;/div&gt;
&lt;p&gt;Both the RA8D2 and RA8M2 offer embedded 1MB high-speed MRAM and 2MB SRAM. SIP options with 4 or 8 MB of external flash in a single package are also available for more demanding applications.&amp;nbsp;&lt;/p&gt;</description>
  <guid isPermaLink="false">8693 at https://www.mram-info.com/</guid>
          <pubDate>Sun, 26 Oct 2025 15:29:06 +0200
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Researchers use TmIG to enhance the efficiency of SOT-MRAM</title>
  <link>https://www.mram-info.com/researchers-use-tmig-enhance-efficiency-sot-mram</link>
  <description>&lt;p&gt;Researchers at Japan's Kyushu University have developed a new &lt;a href="https://www.mram-info.com/sot-mram"&gt;SOT-MRAM&lt;/a&gt; memory cell based on thulium iron garnet (TmIG). The researchers say that this material can enhance the efficiency of the memory cell.&lt;/p&gt;&lt;div&gt;
  
  &lt;a href="https://www.mram-info.com/sites/default/files/2025-10/Kyushu-TmIG-MRAM-sceheme.jpg" target="_blank"&gt;
    
    &lt;img loading="lazy" src="https://www.mram-info.com/sites/default/files/styles/large/public/2025-10/Kyushu-TmIG-MRAM-sceheme.jpg?itok=OoVZZvV7" width="400" height="303" alt="TmIG based SOT-MRAM scheme (Kyushu University)" typeof="Image" class="image-style-large"&gt;




  &lt;/a&gt;
&lt;/div&gt;
&lt;p&gt;The researchers say that TmIG, originally developed in Japan in 2012, is promising, but it requires a very high quality thin film deposition to be used in a memory device. The team has managed to now produce the material in this high quality, using an established mass production method called on-axis sputtering.&lt;/p&gt;</description>
  <guid isPermaLink="false">8692 at https://www.mram-info.com/</guid>
          <pubDate>Sun, 12 Oct 2025 06:35:23 +0300
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Everspin to integrate its MRAM memory into the Quintauris RISC-V ecosystem</title>
  <link>https://www.mram-info.com/everspin-integrate-its-mram-memory-quintauris-risc-v-ecosystem</link>
  <description>&lt;p&gt;&lt;a href="https://www.mram-info.com/mram_memory_makers/everspin"&gt;Everspin Technologies&lt;/a&gt; announced a strategic collaboration with RISC V-based products developer Quintauris, to bring advanced memory solutions into the Quintauris ecosystem.&lt;/p&gt;&lt;p&gt;&lt;img class="align-center" src="https://www.mram-info.com/files/mraminfo/Everspin-chip-photo-img_assist-401x236.jpg" alt="Everspin Technologies chip photo" width="401" height="236" border="0" title="Everspin Technologies chip photo" loading="lazy"&gt;&lt;/p&gt;&lt;p&gt;The two companies will integrate Everspin's MRAM into Quintauris’ reference architectures and real-time platform, with an aim to target automotive, industrial and edge applications where data persistence, integrity, low latency and security are critical.&lt;/p&gt;</description>
  <guid isPermaLink="false">8691 at https://www.mram-info.com/</guid>
          <pubDate>Thu, 02 Oct 2025 07:18:46 +0300
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>The Renesas RA8T2 motor control MCU has up to 1MB of high-speed MRAM</title>
  <link>https://www.mram-info.com/renesas-ra8t2-motor-control-mcu-has-1mb-high-speed-mram</link>
  <description>&lt;p&gt;Renesas Electronics launched a new high-end motor control MCU, the RA8T2. It is based on a 1 GHz Arm Cortex-M85 processor with an optional 250 MHz Arm Cortex-M33 processor, to deliver a high performance level to address real-time control of high-end motors in industrial equipment, robots, and other systems.&lt;/p&gt;&lt;div class="align-center"&gt;
  
  &lt;a href="https://www.mram-info.com/sites/default/files/2025-09/Renesas-RA8T2-CU-photo.jpg" target="_blank"&gt;
    
    &lt;img loading="lazy" src="https://www.mram-info.com/sites/default/files/styles/large/public/2025-09/Renesas-RA8T2-CU-photo.jpg?itok=veJarXrh" width="400" height="225" alt="The Renesas RA8T2 MCU " typeof="Image" class="image-style-large"&gt;




  &lt;/a&gt;
&lt;/div&gt;
&lt;p&gt;The RA8T2 has an integrated 1MB high-speed MRAM, in addition to 2MB SRAM (including 256KB TCM for the Cortex-M85 and 128KB TCM for the M33). The RA8T2 Group MCUs are available now, along with the FSP software.&lt;/p&gt;</description>
  <guid isPermaLink="false">8690 at https://www.mram-info.com/</guid>
          <pubDate>Sat, 27 Sep 2025 19:17:11 +0300
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Researchers from TSMC, ITRI, Stanford and YMCT developed a 64-kilobit SOT-MRAM based on back-end-of-line-compatible β-tungsten</title>
  <link>https://www.mram-info.com/researchers-tsmc-itri-stanford-and-ymct-developed-64-kilobit-sot-mram-based-back-end-line</link>
  <description>&lt;p&gt;Researchers from TSMC, Sandford University, ITRI and National Yang Ming Chiao Tung University have fabricate a 64-kb SOT-MRAM based β-phase Tungsten that offers a spin–orbit torque switching of 1 ns, data retention of more than 10 years and a tunnelling magnetoresistance of 146%.&lt;/p&gt;&lt;p&gt;The researchers say that Tungsten is a promising heavy metal for such applications and can generate large spin–orbit torques when stabilized in its β-phase. However, the α-phase, which has a lower spin-Hall angle, is more thermodynamically stable. It is thus challenging to integrate metastable β-tungsten into complementary metal–oxide–semiconductor processes while maintaining phase stability under the back-end-of-line thermal constraints (400 °C for extended durations).&amp;nbsp;&lt;/p&gt;</description>
  <guid isPermaLink="false">8689 at https://www.mram-info.com/</guid>
          <pubDate>Wed, 03 Sep 2025 16:40:04 +0300
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
<item>
  <title>Everspin announces good financial results for Q2 2025</title>
  <link>https://www.mram-info.com/everspin-announces-good-financial-results-q2-2025</link>
  <description>&lt;p&gt;&lt;a href="https://www.mram-info.com/mram_memory_makers/everspin"&gt;Everspin Technologies&lt;/a&gt; announced its financial results for Q2 2025. Total revenues were $13.2 million, up from $10.6 million in Q2 2024, while the company's net loss was $0.7 million, down from a $2.5 million loss a year ago.&lt;/p&gt;&lt;p&gt;&lt;img src="https://www.mram-info.com/sites/default/files/mram/Everspin-1Gb-STT-MRAM-chip-img_assist-400x214.jpg" alt="Everspin 1Gb STT-MRAM chip photo" width="400" height="214" border="0" title="Everspin 1Gb STT-MRAM chip photo" loading="lazy"&gt;&lt;/p&gt;&lt;p&gt;EVerspin says that its results came at the high end of expectations, driven by strong demand across its entire MRAM product portfolio. The company generated $2.9 million in cash during the quarter, and now was $45 million in cash and equivalents.&lt;/p&gt;</description>
  <guid isPermaLink="false">8688 at https://www.mram-info.com/</guid>
          <pubDate>Thu, 07 Aug 2025 06:35:32 +0300
</pubDate>
          <source url="https://www.mram-info.com/rss.xml">MRAM-Info - MRAM Industry Portal</source>
          <dc:creator>Ron Mertens</dc:creator>
          </item>
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