MRAM-Info

Osaka University is researching MRAM

mram — Tue, 16 Mar 2010 06:11:53 +0000

Osaka's university has a Spintronics research group that is working towards MRAM and STT-RAM using several materials including Graphene. Here's a nice intro video about the group:

MRAM-info upgraded

mram — Sun, 14 Mar 2010 12:24:57 +0000

MRAM-Info was upgraded today (if anyone is interested, we upgraded to Drupal 6.x from 5.8). Most of the changes are infrastructure related so you won't notice much, but hopefully the site should be faster now, more stable and more secure.

If you do find any bugs, glitches or you have any comments, please let us know!

Renesas flash memory roadmap includes MRAM

mram — Sat, 13 Mar 2010 05:45:33 +0000

Renesas has released a presentation about their flash memory products, which also includes one slide about their flash memory roadmap. The roadmap includes Floating Gate HND (Hyper New DINOR), MONOS (metal Oxide Nitride Oxide Silicon) and also MRAM.

They plan to have 100 to 150Mhz MRAM at 90nm at around 2010, and 200Mhz MRAM at 65nm at around 2012. They say MRAM is the next-generation RAM, a breakthrough beyond the limit of flash memory.

Fujitsu and University of Toronto develop high-reliability read-method for STT-RAM

mram — Wed, 10 Feb 2010 05:35:37 +0000

Fujitsu Laboratories and the University of Toronto announced that they have jointly developed the world's first high-reliability read-method for use with spin-torque-transfer (STT) MRAM that is insusceptible to erroneous writes.

STT-MRAM circuit embedded in a CMOS chip

The newly developed read-method uses a negative resistance that is intermediate between the MTJ's high resistance and low resistance on a parallel circuit. If the MTJ is in a high-resistance state, this circuit exhibits negative-resistance characteristics. If the MTJ is in a low-resistance state, then it exhibits normal-resistance characteristics. These characteristics allow the resistance value to be read at lower voltages than before, suppressing the tendency of the read operation to reverse the direction of magnetization and avoiding the problem of erroneous write operations.

Fujitsu Laboratories and the University of Toronto plan to continue with R&D related to STT MRAM to strive toward practical implementation, such as lowering write currents and developing process technologies for further miniaturization.

Macronix extends their phase-change memory alliance with IBM

mram — Fri, 29 Jan 2010 08:39:17 +0000

Digitimes reports that Macronix has signed an agreement with IBM to continue to co-develop phase-change memory (PCM) technology. The company said it is optimistic about the outlook for PCM, which is likely to be a successor to all memory products used in computers and consumer electronics devices.

NVE updates on Anti-Tamper MRAM research

mram — Fri, 22 Jan 2010 10:12:03 +0000

NVE says that they have completed several custom anti-temper MRAM integrated circuit designs. NVE designs conventional semiconductor ICs which they fabricate at outside foundries. Then they add the Spintronic structures, in this case spin-dependent tunnel junction memory cells, in their own factory.

NVE now reveals that they have received a number of the foundry wafers they have designed and they are in the process of adding MRAM to the wafers. The prototypes look promising so far although a fair amount of development remains before production.

Japanese researchers create a new TMR element that will enable 10 Gbit STT-MRAM

mram — Mon, 18 Jan 2010 18:18:26 +0000

Researchers from Japan's AIST institute have developed a new Tunnel-Magnetoresistance (or TMR) element with a low data writing current and high data stability. This kind of TMR is required for high-capacity MRAM. In fact the team says that this TMR can be used to make perpendicular STT-MRAM with densities of over 10GBit.

With existing TMRs, there's a trade-off between data writing current and data stability. Data loss happens if the free-layer's magnetization is reversed because of thermal agitation, and if you make a thicker free-layer it solves the data-loss issues, but you need more current. The new design solved this issue by using a free layer that is made from a nonmagnetic layer between two ferromagnetic layers. The resistance to thermal agitation is improved - it is five times better, while the current is only increased by 80%.

The team used an in-plane magnetization film for the free layer, which can be used to make a 1-Gbit MRAM. They plan to make the current even lower with a perpendicular magnetization film, which will allow for a 10 Gbit MRAM device.

Via TechOn

Everspin introduces 1Mb 1.8V data interface MRAM for RAID storage applications

mram — Tue, 12 Jan 2010 11:20:23 +0000

Everspin has a new prodcut - a dual-supply MRAM designed to directly interface with next-generation logic products requiring low voltage I/Os. RAID systems using advanced logic controllers operating with 1.8 volt I/Os will be able to seamlessly interface with this MRAM.

The MR0D08B dual supply MRAM product operates from a VDD main supply voltage of 3.0 to 3.6V and allows a wide, user defined I/O operating range by setting the VDDQ I/O supply voltage level from 1.65 to 3.6V. Typical applications using 1.8V logic controllers would set VDDQ at 1.8V to support direct connections between the controller and the MRAM, eliminating any requirements for level shifters. The devices are housed in a small footprint 8mm x 8mm, 48-BGA package with 0.75mm ball centers.

The MRAM-Info blog is now available for the Amazon Kindle

mram — Mon, 28 Dec 2009 08:31:18 +0000

If you have an Amazon Kindle e-reader, then you'd be happy to know that you can now read MRAM-Info directly on your Kindle. The service costs $0.99 a month.

Amazon's Kindle is a wireless e-book reader that has a free 3G connection in the US. It's got a 6" E Ink display, 2Gb of memory, and it's available now for 259$. The Kindle DX is bigger (with a 9.7" display) and costs 489$.

France launches a 4.2M euro spintronics project

mram — Tue, 22 Dec 2009 02:18:07 +0000

France has launched a large Spintronics project, with a 4.2M euro investment. It's called SPIN, and involved 11 partners. One of the project goals is magnetic FPGAs. Here's how they describe it:

The objective will be to design a magnetic FPGA which will incorporate finely distributed Magnetic Tunnel Junctions (MTJs) for non volatile storage and configuration purposes above of a CMOS core circuit. In complement of existing high density FPGAs, it will provide better versatility with intrinsic reconfigurability, instant on/off and energy saving. Such FPGAs can be used as general purpose standalone products. In the SPIN project, the FPGA will be targeted to provide intelligent processing of the magnetometers and sensors developed in objectives 2 and 3.

More information can be found here.