Analog Electronics

Biasing techniques of JFET

2021-01-27T03:27:00.014-08:00

In the last post, we saw the different operating region of JFET, in this post, we are going to learn different biasing techniques of JFET. I hope you read the earlier post. So let's start with this post

but before starting this post I hope that everyone has studied BJT at least once if not then don't worry but before reading this post please visit my post on what is biasing and the need for biasing transistors? because for biasing you need to understand the concept of load-line and q-point and I had explained this concept in-depth in that post so please do visit that post if you are a beginner or not learned BJT but starting with JFET. Now in JFET biasing is required because of some reasons and that reasons I will be discussing in my next post because there are some parameters and some biasing techniques which we will be required to understand why biasing of JFET are required?
In this particular post, you will be learning three different biasing techniques and at the end, I had inserted one video which explains the working of JFET as an amplifier, and at the same time, it will show you that how the output of JFET is 180 degree out of phase with respect to the input.
So in total, there are 3 biasing techniques of JFET and they are as follows
1) Fixed biasing technique
2) Self-biasing technique and
3) Voltage-divider biasing
You will get to know the working of each biasing technique in great depth but before that please subscribe to my site by clicking on that bell icon. So let's start with the working of each biasing technique of JFET.

1) Fixed biasing technique of JFET:-

As we saw in the previous post that the gate voltage is kept negative so in this technique we are keeping the gate voltage at the fixed point. As we had seen in the previous post that the input impedance of the JFET is very high(theoretically input impedance is infinite and practically in MΩ) therefore the current through resistor R1 will be zero I=0mA thus we can say that the voltage drop across the resistor R1 is 0v that is VR1=0v.

2) Self-biasing technique of JFET:-

When we add or basically when we connect the source resistance to a fixed bias circuit then the circuit is known as the self-biasing circuit. Now you will be thinking that why this circuit is known as a self-bias circuit to understand it just look at the figure given below. When we apply KVL to the gate loop we get equation (1) as shown in the figure.

As you can see above we got one equation,
Vgs = -Id*Rs

So now let's say if Id increases suddenly due to increasing external temperature then from the above equation you can see that the Vgs decreases quickly or in other words Vgs becomes more negative. Since Vgs decreases on its own with an increase in output current Id, therefore, this technique is known as a self-biasing technique.

3) Voltage-Divider Biasing technique of JFET:-

Voltage divider biasing is also known as potential-divider biasing. In this technique, an additional resistor is connected between the supply voltage and gate resistor. The additional gate resistor Rl from gate to supply voltage facilitates the larger adjustment of the dc bias point. Also, remember one thing that while designing the amplifier with this circuit the source voltage must be greater than the voltage across R2 so that the Vg will always be negative. Thus by using this technique, we are able to change the Vgs according to our will, and thus by using this single circuit we can actually use it for different applications such as a switch or as an amplifier.

# CONCLUSION:-

So as you saw above in voltage divider bias that the R1 was providing larger adjustment of the dc bias point also R2 was acting like a self-bias circuit due to this reasons Voltage divider bias is preferred more than any biasing technique.

Now,

In all the above images you are seeing that the output of JFET is an amplified form of input but it is 180 degrees out of phase with respect to the input signal.

Why the output of JFET is 180 degree out of phase w.r.t to input?

For better understanding please do watch the video given below.

VIDEO:-

Operating regions of JFET

2021-01-17T00:09:00.010-08:00

In the last post, we studied the difference between JFET and BJT there I had explained why we prefer JFET over BJT. I hope you understood all the concepts of JFET which we had studied up till now.

In this particular post, we are going to see the region of operation of JFET.

So similar to BJT, JFET can be operated in 3 different regions although there are 4 regions but we neglect the 4th region i.e. breakdown region and I hope you know why we neglect it. If you don't know the reason then watch the video given below, the video is of BJT but still, you will get a clear idea that why we neglect it.

Video:-

Since we had studied drain-source characteristics in great depth so based on that we concluded that JFET operates in 3 different regions

1) Cutoff region

2) Active/Saturation region

3) Ohmic region

Now we will discuss all the 3 regions in great depth.

1) Cutoff region (Vgs < Vp):-

As you can see in the above figure that when Vgs was made more negative the depletion region keep on increasing and the count of electrons which was moving from source to drain also decreases and Id almost becomes zero, also Vds was minimum or almost equals to zero. So the output is negligible and therefore we can say that JFET is operating in the cutoff region. Thus in this particular region, JFET behaves as an open switch. So in short we can maintain the cutoff region of JFET by making Vgs<Vp.

2) Saturation region (Vds > Vgs - Vp):-

You can clearly see above that when Vgs is set to a certain value and drain to source voltage is greater, then electrons can easily move from source to drain as depletion region is less. Due to which maximum current flows from drain to source. In this region, the drain current Id entirely depends on the Vgs and not a function of Vds thus JFET is operated as a closed switch and as an amplifier in this region.

3) Ohmic region (Vds>0 and Vds<Vp):-

In this region, the JFET behaves as a variable resistor. Since this region behaves as a variable resistor thus the ohmic region of JFET is used in many voltage regulation applications. If JFET operating as voltage control variable resistance it biased in the ohmic region. The control voltage is VGS and it finds resistance by changing the Q-point. For JFET biasing in the ohmic region, the dc load line should intersect the JFET characteristic curve in the ohmic region as shown in the below figure.

CONCLUSION:-

In the end, I would like to conclude the whole working of the JFET with the help of one video. At the end of this video, I had inserted the working of JFET with the help of one small animation and I hope it will help you to boost up your imagination skills.

VIDEO:-

JFET Vs BJT key differences with full analysis

2020-12-31T01:54:00.018-08:00

In the last post, we studied about characteristics and configurations of JFET in great depth. Now in this post, we are going to analyze the key differences between BJT and JFET.

But before that, I would explain to you some remaining concepts of JFET which we will be requiring for the comparison of BJT and JFET.

Although you will get all the key differences below but I'm also embedding the entire video which will help you to understand the concept in depth.

While studying the characteristics of JFET we had seen that the output current Id was varying proportionally with both input(Vgs) and output(Vds) voltages i.e. Id α Vgs, and Id α Vds.

So the formula to calculate Id for any given bias point in the saturation or active region as follows:-

Id = Idss * [ 1 - (Vgs/Vp) ]^2

where

Id:- Drain current which determines the Q-point

Idss:- Drain to source saturation current when Vgs=0v

Vgs:- Gate-Source voltage which determines the Q-point

Vp:- Pinch off voltage

# Now, On many websites or in some books you will see that JFET is termed as a square-law device but they don't provide the proper information that why it is termed so?

@ Here is the reason for it, we studied the above equation and after analyzing it properly we saw that Id was proportional to Vgs square i.e. Id α (Vgs)^2. Now, Id was on Y-axis and Vgs was on X-axis so you can assume this equation as parabola or y=x^2 (Please don't get confused I had just given a random example of parabola so that you can understand the concept thoroughly). Since in the transfer characteristics, we got a curve, therefore, we can say that JFET is a non-linear square law device.

# BJT vs JFET key differences with full analysis:-

1) Why Jfet is known as a unipolar device and BJT as a bipolar device?

@ Before going into detail about JFET I would like to revise the basic term of the BJT, as we had studied in BJT that BJT is known as a bipolar device because there both holes and electrons were taking part in conduction. For example, consider an NPN transistor, we are working with CE configuration and we know that emitter(output) current is the sum of base current and collector current, and as I had mentioned earlier in my posts that base current is nothing but current due to minority carriers(here holes) while collector and emitter current is nothing but current due to majority carriers(here electrons). Since the output current was the combination of 2 different carriers or charges that's why we termed BJT as bipolar transistors.

@ On the other hand while working with JFET, the output current Id is only due to the flow of a single carrier no other charges or carriers take part in conduction, therefore, Jfet is known as a unipolar device. For example, in an N-channel JFET, the output current(Id) occurs due to the flow of electrons from source to drain you won't see any holes taking part in conduction. Similarly for P-channel JFET, the output current was occurring due to the flow of holes. Since in JFET, only a single carrier was taking part in the conduction therefore JFET is known as a unipolar device. For your better understanding, I had inserted one video which will make your concept more strong.

VIDEO:-

2) Why Jfet is known as a voltage-controlled current source and Bjt as a current controlled-current source?

@ To understand this concept you should know the input characteristics of BJT and transfer characteristics of JFET. In input characteristics of BJT, we saw that the output current(Ic) was dependent on the input current(Ib). We also saw one equation (Ic = β*Ib) which gave us a clear idea that how they were related. Since for BJT, the input current was controlling the output current therefore BJT is known as a current-controlled current source.

@ Similarly for JFET, as we saw above that the output current(Id) was proportional to Vgs square i.e. Id α (Vgs)^2. Since for JFET, the input voltage is controlling the output current, therefore, JFET is considered as a voltage-controlled current source. For your better understanding, I had inserted one video which will make your concept more strong.

VIDEO:-

3) Why the input impedance of JFET is greater than BJT?

@ In BJT while studying CE configuration, I explained to you that the base-emitter junction is in forward bias state that means you can relate it with a p-n junction diode which is in a forward-biased condition and I hope that you know the working of the p-n junction diode. So if the input voltage of BJT is greater than 0.7 then only it will allow current to flow through it and the common-emitter junction of BJT will work as a short circuit.

@ Now, for JFET as I had explained in the earlier post that the gate-source junction is in the reverse-biased state that means you can relate it with the p-n junction diode which is in reverse-biased condition. So you know very well that even if we increase the source voltage further the current will not flow because the depletion region keeps on increasing and the gate-source junction of JFET will work as an open circuit.

Now as you can see in the above diagram that the input current is zero. We know that by ohms law,

V = I * R;

since, I(input) = 0;

Therefore, R = ∞

Thus we can say that the input impedance of Jfet is infinite, but practically it is finite and maximum because the current is not exactly zero it is around in few nano amperes, and this is because of the minority carriers for your better understanding I had inserted the video below. This video shows how the reverse-biased p-n junction diode conducts current through it but it will also help to clear this concept as well.

For your better understanding, I had inserted one video which will make your concept more strong.

VIDEO:-

4) Why the power loss in BJT is high as compared to JFET?

@ As we saw above that the input impedance of BJT is less than that of JFET. So by ohms law, if resistance(R) is less than current(I) would be high and we know that power(P) is a product of voltage(V) and current, therefore power loss would be more.

Mathematically,

Resistance = R(min)

Current = V/R(min)

therefore, I = I(max)

P = V * I(max) = P(max)

therefore, Power loss at the input = P(max)

@ Similarly for JFET we saw that the input impedance was very high almost tending to infinity. So if resistance(R) is greater than current(I) would be less and we know that power(P) is a product of voltage(V) and current, therefore power loss would be less (ideally zero).

NOTE:- Resistance here is maximum not minimum

Mathematically,

Resistance = R(max)

Current = V/R(max)

therefore, I = I(min)

P = V * I(min) = P(min)

therefore, Power loss at the input = P(min)

Ideally, R = ∞

Therefore, I = 0

Thus, Power loss = 0

For your better understanding, I had inserted one video which will make your concept more strong.

VIDEO:-

5) Why the switching speed of JFET is greater than that of BJT?

@ Basically BJT is a current-controlled current device and Jfet is a voltage-controlled current device and it takes little time for current to pass from one point to another and voltage is like an influencer parameter that can control the output current quickly and easily. Since the power loss of BJT is greater than that of Jfet therefore BJT dissipates more heat than JFET. For your better understanding please do watch the video given below. For your better understanding, I had inserted one video which will make your concept more strong.

VIDEO:-

⏪ Previous Post

Configurations and Characteristics of Jfet

2020-12-11T04:08:00.027-08:00

In the last post of Jfet, we learned some basic concepts of Jfet. In this post, we will be learning the configurations and characteristics of Jfet.

So as we saw in the BJT transistor that there were 3 configurations of BJT i.e. CB(Common Base), CE(Common Emitter), CC(Common Collector). But out of these 3, we preferred CE configuration and I hope you know the reason.

Similar to BJT there are 3 configurations in Jfet as well and that are CG(Common Gate), Cs(Common Source), and CD(Common Drain). We will look at each and every configuration in a detailed way.

Jfet Configurations:-

1) Common Gate:-

In this configuration, the gate terminal of Jfet is kept common, or in other words, it is grounded.

As you saw above in this configuration we got a signal in an amplified form. But still, we avoid using this configuration for normal use this is because it's internal input impedance(Zi) is very less. If you want to know what is the effect of the internal input impedance of any amplifier on signal then please do watch the video given below. Since it's internal input impedance is very less that's why we are not using it as an amplifier.

Video:-

2) Common Drain:-

In this configuration, the drain terminal of Jfet is kept common, or in other words, it is grounded.

As you saw in the above figure that whatever the input signal we are giving to the input of Jfet the same signal is reflected at the output of the Jfet.So, in short, we can say that it is a buffer amplifier. Since it fails to amplify the input signal that's why we avoid using this configuration.

3) Common Source:-

In this configuration, the source terminal of Jfet is kept common, or in other words, it is grounded.

As you saw in the above figure that whatever signal we are providing to it, it is producing it's inverted but amplified form. So we can say that the output signal is 180 degrees out of phase to that of input in short it acts likes an invertor. Also, it's internal input impedance is high and output impedance is low. So due to these reasons, we are taking the Common Source configuration into practice.

Now, we will see the characteristics of Jfet. As you all know that in Bjt we had learned about the input and output characteristics of BJT and then we had tried to understand the working of BJT. Similarly, by looking at the characteristics of Jfet we will try to analyze the working of JFET.

Characteristics of JFET:-

1) Transfer Characteristics of JFET:-

As we are studying this experiment, then we should first understand why we need to perform these experiments, and what is the significance of the transfer characteristics? I hope those who are reading this post are well acquainted with BJT, while understanding BJT we had done one experiment of input characteristics of BJT. In which we understood that the output current was dependent on input current i.e. Ib was directly proportional to Ic.

Circuit Diagram:-

Similarly to check the relation between input and output parameters of JFET we are performing this experiment. So, similar to the input characteristics of BJT we are going to keep the output voltage constant i.e. Vds (Voltage between drain and source), and at the same time we will vary the input voltage i.e. Vgs(Gate to source voltage), at the end we will make some conclusions based on the graph.

Note:- You can't vary Vgs positively if Vgs is positive then Jfet won't work properly since you are making both p-n junction diodes which are present in Jfet to operate in forward bias. So you have to vary Jfet negatively i.e. Vgs should vary from 0v to -6v or even less than -6v, it totally depends on which jfet you are using for the desired applications.

Now,

Based on the above steps we got the graph as shown below.

As you are seeing in the graph that if we are decreasing Vgs then the output current (Id) also decreases. In other words, let's say if the current Id=10mA when Vgs=0v. Now if we vary Vgs from 0v to -1v then the output current decreases i.e. when Vgs=-1v then Id=8mA. Similarly, if we keep on decreasing the voltage of Vgs then the output current Id also decreases, and at a certain value of Vgs= -Vgs(max) the current Id becomes zero(Id=0v). So in short we can say that the input voltage of JFET (Vgs) is directly proportional to the output current (Id).

Vgs α Id

NOTE:- As I had explained in one of the posts i.e. rπ model of BJT that transfer word exists whenever we are working on one input and one output parameter for example here in this experiment we are plotting the graph of Vgs(input parameter) vs Id(output parameter). So as you can see your input voltage is controlling the output current therefore this characteristic is named as transfer characteristic of JFET.

2) Output or Drain Characteristics of JFET:-

Now as we are learning the output or drain characteristics of JFET, you can also compare it with the output characteristics of BJT. In output characteristics of BJT, we saw that when Vce increases then Ic also increases. Similarly, to check whether we get some relation between the output voltage(Vds) and output current(Id) of JFET, we are performing this experiment.

Following steps are required while performing these experiments.

1) Set Vgs=Vgs(1) , Vgs(2) ,Vgs(3) ....Vgs=Vp

2) Set Vds=0v

Now let Vgs(1)=0v , Vgs(2)=-1v , Vgs(3)=-2v

Circuit Diagram:-

So as you can see in the above figure you have to move the knob of the variable resistor and set Vgs. Similarly, by moving Vdd you have to adjust Vds.

The procedure for carrying this experiment is that you have to set Vgs=Vgs(1) first then note 10 different values of Vds and Id by changing Vdd. Again change the value of Vgs=Vgs(2) and then note the 10 different values of Vds and Id. Repeat the procedure a few times and then plot Vds vs Id graph. The graph would be as shown below.

O :- OHMIC REGION

S :- SATURATION REGION

B :- BREAKDOWN REGION

So from this graph, we can understand that as Vds increases Id also increases linearly after a certain point even if we increase Vds further the output current Id remains constant If we keep on increasing Vds then jfet will enter into the breakdown region and it will not work properly.

The region up to which the Id increases linearly with Vds is known as the ohmic region while the region after which Id remains constant even after increasing Vds is known as the saturation region. I'm not explaining the concept of Dc load line and q-point in this post as I had explained these concepts in a detailed way in the post on biasing and the need for biasing transistors.

So in short by learning both the characteristics we can say that the output current Id is dependent on Vgs and Vds as well. Thus we can say that Id α Vgs, and Id α Vds

Now you would be confused that in output characteristics of BJT the saturation region was giving some different result (switch which was working in 'on' condition) but here we are calling the linear region of jfet as saturation while some authors also name it as an active region. So please don't get confused, BJT and JFET both are different concepts.

So I hope you understood this post

Automated Hearing Aids Project

2020-11-16T05:14:00.022-08:00

As a part of our ICCD project, we had designed automated hearing aids. I hope that many of you had designed an amplifier and you all have a basic idea that hearing aids are nothing but an amplifier. If you are looking to make a project of an amplifier which is very easy to make and you would easily make it with the help of a few transistors or op-amp or any other ic's. But what if we make automated hearing aids by using hardware without using any software part. So this project is fully hardware-based. Below there is a block diagram of this project I will explain to you each and every block step by step.

Block Diagram:-

Circuit Diagram:-

Components Required:-

1) Mic (Electret Condenser mic)

2) 2 BJT transistors (bc547)

3) Op-Amp (Ic 741)

4) Controller or timer circuit (Ic NE555)

5) Capacitors and Resistors (Values are provided in the circuit diagram)

6) Two 5v cells

Working:-

1) Mic:-

As we all know the mic is a transducer because it converts sound energy into electrical energy. The mic that we are using is an electret condenser microphone. It is not that much sensitive, it's sensitivity is around 6mv/Pa to 18mv/Pa. So we had designed an amplifier by considering the output of the mic as 10mv. As you can see that the output of the mic is going to the pre-amplifier and buffer amplifier. So we will go with pre-amplifier, comparator, timer circuit(NE555) and then we will see buffer amplifier and at the end amplifier.

2) Pre-Amplifier:-

It is just a normal ce amplifier(transistor bc547) that will amplify a few mv of signal to volts. I had designed it in such a way that if the output of the mic is greater than or equal to 10mv(pk-pk) then the output voltage of the pre-amplifier would be around 3v(pk-pk). If you want to see how I designed it then visit this post designing of ce amplifier. Now you would be thinking that why we want this pre-amplifier stage?. Your this doubt would be cleared in the next stage that is Comparator.

3) Comparator:-

For those who are new to the comparator, I had explained the concept of the comparator in the video given below. So for now just remember that comparator just compares the 2 inputs i.e. voltage coming from pre-amplifier and variable resistor. Now, the variable resistor is used to get proper sensitivity.

NOTE :- Here +Vcc = 5v & -Vcc = -5v

If the voltage of the pre-amplifier(Vp) is greater than the voltage of variable resistor(Vr) i.e. [Vp > Vr] then the output of the comparator would be -Vcc in our case it is -5v.

Similarly, if the voltage of the pre-amplifier(Vp) is less than the voltage of variable resistor(Vr) i.e. [Vp< Vr] then the output of the comparator would be +Vcc in our case it is +5v.

Since for comparing we need both the inputs in volts so that's why we are using pre-amplifier so that it will convert millivolts of the signal into volts.

4) Timer Circuit or Controller:-

The output of the comparator is given to pin number 2 of NE555 ic. Ic555 is the heart of this project. We are using NE555 for this project because our output is dependent on time and we are using it in a monostable state. So I will just explain in short what is NE555 controller.I hope everyone knows about not gate which produces an inverted output to that of input. If we give logic'0' at the input of not gate we get logic'1' at the output. The NE555 Ic works very much similar to not gate but here we have that privilege to set the time for which the output would be high.

When NE555 gets -5v at its pin number 2 then at the output i.e. at pin number 3 of NE555 we get +5v for 1sec which means I had selected the values of resistor and capacitors such that we will get +5v at pin number 3 for 1 sec even if the input signal is of few microvolts. The formula for calculating the time period is t = 1.1*R*C.

Before going to the next block just remember that if the interval between two negative waves is less than at the output we will get a steady-state positive pulse i.e. pure dc as shown below.

5) Amplifier:-

Right now just to save time we had kept the values of the amplifier same as that of the pre-amplifier. But as we know the task of the amplifier is to amplify the input signal. We had used Bjt transistor to make this amplifier which is amplifying 10mv of the signal you can use fets and Op-Amps as well. Ic555 is the heart of this project then this amplifier is the brain of the project. The output of Ic555 acts as a supply voltage for this amplifier i.e. (Vcc=+5v). If the output of Ic555 is logic'1' then only the amplifier will amplify the input signal else it won't.

6) Buffer Amplifier:-

To avoid maximum loss of the input signal we are using a buffer amplifier. Let's say the output of mic is 10mv so ideally at the input of amplifier we should get 10mv but practically we won't get that 10mv might be we will get 7mv which means we are loosing 3mv of the signal. But when we connect buffer amplifier we might get 8.5mv of a signal at the input of the amplifier although we are losing 1.5mv signal from that 10mv of signal but if you compared above where you were not using buffer amplifier there you were losing 3mv. So the buffer amplifier provides power to that particular part.

Pcb Designing:-

Click on the link given below to get the Gerber File of this project

GERBER FILE

VIDEO:-

Please do watch the video because I had explained the simulation of this project in this video. I hope you will understand it.

Part 1:-

Part 2:-

The project is done and edited by

Swarit Mahalsekar:- 18105A0005

Sanika Thakur:- 18105A0013

For any query or any further improvement regarding this project, you can CONTACT US.

or you can also comment below.

JFET :-Junction Field Effect Transistor

2020-10-15T07:22:00.012-07:00

We had finished learning all the concepts of Bjt from basics and in the end, we had designed an amplifier using BJT. From this post, we will start learning about new transistors i.e. JFET.

We will see the following things in this post:-

-Jfet full form.

-Types of jfet.

-Working of jfet.

-Why jfet is called unipolar and bjt as bipolar device?

So the full form of JFET:-Junction Field Effect Transistor. Right now I'm not explaining to you that what is field-effect transistor but by the end of this post you will come to know what exactly it is?

Different types of JFET:-

Similar to Bjt JFET is also divided into two types i.e. N-channel Jfet and P-channel JFET.

In N-channel current will flow because of electrons and in P-channel the current will flow because of holes. But we will go with N-channel Jfet, as discussed in bjt that electrons are lighter in weight and basically current never flows because of holes it only flows because of electrons. Since in P-channel, there is fewer electron so when an electron moves it creates void space or a hole at that area, therefore, it is assumed that in PNP transistor and P-channel Jfet transistor the current flows because of holes. You can say that if there are fewer electrons in the P-channel then-current produced would be a little less as compared to N-channel Jfet. Therefore in practice or in practicals, we use N-channel Jfet.

Construction of JFET:-

As we had seen in the above figure that there are 2 types of JFET now we will see it's construction

So in N-channel Jfet, the P-type material is doped in N-type material. As you can see above in N-channel JFET both the P-channels are connected together to form a gate terminal. Two terminals that are coming out from N-channel are known as the drain terminal and source terminal. The upper terminal is known as the drain while the lower one is known as the source terminal.

Similarly, in the P-channel Jfet N-type material is doped in P-type material rest all the things are the same for the P-type region.

Before starting with the working of Jfet we will see the significance of its 3 terminals.

Jfet has three terminals Gate, Drain, and Source.

Gate:-The function of the gate is the same as that of the base terminal in the BJT transistor i.e. by varying the gate voltage we can control the working of the Jfet. As we saw in Bjt that by varying

the base current we performed 2 operations i.e. Switching on and off and as an amplifier.

Drain:-The drain terminal of jfet is the same as that of the collector terminal in bjt. Since the electrons draining from the source terminal to drain therefore it is known as the drain terminal.

Source:- It is the same as the emitter terminal of BJT. Current flows from drain to source.

Working of Jfet:-

When you provide a positive voltage to the drain and a negative voltage to the source it is seen that a current flows from drain to source or in other words electron moves from source to drain.

Now, if we provide negative voltage to the gate and positive voltage to the drain and the source is kept common then we get some interesting results.

Let's say if we provide 2v to the drain i.e.(Vds = 2v) and zero or no voltage to the gate terminal i.e. (Vgs = 0v) then the electrons will move very quickly from source to drain.

In this case, the electrons move from the source to the drain due to which the current ID is generated from the drain to the source terminal. Although we are assuming that the gate voltage is zero (Vgs=0) ideally but practically the gate terminal is getting some negative voltage due to which the formation of the depletion region takes place.

Now If we keep the same voltage across the drain-source terminal and if we provide -ve voltage to the gate-source terminal i.e. (Vds=2v) and (vgs=-1v) then the depletion region present between the gate and source increases [acts as a reverse bias] due to which the passage through which the electrons flowing from source to drain or width of N-channel decreases.

Please Consider Here ID as ID1

Now as you can see in this figure that only a few electrons can pass from source to drain therefore ID decreases to form ID1. Thus we can conclude that as we decrease the gate voltage or in other words if we provide negative voltage to the gate terminal then the current decreases.

Now you may think that:-

Why the depletion region is wider at the top and narrower at the bottom?

Now as you see in the figure that the depletion region is moved a little upwards or in other words we can also say that the depletion region is wider at the top portion while it is narrower at the bottom. So this is because as you can see that the gate voltage is negative and we all know that in the p-region there are few electrons as minority charge carriers due to which these electrons are repelled and takes part in the formation of the depletion region at the same time these electrons are under the influence of +2v of drain terminal and due to attraction of these electrons moves upwards. Therefore in Jfet the depletion region is wider at the top and narrower at the bottom.

Why jfet is called unipolar and bjt as bipolar device?

As we saw above that in Jfet the current(ID) was generated only when the majority carriers i.e electrons that were present in N-channel were moving from source to drain.

While in Bjt the current flows because of holes and electrons i.e minority carriers and majority carriers.

Therefore Jfet is considered a unipolar device while bjt as bipolar.

Why Jfet is preferred over Bjt?

I will explain all the concepts in-depth after 2-3 posts but for now, just remember that all these factors like (power dissipation, heat generation, noise generation, and thermal runaway) were taking place in Bjt.

VIDEO:-

You will understand the above concept in depth by watching this video

I hope you understood this concept if you have any doubt then please ask me via comments or via mail.

Rpi model Of Transistor

2020-10-01T10:15:00.015-07:00

Until now we have seen the h-model of BJT and based on that we had designed an amplifier. Now we are going to see the rπ model of BJT in depth. But first of all, you need to understand why we are using the rπ model if there is an h-model of the transistor. This is because the h-model fails if you are working at higher frequencies at around 1Mhz, also the parameters which are used in the rπ-model define the actual operating conditions while the parameters present in the h-model don't reflect the actual operating conditions.

Here is the diagram of rpi-model:-

were rπ:-internal impedance of BJT

gm:-transconductance

Vpi:-voltage generated at rπ

ro:-resistance of the current source (gm*Vπ).....(Which is ideally infinite therefore we neglect it.)

Now we will see some derivation of some parameters which are present in the rπ model.

1) rπ:- Since it is an internal impedance of transistor, therefore, it is given as rπ=Vπ*Ib

rπ = β/gm

2) gm (Transconductance):-

So as you know conductance [g] is inverse of resistance [r] i.e.

if r = v/i

then g = 1/r = i/v

and trans means relation between input and output parameters.Therefore we can say that

gm = i(output) / v(input).........(1)

Definition of transconductance(gm):- Change in Output current(Ic) with respect to the Input voltage(Vbe)

i.e. (gm = dIc/dVbe)..........(2) {From 1}

But let's see its equation when we are dealing with transistors.

In diode, there was 1 equation Id=Io*[e^Vd/Vt - 1]

In the case of BJT transistors, the equation would be Ic=Icbo*[e^Vbe/Vt - 1]

Where Ic is an output current

ICBO is current due to minority charge carriers.

Vt is a thermal voltage which is around 26mv.

If you want to know why is minority carriers and how does it affect the working of transistor than watch this video is given below.

Now,Ic = Icbo*e^Vbe/Vt - Icbo....(3)

Icbo*e^Vbe/Vt = Ic + Icbo....(4)

Now we will differentiate equation (3) with respect to Vbe

dIc/dVbe = d/dVbe * (Icbo*e^Vbe/Vt)

dIc/dVbe = (Icbo*e^Vbe/Vt) / Vt

dIc/dVbe = (Ic + Icbo) / Vt .......From equation(3)

Now, As I discussed in my earlier post where I had explained the concept of current due to minority charge carriers there we saw that Icbo will be only in a few nA(nano ampere) or uA(microampere). So in the above equation, we can neglect it.

dIc/dVbe = Ic/Vt......(5)

therefore gm = Ic/Vt.....(From 2 and 5)

Now you would be thinking that the h-model and rπ model are totally different but they are the same up to some extent.

As you can see in the h-model the current source is given by (hfe*Ib) and in the rπ model, it is given as (gm*Vpi)

so gm*Vpi = gm*(rπ*Ib) = gm*(β/gm)*(Ib) = b*Ib = hfe*Ib....Sine(hfe = β)

So you saw that the rπ model and h-model are almost the same.

I didn't cover the T-model of BJT so I'm attaching one video which will explain the significance of the

T-model over the r-pi model and the h-pi model.

I hope you understood this concept in the next post we will move for the next type of transistor i.e. JFET.

Common Emitter Amplifier Designing

2020-09-10T03:35:00.022-07:00

In my last post, I explained to you why we are using voltage divider bias and some formulas to design an amplifier so in this post I will show you how to design a basic amplifier. Being a biomedical engineer I would like to discuss its application from a biomedical point of view. Recently we heard the news of neuralink chip and I think this is one of the very successful inventions or ideas from a biomedical point of view. So let's say if you want to see and analyze your heartbeat signal and by analyzing it you are using it in some other application. Now the voltage of your heartbeat signal is in a few milli-volts and if you want to analyze that signal you can't analyze it properly so there you can make use of an amplifier.

So let's start with the design of CE Amplifier:-

I'm taking voltage divider bias to design an amplifier because it provides good stability which I had discussed in my earlier posts. We are using 9V of battery and Bjt-transistor (bc547) having current gain(hfe) or β = 110 and the input impedance of transistor or hie=2.7kΩ

[We have to design an amplifier which will amplify signal having a frequency above 20hz and the input signal is of 10mVp-p signal to 1Vp-p]

Given:-

Vcc = 9v and f = 20hz

β/hfe = 110 and hie = 2.7kΩ .....................(From the datasheet of bc547)

we also know that Vce = Vcc/2 so for this condition to satisfy VRc = 40%Vcc and VRe = 10%Vcc

where VRc is the voltage drop across resistor Rc & VRe is the voltage drop across resistor Re

Process Of Designing:-

Since we are designing an amplifier where we have to raise 10mv of signal to 1V

So Av = Vo/Vin = 1/(10*10^-3) = 100

Now ,

In my last post I had mentioned a formula that

Av = -hfe*Rc/hie

From here we get

Rc = Av*hie/hfe=100*2.7k/110...(since the value of resistor can't be negative therefore we neglect it)

Rc = 2.45kΩ

Rc ~ 2.5kΩ

We know that

VRc = 40%Vcc=0.4*9=3.6v

Ic = VRc/Rc=3.6/2.5k=1.44mA

Ic = β*Ib

Ib = 13uA

Similarly Vre = 10%Vcc

VRe = 0.1*9 = 0.9v

And Ic~Ie = 1.44mA

Re = VRe/Ie = 0.9/1.44mA

Re = 625

Re ~ 620Ω

Now,

(Remeber that I2 is always 1/10th time of Ic)

I2 = 1/10*Ic = (1/10)*1.44mA = 0.14mA

I1 = Ib+I2 = 0.15mA

V2 = Vbe+VRe = 0.7+0.9 = 1.6v

V1 = Vcc-V2 = 9v-1.6v = 7.4v

R2 = (V2)/I2 = (1.6)/0.14mA = 11.4k ~ 11.5kΩ

R1 = (V1)/I1 = (7.4)/0.15mA = 49.33k ~ 51kΩ

Now we will be dealing with capacitors the values of capacitors should be selected such that it will attenuate the frequencies which are below 20hz while it provides almost constant gain for frequencies above 20hz.

so, here are formulas to calculate Cin, Cout & Ce

Cin = 1/2*pi*Xin*f

now here we know f=20hz but Rin is unknown to us

Xin = R1||R2||hie = 51k||11k||2.7k = 2kΩ

Cin = 4uf

Remember that we had discussed noise in the last post so to clear it we select impedance of Ce that is Xe = RE/10

Xe = 620/10 = 62Ω

Ce = 1/2*pi*Xe*f = 128uf ~ 130uf

For Cout the impedance of Xc = RC+RL since in our case we are not using and load resistor therefore RL=0

Xc = Rc = 2.4kΩ

Cout = 1/2*pi*Xc*f = 3.3uf

NOTE:- There are some standard values of resistor and capacitor and we have to use it according to the design we got R1 as 49.33k so we took 51k since there is no such resistor of 49.33k while resistor 51k is the standard value resistor.

Let's Implement It Practically:-

At 10Hz if we are giving 10mv of signal to our ce amplifier we are getting a gain of 15 as you can see below.

We know that

Av = Vo/Vin

Av = (80+75)mV/10mV

Av = 15.5

At 50Hz we are getting a gain of 68.1 as you can see below

We know that

Av = Vo/Vin

Av = (340+335)mV/10mV

Av = 68.1

At 100 Hz we are getting a gain of 94.5 as you can see below

We know that

Av = Vo/Vin

Av = (455+490)mV/10mV

Av = 94.5

At 120Hz we are getting a gain of 100 as you can see below

We know that

Av = Vo/Vin

Av = (485+515)mV/10mV

Av = 100

VIDEO:-

I embedded 2 videos in this section the 1st video will give you a short idea of the steps that we took whereas the video beneath it will provide you the idea of the CE-amplifier that we had designed in this post.

Here is the video which will give you a more clear idea of how an amplifier works at different frequencies.

CONCLUSION :-

So we had designed our Ce Amplifier properly since it is giving the desired gain what we wanted and it was exactly 180 degrees out of phase to the input signal.

If you are loving my content then please do comment below this will motivate me thankyou.

Idea Of Energy Saving While Driving Any Vehicle

2020-09-01T02:49:00.005-07:00

I was very much impressed by the idea of sir Elon Musk he belives in using renewable energy rather than using conventional energy because of this thinking he proposed the idea of the TESLA car which is really a good idea. I hope everyone knows about the working of the TESLA car so I'm not discussing that idea. So I will discuss one idea which might be very much useful in the future. I really don't know whether this idea is in use or not or whether anyone is working on it but still, I will discuss my ideas so that even if this idea is not in use then someone will work on it and then this might be used in the future.

So let's start the discussion but before that, while reading the further post if you find that this idea will not be useful in the future or if you have some other thoughts related to this topic then please let me know in the comment section.

Everyone saw a car or a bus moving on a road and you also know that it is moving with the help of wheels and the wheels are moving because of the motors and the motors are moving because of some mechanical energy as we see in today's car and due to electrical energy like tesla cars. Now just think what if we are driving our car with one battery and at the same time the other battery is charging. So for that just refer to the video given below.

Here you are seeing that we are using 2 motors. The 1st-motor(m1) is driving the wheels with some gear mechanism attached to one end of the rod while to the other end of the rod we are driving the motor-2(m2) by using the same gear mechanism,in short we are treating the 2nd motor(m2) as a generator and we had connected two ends of that motor to the battery which is not charged.

So when our 1st battery is discharging at that time second battery charges although it will not charge fully that means if our 1st battery is charged 100% then when it is discharged completely at that time the 2nd battery will charge upto 50%-90%. Now you might be thinking why the 2nd-battery will not charge upto 100%?

This is because of losses i.e. internal impedance of wire,hystersis,etc. We can't nullify losses but we can try to minimize it. So now we can run our car with battery-2 and at that time battery-1 charges. So basically this concept can be used in future cars like tesla cars since there they are using batteries to drive the car but still, I don't think it will be that much useful this is because the both of the batteries will consume a lot of space and can create an unnecessary issue of extra weight.

So now as a Biomedical-Engineer, I thought of using this idea in the following discussion:-

1) AMBULANCE:-

As we all know in an Ambulance there are 2 main batteries 12v and 125v Ac supply. So 12v is used in normal operations while 125v Ac supply is used to operate different biomedical machineries or equipments so we need to charge that 125v battery again and again but by using this concept we don't need to charge that battery again and again.

Here, instead of using a motor(m2) as discussed above, we are charging a battery which then can be used for operating various biomedical machineries or equipments present in that car. In short, we can save lot of energy.

2) ELECTRICAL WHEEL-CHAIR:-

Electrical wheelchairs are moving because of dc power source so yes we can use the same concept there so basically by using this concept we will be saving a lot of energy and our time as well.

CONCLUSION:-

Before using this concept if the battery backup of a fully charged car was for 100km [ASSUMED] so after using this concept the car may run more 50km-100km which means total 150km-200km [ASSUMED].

DRAWBACK:-

1) As usual, the very 1st issue when it comes to an increase in the implementation of battery is space. So companies have to solve this problem of space management.

2) So another issue that there would be a lot of heating issues while using this concept in the real world. So for that also companies have to take some preventive measures.

Common Emitter Amplifier

2020-08-21T00:17:00.019-07:00

In the last post, we studied the transistor model for small-signal analysis, and there I had briefly explained that why we are using h-parameter for the analysis of the BJT transistor. In this post, you will be studying voltage divider bias in little depth and at the same time, we will be studying some basic concepts to design an amplifier so that we will understand the working of amplifier in-depth, and in the next post, we can design a proper and well prepared basic amplifier.

In my post on different biasing techniques of transistors, I didn't explain the voltage divider bias in detail because I thought of explaining it while starting amplifiers so that you can grasp the concept very well. So let's start with our post.

Diagram Of Voltage-Divider Bias:-

Now consider,

current I1 flows through R1

current I2 flows through R2

current Ic flows through Rc

current IE flows through RE

By considering this we conclude the following thing

So as you can see in this derived expression that if IE increases due to heating then I2 decreases which in short means that base voltage (Vb) decreases. Due to this reason, the voltage divider bias is also known as a self-bias circuit.So now if we are designing amplifier with the help of this transistor so IE(total) = Ie(dc) + ie(ac). So you can see that due to the introduction of ac signal IE(total) increases due which the base voltage Vb decreases and if base voltage decreases then there might be a situation that the input ac signal might be clipped due to which we can't get proper amplification of it at the output.

For Example

1)when Ac signal is introduced:-Let's say by proper biasing we had set our Vb to 2 volts (Vb=2v) and IE(total) = Ie(dc) so at starting the input ac signal would be amplified properly.

2)When ac signal reaches towards Emitter terminal:- As soon as we introduced ac signal in our amplifier assume that the value of our Ac signal is 0.6 volts peak to peak

So now IE(total) = Ie(dc) + ie(ac) i.e. IE(total) increases after some-time due to which Vb decreases let's say the value of Vb decreases from 2v to 1v (ASSUMED)

Now,for positive half cycle of Vin or ac-signal the value of Vb would be Vb(+) = Vb + (0.3) = 1 + 0.3 = 1.3v

Now,for negative half cycle of Vin or ac-signal the value of Vb would be Vb(-) = Vb + (-0.3) = 1 - 0.3 = 0.7v

and we know that for the transistor to operate in active or saturation region Vbe should be greater than 0.7v else our transistor will operate in the cutoff region so the transistor won't be able to pass some negative part of the ac signal that means we are not getting a proper amplified signal at the output.

[NOTE:-Vb won't change drastically from 2v to 1v but I had just mentioned it so that you can understand it very well. This kind of situation mainly happens only if the transistors become too old.]

If you want to understand this concept in depth make sure to watch the video given beow.

So to overcome this problem we are connecting a capacitor in parallel with Re so that the ac current or ie(ac) will pass through the capacitor and Ie(dc) will pass through the resistor RE due to which Vb will not decrease and we will get the proper amplified signal of the applied input signal at the output. Also, the dc signal which we are providing to the transistor ideally should be a straight line signal but practically it also offers some noise so to clear that noise as well we use a capacitor since noise has a high frequency.

I hope now all things are clear so that we can move towards some formulas or some concepts required to design an amplifier in my next post I will show you how to design an amplifier

As I discussed in my earlier posts that to design an amplifier 4 things are important i.e. it's Input impedance (Zi), Output impedance(Zo), Voltage gain(Av) & Current gain(Ai). I had already discussed how to calculate Ic, Ib, Vce, or in-short dc analysis of transistors in my earlier post on biasing techniques of the transistor. So please visit that post if you are not familiar with it.

Remember that during the small-signal analysis of the transistor all the dc sources act as an open circuit [Superposition Theorem] & all the capacitors are replaced by short-circuits

Therefore RE is also replaced by short-circuit since the voltage drop across RE is zero. So transistor in small-signal analysis can be redrawn as shown below

The value of hie=2.7k & hfe/β=110 (for bc547) at room temperature

So as you can see above that the input impedance (Zi) = Rth || hie

The output impedance (Zo) = Rc

Voltage Gain of Amplifier :- Av = (Vo/Vi) = -hfe.Ib.Rc / hie.Ib = (-hfe.Rc) / hie.

Current Gain of Amplifier :- Ai = (Io/Iin) = (hfe.Rth) / (Rth+hie)

Note that we will get maximum amplification only if the q-point is in the middle of the load line.

Vce(q) = Vcc/2 & Ic(q) = Ic(max)/2

That means there should be 50% of the voltage drop across Vce and the rest 50% of the voltage should be dropped across Rc and Re (i.e. collector resistor and emitter resistor respectively).

Therefore VRc = 40%Vcc & VRe = 10%Vcc

The concept would be more clear by watching the image and the video given below.

CONCLUSION:-

So I conclude the whole post by just posting a single video on my you-tube channel I hope it will surely help you

VIDEO :-

I hope that you understood all the concepts that we discussed in this post in the next post we will discuss how to design an amplifier.

Transistor As Two-port Network

2020-08-11T03:09:00.027-07:00

First of all, we have to understand what is a two-port network to understand the transistor as a 2-port network.

Two-port Network:-

Any network with 4 nodes or 4 terminals is considered as a two-port network only if it satisfies the port condition

Port Condition:-

If current entering from one terminal is leaving from some other terminal with the opposite direction but with equal magnitude then these two terminals combine to form a single port. So for a two-port network, we require 4 such terminals that satisfy the port condition.

As you can see above the transistor obeys port condition and therefore we can say that the transistor is like a two-port network.

There are total of 6 parameters for a two-port network but for analysis of the transistor, we will be dealing with only one parameter that is an h-parameter. You can also go with g-parameter

Since,

h=1/g

Now the question arises why we are only using the h-parameter for the analysis of transistors?

So here is the answer to it.

Z-parameter:-

V1 = Z11*I1 + Z12*I2

V2 = Z21*I1 + Z22*I2

By using Z-parameters we can only get to know input and output impedances and we not at all interested in transfer impedances for the analysis of transistors.

Y-parameter:-

I1 = Y11*V1 + Y12*V2

I2 = Y21*V1 + Y22*V2

Similarly, by using Y-parameters we will only get input and output admittance and we not at all interested in transfer admittance

ABCD parameter:-

Vs = A*V + B*I

Is = C*V + D*I

By using ABCD parameters we can just find the source voltage and source current, which is not at all required for the analysis of the transistor.

But now let's talk about h-parameter

V1 = h11*I1 + h12*V2.....(1)

I2 = h21*I1 + h22*V2.....(2)

Now,

From equation (1)

if V2=0 (short-circuited)

h11 = V1 / I1

And as we know voltage by the current is equal to the resistance. Therefore h11 is also known as input impedance (Zi)

if I1=0 (open circuited)

h12 = V1 / V2

So h12 provides reverse voltage gain(1\Av).

So if we took the reciprocal of it then we will get the (Av)voltage gain (V2 / V1) of an amplifier.

Now,

From equation (2)

If V2=0 (short circuited)

h21 = I2 / I1

So h21 parameter provides the current gain of the amplifier.

If I1=0 (open circuited)

h22 = I2 / V2

So h22 provide output admittance of the amplifier

But if we take the reciprocal of it then we will get (Zo)output impedance (V2 / I2) of the amplifier.

So to study amplifier these 4 parameters plays an important role i.e.

1) Input impedance (Zi).

2) Output impedance (Zo).

3) Voltage gain (Av). &

4) Current gain (Ai).

Just see the video given below it will give you a great idea about the parameters to be used while designing any amplifier.

So in ac analysis or for small-signal analysis, the transistor model can be drawn as shown below.

hie:-represents input impedance of transistor.

hre:-represents reverse voltage gain of the transistor.

hfe:-represents forward current gain of transistor it is also known as (b).

hoe:-represents open circuit or admittance of transistor.

(e) which is used in the above parameters represents that we are doing ac analysis of common emitter configuration.

Now,

V1=Vin of the transistor which is in few millivolts while V2=Vce or output voltage which might be in volts but greater than Vin

Therefore h12=hre=V1/V2 is almost equals to zero (h12=hre=0).Thus it can be neglected.

Also,

I2=Ic or the output current of the transistor is in a few milli-amperes while the V2=Vce or output voltage which might be in volts

therefore h22=hoe=I2/I1 is almost equals to zero (h22=hoe=0).

So 1/hoe becomes very large. Thus it can be replaced by an open circuit.

So the approximate model of the BJT transistor can be drawn as shown below.

I hope you understood it. If you like it then please let me know in the comment section.

Noise Cancellation with Op-Amp(IC 741)

2020-08-01T12:38:00.011-07:00

I was very much inspired by Bose. They are using a technique known as active noise cancellation. They are using a processor in their earphones and headphones.

When any noise enters into the headphones or earphones the processors which are present in it make the signal which is equal in magnitude but opposite in phase. Thus the signal which is generated by processors is added with the actual noise signal due to which their addition almost becomes zero and you can just listen the music very clearly as compared with the headphones of other companies (I'm not promoting any company). Since they are using processors that require an external power supply for its operation, therefore, it is known as the active noise cancellation technique.

Now talking about my idea I didn't made any prototype of this project that's why I can't comment on its actual working but during simulation, it is working properly.

So let's start with our project.

Components required:-

1) Op-Amp (IC 741)

2) Resistors and one variable resistor.

3) Battery (9V)

4) Jumpers(Wires)

5) MIC

6) AND gate(Ic 7408) OR two-transistors

(Since we require only one AND gate so if you want to save space in your project then you can make an AND gate with the help of 2-transistors)

Circuit Diagram:-

So as you can see in the diagram that the positive end of the mic is connected to the positive terminal of 9v with a 10k resistor in between them.

AND gate is connected to the input of the mic while the other end of the AND gate is connected to the ground. Here I had made AND gate with the help of transistors [Q1 and Q2].

The output of the AND gate is connected to the 3rd pin of op-Amp with a 100k resistor in between them.

The audio-signal is also given to the 3rd pin of op-Amp.

We are using a variable resistor to increase or decrease the sound level which is connected between the 2nd and 6th pin of op-Amp and the 2nd pin is connected to the ground with a 1k resistor.

Working Of The Project:-

We are using Op-Amp as Summing Amplifier or as an adder in this project. Whenever any noise is produced in the external environment then the mic converts the noise signal into an electrical signal. This signal is given to one of the terminals of the AND gate.

Now as the other terminal of the AND gate is grounded therefore ideally at the output we should get zero signal but practically we get some signal at the output of the AND gate so to reduce that noise signal we connect a 100k resistor between the output of the AND gate & 3rd pin of op-Amp.

Now since we had also connected the audio signal to the 3rd pin of op-Amp due to which that noise signal which is almost negligible gets added with the audio signal (zero + audio-signal). Due to which at the output we are only getting the amplified form of the audio signal.

The variable resistor(feed-back resistor) is used to increase or decrease the sound level or amplitude of the audio signal.

So as usual I conclude my explanation by leaving this short video.

VIDEO:-

Here is the PDF of pcb designing

Click Here for PDF

I'm also providing it's Gerber file of this project

Gerber File

Here is the photo of it this pic is for them who are not going for printed circuit.

Please let me know whether you liked my idea and if you have any ideas or any suggestions to improve this project then please let me know in the comments section.

Dancing Leds

2020-07-18T05:40:00.014-07:00

Until now we had dealt with 2 projects in detail so now in this project we will be seeing how we can operate different LEDs with a single transistor.

Again this concept is totally based on bjt as switch.

Components required are:-

12v battery

12 to 15 leds

Mic

Transistor(bc547)

Resistors()

Capacitor(100uf)

Diagram Of The Project:-

Working of the project:-

We used fixed bias technique in this project. By biasing we set the base-emitter voltage to 0.7volts (Vbe=0.7v) and then we are giving an audio signal to the base of the transistor

So we should understand the working of the project in 2 cases

CASE-1:- When the Amplitude of the Audio-signal is High

When the amplitude of the Audio signal is high then the input becomes Vb = (0.7) + (audio-signal) and as we had studied in bjt as a switch that if Vbe is high that means Ib and Ic both would be high and if Ic is high that means voltage drop across collector-emitter terminal(Vce) is less,in-short our transistor acts as a closed switch or in other words we can say that our transistor operates in the saturation region. Therefore all the LEDs remain on in this case.

CASE-2:- When the Amplitude of the Audio-signal is Less

When the amplitude of the Audio signal is less then the input becomes Vb = (0.7) - (audio-signal) and as we had studied in bjt as a switch that if Vbe is less that means Ib and Ic both would be less and if Ic is less that means voltage drop across collector-emitter terminal(Vce) is high,in-short our transistor acts as an open switch, in other words, we can say that our transistor is operating in the cutoff region and due to which all the LEDs remain off in this case.

Here is the video through which your concept would be more clear

VIDEO:-

Here is the PDF of pcb layout

Click Here For the pdf

Here is the diagram of the pcb layout so that it would be easy for you to understand it.

Automatic Brightness Controller Using Ldr & Transistor

2020-07-14T02:51:00.021-07:00

In the last post, we saw the working of LDR as a street light which was based on the concept of bjt as a switch. In this post, we will see LDR as a brightness controller

which is again based on the concept of BJT as a switch but the difference is that in the last project Our transistor was operating from the saturation region to the cutoff region. But the project we are going to discuss in this post acts totally in a reverse manner is in this project the transistor will operate from the cutoff region to the saturation region we will discuss the reason below for such operation.

I hope you all guys had done the project of LDR as a street light. So I'm not discussing the requirements and working of the components. I'm directly starting with the project.

# Here is the diagram of the project:-

In the last project, the LDR was connected between the ground and base terminal of the transistor.

In this project, we are connecting LDR between the positive terminal and the base terminal.

# Working of the project:-

Case:-1

When the torch(which is in on condition) is far away from the LDR at that time led is off because the LDR provides high resistance due to which the base current Ib is zero(Ib=0) and we know that if Ib=0 then Ic=0(since Ic=β*Ib) therefore transistors acts as an open switch and thus we can say that transistor is operating in cutoff region.

Case:-2

Now if we bring that torch near to the LDR then the resistance of LDR decreases and the base current which was zero becomes Ib=Ibmin due to which Ic=Icmin(since Ic=β*Ib) as result the led glows but its intensity is very much less. So in this case we can say that our q-point is tending to a saturation region or it is present some were near to the saturation region.

Case:-3

At the end, if we move the torch very much closer to the LDR, at this instance the resistance offered by the LDR is very much less and the LDR behaves like a normal wire therefore the base current changes from Ibmin to Ib=Ibmax due to which Ic becomes Ic=Icmax thus we can say that transistor is operating in saturation mode.

So as usual here is the video to boost your concept in a more detailed way.

VIDEO:-

Here is the pdf of the PCB layout.

Click Here For Pdf

Here is the photo of the PCB design of this project

I had given this photo so that it will be easy for you to understand the placement of components on the board.

Automatic Street Light Controller Using Ldr & Transistor

2020-07-10T22:23:00.020-07:00

In the last post, we studied BJT as a switch. If you want to revise that concept then just watch the video given below.

For those who had not read the concept of bjt as a switch just read it and then come on to this post so that you can understand this project with great depth because we are making this project by applying the concept of BJT as a switch.

Now as I promised you that after completing 70%-80% of the transistor model I will be explaining to you some projects. So we will be doing a total of 3-4 projects this is the 1st project. I had also provided the PCB layout of this project at the end of this post because I want you all to do this project on the PCB rather than implementing all the components on the breadboard.

So starting with our project. First of all, we should understand the components that we are using in this project and its working.

Components used are:-

Resistors (50k, 500)

Transistor

LDR

Led

Battery (9v)

jumpers(wires).

Working of the project:-

Here is the diagram of our project.

Case:-1

So when our LDR is suffering from the darkness that is when the torch(which is in on condition) is far away from the LDR at that time ldr offers high resistance to the circuit therefore current Ibmax moves towards the base terminal of the transistor and almost negligible current flows from the branch of the Ldr. As Ibmax flows to the base terminal therefore current flowing to the collector terminal is also maximum (Icmax) since Ic =β*Ib due to which the output is high that is led remains on thus we can say that the transistor operates in the saturation region.

Case:-2

Now if we move that torch near to the LDR, at this instance ldr operates as a normal resistor due to which some current flows to the base terminal of the transistor and some to the LDR branch due to which Ibmax becomes Ibmin and Icmax becomes Icmin and the led becomes little dim.

Case:-3

At the end if we bring that torch very much closer to the LDR then LDR offers negligible resistance and therefore maximum current flows from the branch of the LDR and the current flowing through the base terminal becomes zero(i.e. Ib=0) due to which Ic flowing through the collector terminal also becomes zero (i.e. Ic=0) since Ic =β*Ib thus we can say that our transistor acts in cutoff region.

Here is the video of my explanation your concept would be more clear on watching this video.

VIDEO:-

So as I promised, here is the pdf of Pcb layout of this project

Click Here To Open PDF

Photo of PCB layout:-

I had given this photo so that it will be easy for you to understand the placement of components on the board.

If you understand this concept then please let me know in the comment section given below.

Bjt As A Switch

2020-07-01T04:30:00.017-07:00

In the last post, we studied different biasing techniques of the BJT transistor. So in this post and in the next post, we will be dealing with the application of BJT

transistor and at the end, we will be dealing with different projects of bjt.

To operate bjt as a switch mostly fixed bias is used as there is only one resistor on the input side but I had directly applied Sinusoidal(ac signal) 5 Vp-p at the input side so that I can explain the concept in a detailed way. As I had explained in my earlier posts that when Vin is greater than 0(+ve half cycle) the output would be inverted by 180 degrees, similarly when Vin is less than 0(-ve half cycle) then at the output we get a positive half cycle. If you forgot that concept then here is the video which helps you to remember it.

So we will understand this concept in 2 cases

Case 1:-During Positive(+ve) Half-Cycle of Vin:-

During positive half-cycle (ideally) or when Vin is greater than 0.7v (practically) i.e. Vbe>0.7 then electrons flow from emitter side to collector side, which means current(Ic) flows from collector terminal to emitter terminal. So, in short, we can say that during a positive half-cycle our transistor acts as a short circuit or we can assume it as a closed switch. Since our transistor acts as a closed switch therefore we can say that it is working in saturation mode and if you remember in our earlier posts we had studied that in saturation mode the output current(Ic) is maximum while the output voltage(Vce) is less. Now if Vce is less that means the voltage drop across led is more. So due to this reason, the led will glow in this case. You can see this in the image given below.

So this was about a positive(+ve) half-cycle. Now starting with case 2 is during the negative(-ve) half-cycle.

Case 2 :-During Negative(-ve) Halfcycle of Vin:-

During negative half-cycle (ideally) or when vin is less than 0.7v (practically) i.e. Vbe<0.7 then electrons don't flow from emitter to collector since both the junctions of the transistor are reverse biased. As no or very less electrons(minority carriers) flow therefore the output current(Ic) generated is very less or negligible. So, in short, we can say that during the negative half-cycle the transistors acts as an open circuit or you can assume it as an open switch. Since our transistor acts as an open switch, therefore, we can say that it is working in the cutoff region and as we had studied that in the cutoff region the output current(Ic) is less and the output voltage(Vce) is maximum. Now if Vce is maximum that means voltage drop across led is very less. So the led remains off in this case. You can see this image given below.

CONCLUSION:-

Thus we can say that the transistor acts as a variable resistor. If Vbe < 0.7v then the transistor provides high resistance, therefore, no current flows through the circuit and the transistor operates in the cutoff region and if Vbe > 0.7v then the transistor provides less resistance, and therefore the maximum current flows through the circuit and the transistor operates in the saturation region.

As usual, I conclude this part by living the video, this will clear your concept in a more detailed way for sure.

VIDEO:-

If you find it helpful then please let me know in the comments.