SLD | Publications by date http://sld.cs.columbia.edu Publications of the SLD group A wireless subdural-contained brain--computer interface with 65,536 electrodes and 1,024 channels http://sld.cs.columbia.edu/pubs/jung_nature25.pdf Wed, 1 Jan 2025 00:00:00 -0000 An Energy-Efficient Kalman Filter Architecture with Tunable Accuracy for Brain-Computer Interfaces http://sld.cs.columbia.edu/pubs/eichler_dac25.pdf Wed, 1 Jan 2025 00:00:00 -0000 FLIP2M: Flexible Intra-layer Parallelism and Inter-layer Pipelining for Multi-model AR/VR Workloads http://sld.cs.columbia.edu/pubs/tombesi_acmtecs25.pdf Wed, 1 Jan 2025 00:00:00 -0000 KalmMind: A Configurable Kalman Filter Design Framework for Embedded Brain-Computer Interfaces http://sld.cs.columbia.edu/pubs/eichler_date25.pdf Wed, 1 Jan 2025 00:00:00 -0000 MINDFUL: Safe, Implantable, Large-Scale Brain-Computer Interfaces from a System-Level Design Perspective http://sld.cs.columbia.edu/pubs/eichler_micro25.pdf Wed, 1 Jan 2025 00:00:00 -0000 Optimization of Wire Pipelining and Channel Parallelism for 2D-Mesh NoC Physical Design http://sld.cs.columbia.edu/pubs/tsai_iccd25.pdf Wed, 1 Jan 2025 00:00:00 -0000 RECONFORMER: A Multi-Level Run-Time Reconfigurable System-on-Chip for Accelerating Trsnsformers http://sld.cs.columbia.edu/pubs/yang_fpl25.pdf Wed, 1 Jan 2025 00:00:00 -0000 SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design http://sld.cs.columbia.edu/pubs/alvanaki_llmad25.pdf Wed, 1 Jan 2025 00:00:00 -0000 A 12nm Linux-SMP-Capable RISC-V SoC with 14 Accelerator Types, Distributed Hardware Power Management, and Flexible NoC-Based Data Orchestration Mon, 1 Jan 2024 00:00:00 -0000 A 400-ns-Settling- Time Hybrid Dynamic Voltage Frequency Scaling Architecture and Its Application in a 22-Core Network-on-Chip SoC in 12-nm FinFET Technology http://sld.cs.columbia.edu/pubs/loscalzo_vlsi24.pdf Mon, 1 Jan 2024 00:00:00 -0000 A Wireless Subdural Optical Cortical Interface Device with 768 Co-Packaged Micro-LEDs for Fluorescence Imaging and Optogenetic Stimulation http://sld.cs.columbia.edu/pubs/gilhotra_cicc24.pdf Mon, 1 Jan 2024 00:00:00 -0000 BlitzCoin: Fully Decentralized Hardware Power Management for Accelerator-Rich SoCs http://sld.cs.columbia.edu/pubs/cochet_isca24.pdf Mon, 1 Jan 2024 00:00:00 -0000 Enhanced Machine-Learning Flow for Microwave-Sensing Systems for Contaminant Detection in Food http://sld.cs.columbia.edu/pubs/stitic_agrifood24.pdf Mon, 1 Jan 2024 00:00:00 -0000 Mozart: Taming Taxes and Composing Accelerators with Shared-Memory http://sld.cs.columbia.edu/pubs/suresh_pact24.pdf Mon, 1 Jan 2024 00:00:00 -0000 Open-CFR: Open-Source Co-Design Framework for Redundancy with DPR in COTS FPGA SoCs http://sld.cs.columbia.edu/pubs/restuccia_scc24.pdf Mon, 1 Jan 2024 00:00:00 -0000 Reducing Datacenter Compute Carbon Footprint by Harnessing the Power of Specialization: Principles, Metrics, Challenges and Opportunities http://sld.cs.columbia.edu/pubs/eilam_semiman24.pdf Mon, 1 Jan 2024 00:00:00 -0000 WOLT: Transparent Deployment of ML Workloads on Lightweight Many-Accelerator Architectures http://sld.cs.columbia.edu/pubs/chiu_iccd24.pdf Mon, 1 Jan 2024 00:00:00 -0000 A 12nm 18.1TFLOPs/W Sparse Transformer Processor with Entropy-Based Early Exit, Mixed-Precision Predication and Fine-Grained Power Management. http://sld.cs.columbia.edu/pubs/tambe_isscc23.pdf Sun, 1 Jan 2023 00:00:00 -0000 A Wireless, Mechanically Flexible, 25um-Thick, 65,536-Channel Subdural Surface Recording and Stimulating Microelectrode Array with Integrated Antennas http://sld.cs.columbia.edu/pubs/zeng_vlsi23.pdf Sun, 1 Jan 2023 00:00:00 -0000 An Analysis of Accelerator Data-Transfer Modes in NoC-Based SoC Architectures http://sld.cs.columbia.edu/pubs/chiu_hpec23.pdf Sun, 1 Jan 2023 00:00:00 -0000 DECADES: A 67mm2, 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET http://sld.cs.columbia.edu/pubs/gao_cicc23.pdf Sun, 1 Jan 2023 00:00:00 -0000 EigenEdge: Real-Time Software Execution at the Edge with RISC-V and Hardware Accelerators http://sld.cs.columbia.edu/pubs/chiu_rage23.pdf Sun, 1 Jan 2023 00:00:00 -0000 MindCrypt: The Brain as a Random Number Generator for SoC-Based Brain-Computer Interfaces http://sld.cs.columbia.edu/pubs/eichler_iccd23.pdf Sun, 1 Jan 2023 00:00:00 -0000 PR-ESP: An Open-Source Platform for Design and Programming of Partially Reconfigurable SoCs http://sld.cs.columbia.edu/pubs/seyoum_date23.pdf Sun, 1 Jan 2023 00:00:00 -0000 SoCProbe: Compositional Post-Silicon Validation of Heterogeneous NoC-Based SoCs http://sld.cs.columbia.edu/pubs/tombesi_ieeedt23.pdf Sun, 1 Jan 2023 00:00:00 -0000 SpikeHard: Efficiency-Driven Neuromorphic Hardware for Heterogeneous Systems-on-Chip http://sld.cs.columbia.edu/pubs/clair_cases23.pdf Sun, 1 Jan 2023 00:00:00 -0000 Accelerators & Security: The Socket Approach http://sld.cs.columbia.edu/pubs/piccolboni_cal22.pdf Fri, 1 Jul 2022 00:00:00 -0000 A 12nm Agile-Designed SoC for Swarm-Based Perception with Heterogeneous IP Blocks, a Reconfigurable Memory Hierarchy, and an 800MHz Multi-Plane NoC http://sld.cs.columbia.edu/pubs/jia_mantovani_casseldossantos_esscirc22.pdf Sat, 1 Jan 2022 00:00:00 -0000 A Scalable Methodology for Agile Chip Development with Open-Source Hardware Components http://sld.cs.columbia.edu/pubs/dossantos_iccad22.pdf Sat, 1 Jan 2022 00:00:00 -0000 An Open-source Platform for Design and Programming of Partially Reconfigurable Heterogeneous SoCs http://sld.cs.columbia.edu/pubs/seyoum_cases22.pdf Sat, 1 Jan 2022 00:00:00 -0000 Enabling Heterogeneous, Multicore SoC Research with RISC-V and ESP http://sld.cs.columbia.edu/pubs/zuckerman_carrv22.pdf Sat, 1 Jan 2022 00:00:00 -0000 Accelerator Integration for Open-Source SoC Design http://sld.cs.columbia.edu/pubs/giri_ieeemicro21.pdf Fri, 1 Jan 2021 00:00:00 -0000 CRYLOGGER: Detecting Crypto Misuses Dynamically http://sld.cs.columbia.edu/pubs/piccolboni_sp21.pdf Fri, 1 Jan 2021 00:00:00 -0000 Cohmeleon: Learning-Based Orchestration of Accelerator Coherence in Heterogeneous SoCs http://sld.cs.columbia.edu/pubs/zuckerman_micro21.pdf Fri, 1 Jan 2021 00:00:00 -0000 HARDROID: Transparent Integration of Crypto Accelerators in Android http://sld.cs.columbia.edu/pubs/piccolboni_hpec21.pdf Fri, 1 Jan 2021 00:00:00 -0000 MasterMind : Many-Accelerator SoC Architecture for Real-Time Brain-Computer Interfaces http://sld.cs.columbia.edu/pubs/eichler_iccd21.pdf Fri, 1 Jan 2021 00:00:00 -0000 Transfer-Learning for Design-Space Exploration with High-Level Synthesis http://sld.cs.columbia.edu/pubs/kwon_mlcad20.pdf Sun, 1 Nov 2020 00:00:00 -0000 A Scalable Architecture for CNN Accelerators Leveraging High-Performance Memories http://sld.cs.columbia.edu/pubs/hattink_hpec20.pdf Wed, 1 Jan 2020 00:00:00 -0000 Agile SoC Development with Open ESP http://sld.cs.columbia.edu/pubs/mantovani_iccad20.pdf Wed, 1 Jan 2020 00:00:00 -0000 Ariane + NVDLA: Seamless Third-Party IP Integration with ESP http://sld.cs.columbia.edu/pubs/giri_carrv20.pdf Wed, 1 Jan 2020 00:00:00 -0000 ESP4ML: Platform-Based Design of Systems-on-Chip for Embedded Machine Learning http://sld.cs.columbia.edu/pubs/giri_date20.pdf Wed, 1 Jan 2020 00:00:00 -0000 HL5: A 32-bit RISC-V Processor Designed with High-Level Synthesis http://sld.cs.columbia.edu/pubs/mantovani_cicc20.pdf Wed, 1 Jan 2020 00:00:00 -0000 Leveraging Prior Knowledge for Effective Design-Space Exploration in High-Level Synthesis http://sld.cs.columbia.edu/pubs/ferretti_tcad20.pdf Wed, 1 Jan 2020 00:00:00 -0000 MosaicSim: A Lightweight, Modular Simulator for Heterogeneous Systems http://sld.cs.columbia.edu/pubs/matthews_ispass20.pdf Wed, 1 Jan 2020 00:00:00 -0000 Photonic Switched Optically Connected Memory: An Approach to Address Memory Challenges in Deep Learning Wed, 1 Jan 2020 00:00:00 -0000 Scalable Open-Source System-on-Chip Design http://sld.cs.columbia.edu/pubs/carloni_vlsisoc20.pdf Wed, 1 Jan 2020 00:00:00 -0000 Silicon Photonics Codesign for Deep Learning Wed, 1 Jan 2020 00:00:00 -0000 A Learning-Based Recommender System for Autotuning Design Flows of Industrial High-Performance Processors http://sld.cs.columbia.edu/pubs/kwon_dac19.pdf Sat, 1 Jun 2019 00:00:00 -0000 Cross-ISA Machine Instrumentation using Fast and Scalable Dynamic Binary Translation http://sld.cs.columbia.edu/pubs/cota_vee19.pdf Mon, 1 Apr 2019 00:00:00 -0000 KAIROS: Incremental Verification in High-Level Synthesis through Latency-Insensitive Design http://sld.cs.columbia.edu/pubs/piccolboni_fmcad19.pdf Tue, 1 Jan 2019 00:00:00 -0000 Runtime Reconfigurable Memory Hierarchy in Embedded Scalable Platforms http://sld.cs.columbia.edu/pubs/giri_aspdac19.pdf Tue, 1 Jan 2019 00:00:00 -0000 Teaching Heterogeneous Computing with System-Level Design Methods http://sld.cs.columbia.edu/pubs/carloni_wcae19.pdf Tue, 1 Jan 2019 00:00:00 -0000 Towards a Complete Methodology for Synthesizing Bundled-Data Asynchronous Circuits on FPGAs http://sld.cs.columbia.edu/pubs/bhardawaj_islped19.pdf Tue, 1 Jan 2019 00:00:00 -0000 Accelerators and Coherence: An SoC Perspective http://sld.cs.columbia.edu/pubs/giri_ieeemicro18.pdf Thu, 1 Nov 2018 00:00:00 -0000 DarkMem: Fine-grained Power Management of Local Memories for Accelerators in Embedded Systems Mon, 1 Jan 2018 00:00:00 -0000 Design and Implementation of a Dynamic Information Flow Tracking Architecture to Secure a RISC-V Core for IoT Applications http://sld.cs.columbia.edu/pubs/palmiero_hpec18.pdf Mon, 1 Jan 2018 00:00:00 -0000 NoC-Based Support of Heterogeneous Cache-Coherence Models for Accelerators http://sld.cs.columbia.edu/pubs/giri_nocs18.pdf Mon, 1 Jan 2018 00:00:00 -0000 PAGURUS: Low-Overhead Dynamic Information Flow Tracking on Loosely Coupled Accelerators http://sld.cs.columbia.edu/pubs/piccolboni_tcad18.pdf Mon, 1 Jan 2018 00:00:00 -0000 COSMOS: Coordination of High-Level Synthesis and Memory Optimization for Hardware Accelerators http://sld.cs.columbia.edu/pubs/piccolboni_tecs17.pdf Fri, 1 Sep 2017 00:00:00 -0000 Accelerators for Breast Cancer Detection http://sld.cs.columbia.edu/pubs/pagliari_tecs17.pdf Wed, 1 Mar 2017 00:00:00 -0000 Broadening the Exploration of the Accelerator Design Space in Embedded Scalable Platforms http://sld.cs.columbia.edu/pubs/piccolboni_hpec17.pdf Sun, 1 Jan 2017 00:00:00 -0000 Cross-ISA Machine Emulation for Multicores http://sld.cs.columbia.edu/pubs/cota_cgo17.pdf Sun, 1 Jan 2017 00:00:00 -0000 System-Level Design of Networks-on-Chip for Heterogeneous Systems-on-Chip http://sld.cs.columbia.edu/pubs/yoon_nocs17.pdf Sun, 1 Jan 2017 00:00:00 -0000 System-Level Optimization of Accelerator Local Memory for Heterogeneous Systems-on-Chip http://sld.cs.columbia.edu/pubs/pilato_tcad17.pdf Sun, 1 Jan 2017 00:00:00 -0000 Handling Large Data Sets for High-Performance Embedded Applications in Heterogeneous Systems-on-Chip http://sld.cs.columbia.edu/pubs/mantovani_cases16.pdf Sat, 1 Oct 2016 00:00:00 -0000 An FPGA-based Infrastructure for Fine-grained DVFS Analysis in High-performance Embedded Systems http://sld.cs.columbia.edu/pubs/mantovani_dac16.pdf Wed, 1 Jun 2016 00:00:00 -0000 Exploiting Private Local Memories to Reduce the Opportunity Cost of Accelerator Integration http://sld.cs.columbia.edu/pubs/cota_ics16.pdf Wed, 1 Jun 2016 00:00:00 -0000 The Case for Embedded Scalable Platforms http://sld.cs.columbia.edu/pubs/carloni_dac16.pdf Wed, 1 Jun 2016 00:00:00 -0000 A synthesis-parameter tuning system for autonomous design-space exploration http://sld.cs.columbia.edu/pubs/ziegler_date16.pdf Tue, 1 Mar 2016 00:00:00 -0000 A Probabilistic Ranking Model for Audio Stream Retrieval http://sld.cs.columbia.edu/pubs/jung_marmi16.pdf Fri, 1 Jan 2016 00:00:00 -0000 High-Level Synthesis of Accelerators in Embedded Scalable Platforms http://sld.cs.columbia.edu/pubs/mantovani_aspdac16.pdf Fri, 1 Jan 2016 00:00:00 -0000 On the Design of Scalable and Reusable Accelerators for Big Data Applications http://sld.cs.columbia.edu/pubs/pilato_cf16.pdf Fri, 1 Jan 2016 00:00:00 -0000 Scalable Auto-Tuning of Synthesis Parameters for Optimizing High-Performance Processors http://sld.cs.columbia.edu/pubs/ziegler_islped16.pdf Fri, 1 Jan 2016 00:00:00 -0000 Design Automation of Electronic Systems: Past Accomplishments and Challenges Ahead [Scanning the Issue] http://sld.cs.columbia.edu/pubs/brayton_pieee15.pdf Sun, 1 Nov 2015 00:00:00 -0000 Energy-Harvesting Active Networked Tags (EnHANTs): Prototyping and Experimentation http://sld.cs.columbia.edu/pubs/margolies_tosn15.pdf Sun, 1 Nov 2015 00:00:00 -0000 From Latency-Insensitive Design to Communication-Based System-Level Design http://sld.cs.columbia.edu/pubs/carloni_pieee15.pdf Sun, 1 Nov 2015 00:00:00 -0000 A low-cost, fast, and accurate microwave imaging system for breast cancer detection http://sld.cs.columbia.edu/pubs/pagliari_biocas15.pdf Thu, 1 Oct 2015 00:00:00 -0000 Acceleration of microwave imaging algorithms for breast cancer detection via High-Level Synthesis http://sld.cs.columbia.edu/pubs/pagliari_iccd15.pdf Thu, 1 Oct 2015 00:00:00 -0000 An 82%-efficient multiphase voltage-regulator 3D interposer with on-chip magnetic inductors http://sld.cs.columbia.edu/pubs/tien_vlsi15.pdf Mon, 1 Jun 2015 00:00:00 -0000 An Analysis of Accelerator Coupling in Heterogeneous Architectures http://sld.cs.columbia.edu/pubs/cota_dac15.pdf Mon, 1 Jun 2015 00:00:00 -0000 LN-Annote: An Alternative Approach to Information Extraction from Emails Using Locally-Customized Named-Entity Recognition http://sld.cs.columbia.edu/pubs/jung_www15.pdf Thu, 1 Jan 2015 00:00:00 -0000 ΣVP: Host-GPU Multiplexing for Efficient Simulation of Multiple Embedded GPUs on Virtual Platforms http://sld.cs.columbia.edu/pubs/jung_dac15.pdf Thu, 1 Jan 2015 00:00:00 -0000 An experimental investigation of occupancy-based energy-efficient control of commercial building indoor climate http://sld.cs.columbia.edu/pubs/brooks_cdc14.pdf Mon, 1 Dec 2014 00:00:00 -0000 System-level memory optimization for high-level synthesis of component-based SoCs http://sld.cs.columbia.edu/pubs/pilato_codesisss2014.pdf Wed, 1 Oct 2014 00:00:00 -0000 Cloud-Aided Design for Distributed Embedded Systems http://sld.cs.columbia.edu/pubs/jung_dt14.pdf Sun, 1 Jun 2014 00:00:00 -0000 A Design Methodology for Compositional High-Level Synthesis of Communication-Centric SoCs http://sld.cs.columbia.edu/pubs/diguglielmo_dac14.pdf Wed, 1 Jan 2014 00:00:00 -0000 Accelerator Memory Reuse in the Dark Silicon Era http://sld.cs.columbia.edu/pubs/cota_cal14.pdf Wed, 1 Jan 2014 00:00:00 -0000 Flexible Filters in Stream Programs http://sld.cs.columbia.edu/pubs/collins_tecs13.pdf Sun, 1 Dec 2013 00:00:00 -0000 Virtual Channels and Multiple Physical Networks: Two Alternatives to Improve NoC Performance http://sld.cs.columbia.edu/pubs/yoon_tcad13.pdf Sun, 1 Dec 2013 00:00:00 -0000 Modeling and Implementation of Energy Neutral Sensing Systems http://sld.cs.columbia.edu/pubs/szczodrak_enssys13.pdf Fri, 1 Nov 2013 00:00:00 -0000 An Open Framework to Deploy Heterogeneous Wireless Testbed for Cyber-Physical Systems http://sld.cs.columbia.edu/pubs/szczodrak_sies13.pdf Sat, 1 Jun 2013 00:00:00 -0000 netShip: a networked virtual platform for large-scale heterogeneous distributed embedded systems http://sld.cs.columbia.edu/pubs/jung_dac13.pdf Sat, 1 Jun 2013 00:00:00 -0000 A method to abstract RTL IP blocks into C++ code and enable high-level synthesis http://sld.cs.columbia.edu/pubs/bombieri_dac13.pdf Wed, 1 May 2013 00:00:00 -0000 Dynamic Reconfiguration of Wireless Sensor Networks to Support Heterogeneous Applications http://sld.cs.columbia.edu/pubs/szczodrak_dcoss13.pdf Wed, 1 May 2013 00:00:00 -0000 On learning-based methods for design-space exploration with High-Level Synthesis http://sld.cs.columbia.edu/pubs/liu_dac13.pdf Wed, 1 May 2013 00:00:00 -0000 P-sync: A Photonically Enabled Architecture for Efficient Non-local Data Access http://sld.cs.columbia.edu/pubs/whelihan_ipdps13.pdf Wed, 1 May 2013 00:00:00 -0000 Prototyping Energy Harvesting Active Networked Tags (EnHANTs) http://sld.cs.columbia.edu/pubs/gorlatova_infocom13.pdf Mon, 1 Apr 2013 00:00:00 -0000 Panel: The heritage of Mead amp; Conway What has remained the same, what was missed, what has changed, what lies ahead http://sld.cs.columbia.edu/pubs/date13_panel.pdf Fri, 1 Mar 2013 00:00:00 -0000 A 2.5D Integrated Voltage Regulator Using Coupled-Magnetic-Core Inductors on Silicon Interposer http://sld.cs.columbia.edu/pubs/sturcken_jssc13.pdf Tue, 1 Jan 2013 00:00:00 -0000 A broadband embedded computing system for MapReduce utilizing Hadoop http://sld.cs.columbia.edu/pubs/jung_cloudcom12.pdf Sat, 1 Dec 2012 00:00:00 -0000 Ventti: A vertically integrated framework for simulation and optimization of networks-on-Chip http://sld.cs.columbia.edu/pubs/yoon_socc12.pdf Sat, 1 Sep 2012 00:00:00 -0000 A Switched-Inductor Integrated Voltage Regulator With Nonlinear Feedback and Network-on-Chip Load in 45 nm SOI http://sld.cs.columbia.edu/pubs/sturcken_jssc12.pdf Wed, 1 Aug 2012 00:00:00 -0000 Engineering a Bandwidth-Scalable Optical Layer for a 3D Multi-core Processor with Awareness of Layout Constraints http://sld.cs.columbia.edu/pubs/ramini_nocs12.pdf Tue, 1 May 2012 00:00:00 -0000 Compositional System-Level Design Exploration with Planning of High-Level Synthesis http://sld.cs.columbia.edu/pubs/liu_date12.pdf Thu, 1 Mar 2012 00:00:00 -0000 A 2.5D Integrated Voltage Regulator Using Coupled Magnetic Core Inductors on Silicon Interposer Delivering 10.8A/mm2 http://sld.cs.columbia.edu/pubs/sturcken_isscc12.pdf Wed, 1 Feb 2012 00:00:00 -0000 Demo: A Complete Framework for Programming Event-Driven, Self-Reconfigurable Low Power Wireless Networks http://sld.cs.columbia.edu/pubs/szczodrak_sensys11.pdf Tue, 1 Nov 2011 00:00:00 -0000 Demo: Organic Solar Cell-equipped Energy Harvesting Active Networked Tag (EnHANT) Prototypes http://sld.cs.columbia.edu/pubs/stanje_sensys11.pdf Tue, 1 Nov 2011 00:00:00 -0000 A Dynamic and Distributed TDM Slot-Scheduling Protocol for QoS-Oriented Networks-on-Chips http://sld.cs.columbia.edu/pubs/concer_iccd11.pdf Sat, 1 Oct 2011 00:00:00 -0000 Physical-Layer Modeling and System-Level Design of Chip-Scale Photonic Interconnection Networks http://sld.cs.columbia.edu/pubs/chan_tcad11.pdf Sat, 1 Oct 2011 00:00:00 -0000 Embedded Processor Virtualization for Broadband Grid Computing http://sld.cs.columbia.edu/pubs/neill_grid11.pdf Thu, 1 Sep 2011 00:00:00 -0000 Supervised Design Space Exploration by Compositional Approximation of Pareto Sets http://sld.cs.columbia.edu/pubs/liu_dac11.pdf Wed, 1 Jun 2011 00:00:00 -0000 Time-Division-Multiplexed Arbitration in Silicon Nanophotonic Networks-On-Chip for High-Performance Chip Multiprocessors http://sld.cs.columbia.edu/pubs/hendry_jpds11.pdf Sun, 1 May 2011 00:00:00 -0000 Synthesis of Distributed Execution Platforms for Cyber-Physical Systems with Applications to High-Performance Buildings http://sld.cs.columbia.edu/pubs/leonardi_iccps11.pdf Fri, 1 Apr 2011 00:00:00 -0000 VANDAL: A Tool for the Design Specification of Nanophotonic Networks http://sld.cs.columbia.edu/pubs/hendry_date11.pdf Tue, 1 Mar 2011 00:00:00 -0000 An Integrated Four-Phase Buck Converter Delivering 1A/mm2 with 700ps Controller Delay and Network-on-Chip Load in 45-nm SOI http://sld.cs.columbia.edu/pubs/sturcken_cicc11.pdf Sat, 1 Jan 2011 00:00:00 -0000 Demo: prototyping UWB-enabled EnHANTS http://sld.cs.columbia.edu/pubs/zhu_mobisys11.pdf Sat, 1 Jan 2011 00:00:00 -0000 Circuit-Switched Memory Access in Photonic Interconnection Networks for High-Performance Embedded Computing http://sld.cs.columbia.edu/pubs/hendry_sc10.pdf Mon, 1 Nov 2010 00:00:00 -0000 Flexible Filters for High-Performance Embedded Computing http://sld.cs.columbia.edu/pubs/collins_hpec10.pdf Wed, 1 Sep 2010 00:00:00 -0000 Silicon Nanophotonic Network-On-Chip using TDM Arbitration http://sld.cs.columbia.edu/pubs/hendry_hoti10.pdf Sun, 1 Aug 2010 00:00:00 -0000 The Connection-then-Credit Flow Control Protocol for Heterogeneous Multi-Core Systems-on-Chip http://sld.cs.columbia.edu/pubs/concer_tcad10.pdf Tue, 1 Jun 2010 00:00:00 -0000 Virtual Channels vs. Multiple Physical Networks: A Comparative Analysis http://sld.cs.columbia.edu/pubs/yoon_dac10.pdf Tue, 1 Jun 2010 00:00:00 -0000 A Heterogeneous Parallel System Running Open MPI on a Broadband Network of Embedded Set-Top Devices http://sld.cs.columbia.edu/pubs/neill_cf10.pdf Sat, 1 May 2010 00:00:00 -0000 Accurate Predictive Interconnect Modeling for System-Level Design http://sld.cs.columbia.edu/pubs/carloni_tvlsi10.pdf Thu, 1 Apr 2010 00:00:00 -0000 Exploiting Local Logic Structures to Optimize Multi-Core SoC Floorplanning http://sld.cs.columbia.edu/pubs/li_date10.pdf Mon, 1 Mar 2010 00:00:00 -0000 PhoenixSim: A Simulator for Physical-Layer Analysis of Chip-Scale Photonic Interconnection Networks http://sld.cs.columbia.edu/pubs/chan_date10.pdf Mon, 1 Mar 2010 00:00:00 -0000 Recursion-Driven Parallel Code Generation for Multi-Core Platforms http://sld.cs.columbia.edu/pubs/collins_date10.pdf Mon, 1 Mar 2010 00:00:00 -0000 Flexible Filters: Load Balancing through Backpressure for Stream Programs http://sld.cs.columbia.edu/pubs/collins_emsoft09.pdf Thu, 1 Oct 2009 00:00:00 -0000 Photonic NoCs: System-Level Design Exploration http://sld.cs.columbia.edu/pubs/petracca_ieeemicro09.pdf Wed, 1 Jul 2009 00:00:00 -0000 Analysis of Photonic Networks for a Chip Multi-Processor Using Scientific Applications http://sld.cs.columbia.edu/pubs/hendry_nocs09.pdf Fri, 1 May 2009 00:00:00 -0000 CTC: An End-To-End Flow Control Protocol for Multi-Core Systems-on-Chip http://sld.cs.columbia.edu/pubs/concer_nocs09.pdf Fri, 1 May 2009 00:00:00 -0000 Networks-on-Chip in Emerging Interconnect Paradigms: Advantages and Challenges http://sld.cs.columbia.edu/pubs/carloni_nocs09.pdf Fri, 1 May 2009 00:00:00 -0000 A Case Study in Distributed Deployment of Embedded Software for Camera Networks http://sld.cs.columbia.edu/pubs/leonardi_date09.pdf Wed, 1 Apr 2009 00:00:00 -0000 A Methodology for Constrained-Driven Synthesis of On-Chip Communications http://sld.cs.columbia.edu/pubs/pinto_tcad09.pdf Sun, 1 Mar 2009 00:00:00 -0000 Leveraging Local Intra-Core Information to Increase Global Performance in Block-Based Design of Systems-on-Chip http://sld.cs.columbia.edu/pubs/li_tcad09.pdf Sun, 1 Feb 2009 00:00:00 -0000 Topology-Based Performance Analysis and Optimization of Latency-Insensitive Systems http://sld.cs.columbia.edu/pubs/collins_tcad08.pdf Mon, 1 Dec 2008 00:00:00 -0000 Distributed Flit-Buffer Flow Control for Networks-on-Chip http://sld.cs.columbia.edu/pubs/concer_codesIsss08.pdf Wed, 1 Oct 2008 00:00:00 -0000 COSI: A Framework for the Design of Interconnection Networks http://sld.cs.columbia.edu/pubs/pinto_ieeedt08.pdf Mon, 1 Sep 2008 00:00:00 -0000 Photonic Many-Core Architecture Study http://sld.cs.columbia.edu/pubs/bliss_hpec08.pdf Mon, 1 Sep 2008 00:00:00 -0000 Photonic Networks-on-Chip for Future Generations of Chip Multi-Processors http://sld.cs.columbia.edu/pubs/shacham_tcomp08.pdf Mon, 1 Sep 2008 00:00:00 -0000 Design Exploration of Optical Interconnection Networks for Chip Multiprocessors http://sld.cs.columbia.edu/pubs/petracca_hoti08.pdf Fri, 1 Aug 2008 00:00:00 -0000 Composing Heterogeneous Reactive Systems http://sld.cs.columbia.edu/pubs/benveniste_tecs08.pdf Tue, 1 Jul 2008 00:00:00 -0000 Fault-Tolerant Distributed Deployment of Embedded Control Software http://sld.cs.columbia.edu/pubs/pinello_tcad08.pdf Thu, 1 May 2008 00:00:00 -0000 Photonic Networks-on-Chip: Opportunities and Challenges http://sld.cs.columbia.edu/pubs/petracca_iscas08.pdf Thu, 1 May 2008 00:00:00 -0000 Nanophotonic Optical Interconnection Network Architecture for On-Chip and Off-Chip Communications http://sld.cs.columbia.edu/pubs/wang_ofcnfoec08.pdf Fri, 1 Feb 2008 00:00:00 -0000 Interconnect modeling for improved system-level design optimization http://sld.cs.columbia.edu/pubs/carloni_aspdac08.pdf Tue, 1 Jan 2008 00:00:00 -0000 Using Functional Independence Conditions to Optimize the Performance of Latency-Insensitive Systems http://sld.cs.columbia.edu/pubs/li_iccad07.pdf Thu, 1 Nov 2007 00:00:00 -0000 A Communication Synthesis Infrastructure for Heterogeneous Networked Control Systems and Its Application to Building Automation and Control http://sld.cs.columbia.edu/pubs/pinto_emsoft07.pdf Mon, 1 Oct 2007 00:00:00 -0000 On-Chip Photonic Communication for High-Performance Multi-Core Processors http://sld.cs.columbia.edu/pubs/bergman_hpec07.pdf Sat, 1 Sep 2007 00:00:00 -0000 Photonic NoC for DMA Communications in Chip Multiprocessors http://sld.cs.columbia.edu/pubs/shacham_hoti07.pdf Wed, 1 Aug 2007 00:00:00 -0000 Design, Implementation, and Validation of a New Class of Interface Circuits for Latency-Insensitive Design http://sld.cs.columbia.edu/pubs/li_memocode07.pdf Fri, 1 Jun 2007 00:00:00 -0000 The Case for Low-Power Photonic Networks-on-Chip http://sld.cs.columbia.edu/pubs/shacham_dac07.pdf Fri, 1 Jun 2007 00:00:00 -0000 Topology-Based Optimization of Maximal Sustainable Throughput in a Latency-Insensitive System http://sld.cs.columbia.edu/pubs/collins_dac07.pdf Fri, 1 Jun 2007 00:00:00 -0000 On the Design of a Photonic Network-on-Chip http://sld.cs.columbia.edu/pubs/shacham_nocs07.pdf Tue, 1 May 2007 00:00:00 -0000 Communication by Sampling in Time-Sensitive Distributed Systems http://sld.cs.columbia.edu/pubs/benveniste_emsoft06.pdf Sun, 1 Oct 2006 00:00:00 -0000 Maximizing GFLOPS-per-Watt: High-Bandwidth, Low Power Photonic On-Chip Networks http://sld.cs.columbia.edu/pubs/shacham_pac2_06.pdf Fri, 1 Sep 2006 00:00:00 -0000 Platform-Based Design for Wireless Sensor Networks http://sld.cs.columbia.edu/pubs/bonivento_monet06.pdf Tue, 1 Aug 2006 00:00:00 -0000 Languages and Tools for Hybrid Systems Design http://sld.cs.columbia.edu/pubs/carloni_now06.pdf Sat, 1 Jul 2006 00:00:00 -0000 A Framework for Modeling the Distributed Deployment of Synchronous Designs http://sld.cs.columbia.edu/pubs/carloni_jfmsd06.pdf Wed, 1 Mar 2006 00:00:00 -0000 Interchange Formats for Hybrid Systems: Abstract Semantics http://sld.cs.columbia.edu/pubs/pinto_hscc06.pdf Wed, 1 Mar 2006 00:00:00 -0000 Interchange Semantics for Hybrid System Models http://sld.cs.columbia.edu/pubs/pinto_mathmod06.pdf Wed, 1 Feb 2006 00:00:00 -0000 Platform-Based Design of Wireless Sensor Networks for Industrial Applications http://sld.cs.columbia.edu/pubs/bonivento_date06.pdf Wed, 1 Feb 2006 00:00:00 -0000 The Role of Back-Pressure in Implementing Latency-Insensitive Design http://sld.cs.columbia.edu/pubs/carloni_fmgals05.pdf Sun, 1 Jan 2006 00:00:00 -0000 Rialto: A Bridge between Description and Implementation of Control Algorithms for Wireless Sensor Networks http://sld.cs.columbia.edu/pubs/bonivento_emsoft05.pdf Thu, 1 Sep 2005 00:00:00 -0000 Tag Machines http://sld.cs.columbia.edu/pubs/benveniste_emsoft05.pdf Thu, 1 Sep 2005 00:00:00 -0000 Platform-Based Design for Embedded Systems http://sld.cs.columbia.edu/pubs/carloni_platform05_ies.pdf Mon, 1 Aug 2005 00:00:00 -0000 Interchange Formats for Hybrid Systems: Review and Proposal http://sld.cs.columbia.edu/pubs/pinto_hscc05.pdf Tue, 1 Mar 2005 00:00:00 -0000 Platform-Based and Derivative Design Mon, 1 Nov 2004 00:00:00 -0000 Heterogeneous Reactive Systems Modeling: Capturing Causality and the Correctness of Loosely Time-Triggered Architectures (LTTA) http://sld.cs.columbia.edu/pubs/benveniste_emsoft04.pdf Wed, 1 Sep 2004 00:00:00 -0000 Causality and Scheduling Constraints in Heterogeneous Reactive Systems Modeling http://sld.cs.columbia.edu/pubs/benveniste_fmco03.pdf Sun, 1 Aug 2004 00:00:00 -0000 Benefits and Challenges of Platform-Based Design http://sld.cs.columbia.edu/pubs/sangiovanni_dac04.pdf Tue, 1 Jun 2004 00:00:00 -0000 Fault-Tolerant Deployment of Embedded Software for Cost-Sensitive Real-Time Feedback-Control Applications http://sld.cs.columbia.edu/pubs/pinello_date04.pdf Sun, 1 Feb 2004 00:00:00 -0000 Efficient Synthesis of Networks on Chip http://sld.cs.columbia.edu/pubs/pinto_iccd03.pdf Wed, 1 Oct 2003 00:00:00 -0000 Heterogeneous Reactive Systems Modeling and Correct-by-Construction Deployment http://sld.cs.columbia.edu/pubs/benveniste_emsoft03.pdf Wed, 1 Oct 2003 00:00:00 -0000 On-Chip Communication Design: Roadblocks and Avenues http://sld.cs.columbia.edu/pubs/carloni_codesIsss03.pdf Wed, 1 Oct 2003 00:00:00 -0000 A Formal Modeling Framework for Deploying Synchronous Designs on Distributed Architectures http://sld.cs.columbia.edu/pubs/carloni_fmgals03.pdf Mon, 1 Sep 2003 00:00:00 -0000 Combining Retiming and Recycling to Optimize the Performance of Synchronous Circuits http://sld.cs.columbia.edu/pubs/carloni_sbcci03.pdf Mon, 1 Sep 2003 00:00:00 -0000 A Methodology for ``Correct-by-Construction'' Latency Insensitive Design http://sld.cs.columbia.edu/pubs/carloni_bestOfIccad03.pdf Wed, 1 Jan 2003 00:00:00 -0000 Coping with Latency in SOC Design http://sld.cs.columbia.edu/pubs/carloni_ieeemicro02.pdf Sun, 1 Sep 2002 00:00:00 -0000 The Art and Science of Integrated Systems Design Sun, 1 Sep 2002 00:00:00 -0000 The Art and Science of Integrated Systems Design http://sld.cs.columbia.edu/pubs/carloni_esscirc02.pdf Sun, 1 Sep 2002 00:00:00 -0000 Constraint-Driven Communication Synthesis http://sld.cs.columbia.edu/pubs/pinto_dac02.pdf Sat, 1 Jun 2002 00:00:00 -0000 Theory of Latency-Insensitive Design http://sld.cs.columbia.edu/pubs/carloni_tcad01_lip.pdf Sat, 1 Sep 2001 00:00:00 -0000 Modeling of Substrate Noise Injected by Digital Libraries http://sld.cs.columbia.edu/pubs/zanella_isqed01.pdf Thu, 1 Mar 2001 00:00:00 -0000 Performance Analysis and Optimization of Latency Insensitive Systems http://sld.cs.columbia.edu/pubs/carloni_dac00.pdf Thu, 1 Jun 2000 00:00:00 -0000 Negative Thinking in Branch-and-Bound: the Case of Unate Covering http://sld.cs.columbia.edu/pubs/goldbergTranscad.pdf Wed, 1 Mar 2000 00:00:00 -0000 Aura II: Combining Negative Thinking and Branch-and-Bound in Unate Covering Problems http://sld.cs.columbia.edu/pubs/carloni_vlsi99.pdf Wed, 1 Dec 1999 00:00:00 -0000 A Methodology for ``Correct-by-Construction'' Latency Insensitive Design http://sld.cs.columbia.edu/pubs/carloni_iccad99.pdf Mon, 1 Nov 1999 00:00:00 -0000 Latency Insensitive Protocols http://sld.cs.columbia.edu/pubs/carloni_cav99.pdf Thu, 1 Jul 1999 00:00:00 -0000 Modeling Digital Substrate Noise Injection in Mixed-Signal ICs http://sld.cs.columbia.edu/pubs/charbonTranscad.pdf Mon, 1 Mar 1999 00:00:00 -0000 Exact Minimization of Binary Decision Diagrams Using Implicit Techniques http://sld.cs.columbia.edu/pubs/arlindoTranscomp.pdf Sun, 1 Nov 1998 00:00:00 -0000 Negative Thinking by Incremental Problem Solving: Application to Unate Covering http://sld.cs.columbia.edu/pubs/goldberg_aura97.pdf Sat, 1 Nov 1997 00:00:00 -0000 Trace Driven Logic Synthesis - Application to Power Minimization http://sld.cs.columbia.edu/pubs/carloni_iccad97.pdf Sat, 1 Nov 1997 00:00:00 -0000 An implicit formulation for exact BDD minimization of incompletely specified functions http://sld.cs.columbia.edu/pubs/oliveira_vlsi97.pdf Fri, 1 Aug 1997 00:00:00 -0000 SUBWAVE: a Methodology for Modeling Digital Substrate Noise Injection in Mixed-Signal ICs http://sld.cs.columbia.edu/pubs/miliozzi_cicc96.pdf Wed, 1 May 1996 00:00:00 -0000