Efficiency, impedance, and power quality are key parameters to measure in data-center power-distribution networks.

In part 1 of this series, we looked at the evolution of data-center power architectures in the age of artificial intelligence (AI). Here, we’ll look at some key power parameters and the test instruments needed to measure them.

Q: What are some of the key parameters?
A: The overriding concern is efficiency. The operator of a grid-connected data center will ask, “Of the energy that I buy from the utility, what percentage can I deliver to the processors, communications chips, and other components that perform AI training and inference?” In percent, efficiency is simply 100 times output power divided by input power.

Q: How do we measure efficiency?
A: The typical approach to measuring and optimizing efficiency is to take individual components of your power system and test the efficiency of each, making improvements as necessary. Figure 1a, for example, shows a portion of the traditional data-center power system we examined in part 1. As part of our efficiency study, we can take an individual power-supply unit (PSU) as our device under test (DUT) and measure its efficiency. To do that, we use a programmable AC source^[1] to represent the PSU’s input and connect a programmable DC load to its output (Figure 1b). This approach enables us to calculate the PSU’s efficiency under various load conditions. It also allows us to determine how the PSU responds to AC input disturbances.

Q: What’s going on in Figure 1c?
A: In part 1, we noted that advanced data centers are moving to DC buses running at  50 V or as high as 800 V. In these cases, the rectification has moved upstream, and the PSU in Figure 1a is replaced by an intermediate bus converter (IBC). In Figure 1c, we are using a programmable DC supply as the input to an IBC, and we continue to use our programmable DC load as the IBC output. Once again, we can calculate the IBC’s efficiency over a range of power levels, and we can study its response to DC bus perturbations.

Q: How do we boost efficiency?
A: To boost overall efficiency, keep the impedances of all your conductors low. For a conductor with resistance R carrying a current I, the losses are I²R, so keep R to a minimum. In addition, keep the power factor high: as close to 1 as possible. A low power factor increases reactive currents, which don’t do any useful work but do contribute to conductor I²R losses. Designers of an AC/DC PSU will include a power-factor correction stage on the input.^[2] As far as the efficiency of the PSU itself is concerned, designers can do something as simple as using power switches with lower on-resistances (R_{DS_ON}) or experimenting with a different switching frequency, or they can try a completely different circuit topology.^[3] And to help you get a handle on PSU efficiency, you can look for an 80 PLUS ratings, which extend from standard and Bronze at the low end to Titanium and Ruby at the high end.^[4]

Q: What about power quality?
A: Power quality is of serious concern to data-center operators. Figure 2 illustrates some power-quality issues that can occur. Maintaining good power quality generally requires continuous monitoring of multiple channels of power distribution system voltages and currents, with real-time decision making to head off outages.^[5] Power quality is more difficult to quantify than efficiency or resistance, but a goal is often “five nines availability”—that is, 99.999% uptime, limiting downtime to five and a quarter minutes per year.^[6]

Q: Is power integrity the same as power quality?
A: Generally, power quality refers to the AC input, while power integrity refers to the low-voltage DC rails at the circuit board and chip level. So far, we have looked at power distribution from the AC grid to the AC/DC converter or the high-voltage DC input to the IBC. Next time, we’ll conclude this series with a look at the downstream point-of-load voltage levels that deliver on the order of 1-VDC to the processors and other electronic components.

References

[1] Advanced AC Source Solution for Data Centers and IT Servers, Keysight
[2] Power Factor Correction (PFC) Handbook, onsemi
[3] Comparison of AC/DC Power Conversion Topologies for Three Phase Industrial Systems, Texas Instruments
[4] 80 PLUS Power Supply Certification Program, CLEAResult
[5] Data Center Power Monitoring, Emerson/NI
[6] Power quality for data centers, Siemens

Related EEWorld Online content

Selecting and applying programmable power supplies
How AC Power Sources Get Synchronized
How to use remote sensing for DC programmable power supplies
The many measurements of power quality
What are some design considerations for titanium ac/dc power supplies?
What are the hardware strategies for building energy-efficient AI accelerators?

The post AI data center power distribution: part 2 appeared first on Microcontroller Tips.

Power-distribution architectures are evolving to meet the energy needs of artificial-intelligence workloads.

Data-center power consumption regularly makes headlines, with consumers fearing that data-center operators are driving up electricity prices. The IEA expects that power demands will continue to rise as data centers increasingly run demanding artificial-intelligence (AI) workloads. The agency estimates that data-center energy consumption reached 415 TWh in 2024, representing 1.5% of global energy consumption, and will increase to 945 TWh annually by 2030.^[1]

Q: What accounts for this increase in power—more data centers or more power-consumption per data center?
A: Both. Each data center that comes online is likely to require more power than an older facility. Estimates suggest that a single server rack within a data center will consume 1.5 MW in power by 2028, up from an estimated 400 kW in 2026.^[2]

Q: What steps can be taken to limit data-center power consumption?
A: One key factor is maximizing power efficiency. That is, ensuring that the power consumed goes to the compute engines and is not wasted in the power-conversion components and power-distribution conductors.

Q: How can we maximize efficiency?
A: To answer that question, it helps to understand how data-center power-distribution architectures have evolved over the years. Figure 1 at the top shows a traditional power-distribution architecture.

In this example, the utility grid or an on-premises generator provides three-phase 13 kVAC, which a stepdown transformer converts to 480 VAC. In the event of a grid failure, an uninterruptible power supply (UPS) can provide 480-VAC power until a backup generator can be brought online. Finally, a distribution panel routes single-phase 277-VAC (the line-to-neutral value of three-phase 480 VAC) to a power-supply unit (PSU) in each server tray, which derives 12 VDC for powering various point-of-load (POL) regulators throughout the tray’s electronics.

Q: What’s the drawback to this approach?
A: You can choose from a variety of UPS configurations.^[3] The one shown in Figure 1 is an online double-conversion topology. This approach provides the highest quality sine-wave output and zero transfer time, but the continuous AC/DC conversion followed by DC/AC inversion exacts an efficiency penalty.

Q: What’s the solution?
A: One approach is to move the backup storage downstream, thereby minimizing the conversion and inversion losses. In Figure 1 at the bottom, a single AC/DC converter per rack replaces the PSU per tray (red arrow) and establishes a 50-VDC bus (orange arrow) with battery or capacitor backup (blue arrow). The bus powers an intermediate bus converter (IBC)^[4] in each tray, which develops a 12-VDC level for the POL regulators within the tray electronics.

Q: You mentioned that rack power will reach 1.5 MW soon. That would be a lot of current at 50 VDC.
A: Right, 30,000 A, a totally impractical amount to handle in a standard server rack. Consequently, the industry is exploring 800-VDC architectures (Figure 2). Such a system would have a grid-side AC-output battery energy storage system (BESS) for grid backup. A solid-state transformer/rectifier would develop an 800-VDC bus, which would power high-voltage IBCs (HV IBCs) in each server tray, with DC bus battery or capacitor backup optional.

Q: What’s the status of this architecture?
A: Nvidia is promulgating this architecture in partnership with semiconductor and equipment manufacturers in the data-center electrical ecosystem. NVIDIA suggests such systems could be deployed in 2027 and that the architecture could support compute racks rated up to 8 MW.^[5]

Q: What are the test and measurement implications for these systems?
A: Impedance is the key parameter to measure. We’ll look at the equipment we can use to make the relevant measurements in part 2 of this series.

References

[1] Energy and AI, IEA
[2] Data centers evolve to meet AI’s massive power needs, Texas Instruments
[3] Comparison of UPS Topologies: Offline vs Line-interactive vs Online, FS
[4] Enabling Future Innovations: Intermediate Bus Converter—Part 1: Benefits, Analog Devices
[5] 800 VDC Architecture for Next-Generation AI Infrastructure, Nvidia

Related EEWorld Online content

How is physical artificial intelligence used to optimize data center efficiency?
APEC 2024: Power to the data center
New developments in 212+G per-lane data-center connectors and cables
Data Center Solutions – The Heat is On
What is the mathematics behind artificial intelligence?
Artificial intelligence and machine learning for power electronics

The post AI data center power distribution: part 1 appeared first on Microcontroller Tips.

Morse Micro has announced two Wi-Fi HaLow USB dongle reference designs, MM8108-RD09 and MM8108-RD17, built on the MM8108 SoC to add native IP connectivity at ranges up to 1 kilometer through a USB interface. The MM8108-RD09 supports AP and STA implementations with OpenWRT support for routers and access points plus Windows, Linux and MacOS support for client devices. The MM8108-RD17 presents as a CDC-NCM Ethernet interface with no host driver installation, which supports integration in industrial computers, robotics, point-of-sale terminals, tablets and Android or iOS phones and enables faster deployment of long-range wireless links.

The post Driverless CDC-NCM mode speeds industrial device integration appeared first on Microcontroller Tips.